karo-tx-uboot.git
9 years agopowerpc/b4860: fix for Serdes connectivity to SFP's
Shaveta Leekha [Mon, 25 Mar 2013 07:40:17 +0000 (07:40 +0000)]
powerpc/b4860: fix for Serdes connectivity to SFP's

Crossbar switches were wrongly programmed to
route the CPRI lanes to SFP as the connectivity table
was not correct.
Modified it correctly for SFPs connections.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: fix PHY reset timeout issue
Shengzhou Liu [Mon, 25 Mar 2013 07:40:15 +0000 (07:40 +0000)]
powerpc/t4240qds: fix PHY reset timeout issue

QSGMII card has different PHY address against previous SGMII card.
We check the type of card in slots and set correct PHY address to
avoid complainning "PHY reset timed out" during u-boot booting up.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4qds: Add SW7[4] in the DIP switch display
York Sun [Mon, 25 Mar 2013 07:40:14 +0000 (07:40 +0000)]
powerpc/t4qds: Add SW7[4] in the DIP switch display

SW7[4] is the new bit which controls the mapping of eMMC vs SDHC.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoEnable XAUI interface for B4860QDS
Suresh Gupta [Mon, 25 Mar 2013 07:40:13 +0000 (07:40 +0000)]
Enable XAUI interface for B4860QDS

- Added SERDES2 PRTCLs = 0x98, 0x9E
- Default Phy Addresses for Teranetics PHY on XAUI card
The PHY addresses of Teranetics PHY on XAUI riser card are assigned
based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on
AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1
        and slot2
- Configure MDIO for 10Gig Mac

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoboard/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M
Stephen George [Mon, 25 Mar 2013 07:40:12 +0000 (07:40 +0000)]
board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M

Debug trace buffers are memory mapped in DCSR space beyond 4M.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/p5040: enable PBL tool support
Shaohui Xie [Mon, 25 Mar 2013 07:40:11 +0000 (07:40 +0000)]
powerpc/p5040: enable PBL tool support

Provided a default RCW for P5040, then it can use PBL to build
ramboot image.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4qds: use clock measurement for sysclk and ddr clock
Ed Swarthout [Mon, 25 Mar 2013 07:40:10 +0000 (07:40 +0000)]
powerpc/t4qds: use clock measurement for sysclk and ddr clock

Use QIXIS measurement registers to obtain sysclk and ddr clock. This
allows using non-standard clock speeds, set by directly writing to
clock chip or store the values in qixis clock data eeprom.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/qixis: add clock measurement registers
Ed Swarthout [Mon, 25 Mar 2013 07:40:09 +0000 (07:40 +0000)]
powerpc/qixis: add clock measurement registers

QIXIS includes frequency measurement functions for each major processor
clock input. After reset (and after clocks are stable), QIXIS measures
the clocks against a reference frequency and stores the results in
CLK_FREQ registers. A base register supplies a multiplier which allows
directly obtaining the measured value, without requiring knowledge of
the target system or QIXIS core frequency.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc8xxx: Allow DDR overclock
York Sun [Mon, 25 Mar 2013 07:40:08 +0000 (07:40 +0000)]
powerpc/mpc8xxx: Allow DDR overclock

Allow DDR clock runs faster than SPD specifes. This may cause memory
failure, but the user should know what is going to happen when using
higher than expected DDR clock.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/chassis2: Change core numbering scheme
York Sun [Mon, 25 Mar 2013 07:40:07 +0000 (07:40 +0000)]
powerpc/chassis2: Change core numbering scheme

To align with chassis generation 2 spec, all cores are numbered in sequence.
The cores may reside across multiple clusters. Each cluster has zero to four
cores. The first available core is numbered as core 0. The second available
core is numbered as core 1 and so on.

Core clocks are generated by each clusters. To identify the cluster of each
core, topology registers are examined.

Cluster clock registers are reorganized to be easily indexed.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc8xxx: Add T1040 and variant SoCs
York Sun [Mon, 25 Mar 2013 07:40:06 +0000 (07:40 +0000)]
powerpc/mpc8xxx: Add T1040 and variant SoCs

T1040 and variants have e5500 cores and are compliant to QorIQ Chassis
Generation 2. The major difference between T1040 and its variants is the
number of cores and the number of L2 switch ports.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/T4160: Merge T4160 and T4240 in config_mpc85xx.h
York Sun [Mon, 25 Mar 2013 07:40:05 +0000 (07:40 +0000)]
powerpc/T4160: Merge T4160 and T4240 in config_mpc85xx.h

T4160 is a subset of T4240. Merge them in config_mpc85xx.h to simplify
the defines. Also move CONFIG_E6500 out of t4qds.h into config_mpc85xx.h.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/p5040: enable NAND, SD, SPI boot support
Shaohui Xie [Mon, 25 Mar 2013 07:40:04 +0000 (07:40 +0000)]
powerpc/p5040: enable NAND, SD, SPI boot support

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoAdd e6500 L2 replacement policy selection
James Yang [Mon, 25 Mar 2013 07:40:03 +0000 (07:40 +0000)]
Add e6500 L2 replacement policy selection

This is compile-time config.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoT4240/ramboot: enable PBL tool for T4240
Shaohui Xie [Mon, 25 Mar 2013 07:40:02 +0000 (07:40 +0000)]
T4240/ramboot: enable PBL tool for T4240

Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use
PBL tool to produce the ramboot image.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: Add VDD override
York Sun [Mon, 25 Mar 2013 07:40:01 +0000 (07:40 +0000)]
powerpc/t4240qds: Add VDD override

Allow VDD voltage overriding with a command. This is an add-on feasture of
VID. To override VDD, use command vdd_override with the value of voltage
in mV, for example

vdd_override <voltage in mV, eg. 1050>

The above example will set the VDD to 1.050 volt. Any wrong value out of
range of 0.8188 to 1.2125 volt or invalid string is ignored.

In addition to the command, if overriding VDD is needed earlier in booting
process, save an variable and reboot:

setenv t4240qds_vdd_mv <voltage in mV>
saveenv

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc85xx: check if core is disabled for showing status
York Sun [Mon, 25 Mar 2013 07:40:00 +0000 (07:40 +0000)]
powerpc/mpc85xx: check if core is disabled for showing status

"cpu <num> status" should check if core is disabled before printing
the spin table location.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agonet/phy: fix select line for TN80xx
Shaohui Xie [Mon, 25 Mar 2013 07:39:59 +0000 (07:39 +0000)]
net/phy: fix select line for TN80xx

TN80xx has same PHY ID as TN2020, but it needs different setting to register
30.93 which used to select line, so we read register 30.32 which has
bit 15:12 to indicate PHY hardware version, for TN20xx we will get 3 or 2,
for TN80xx we will get 5 or 4.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoEnable L2 cache parity/ECC error checking
James Yang [Mon, 25 Mar 2013 07:39:58 +0000 (07:39 +0000)]
Enable L2 cache parity/ECC error checking

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: Add board detail for bdinfo command
York Sun [Mon, 25 Mar 2013 07:39:24 +0000 (07:39 +0000)]
powerpc/t4240qds: Add board detail for bdinfo command

Print more detail information including core voltage, RCW source, switch
settings, etc. with bdinfo command.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agocommon: Update cmd_bdinfo for PPC
York Sun [Tue, 14 May 2013 08:06:39 +0000 (08:06 +0000)]
common: Update cmd_bdinfo for PPC

Add board detail function to print more individual board information.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agocmd_mem: fix cp command
Masahiro Yamada [Mon, 20 May 2013 21:08:08 +0000 (21:08 +0000)]
cmd_mem: fix cp command

The "cp" command has not worked since
commit 0628ab8ec59834f98ede267edd21ddb8ba0bb57b,
because of the following lines, which set the destination
and the source to the same address.

buf = map_sysmem(addr, bytes);
src = map_sysmem(addr, bytes);

Tested-by: Tom Rini <trini@ti.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoext4: assign get_fs()->dev_desc before using it
Stephen Warren [Thu, 23 May 2013 10:22:10 +0000 (10:22 +0000)]
ext4: assign get_fs()->dev_desc before using it

Commit 50ce4c0 "fs/ext4: Support device block sizes != 512 bytes"
modified ext4fs_set_blk_dev() to calculate total_sect based on
get_fs()->dev_desc->log2blksz rather than SECTOR_SIZE. However, this
value wasn't yet assigned. Move the assignment earlier so the code
doesn't crash or hang.

Cc: Egbert Eich <eich@suse.com>
Tested-by: Tom Rini <trini@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
9 years agocfi_flash: return NULL for invalid base address input
Masahiro Yamada [Fri, 17 May 2013 05:50:37 +0000 (14:50 +0900)]
cfi_flash: return NULL for invalid base address input

When base address given was out of valid flash address ranges,
flash_get_info() function returned the pointer to the last
element of flash_info[i] array.

This patch changes this function to return NULL pointer
in such a case, which is more correct behaviour.

The function flash_protect_default() calls flash_protect()
immediately after flash_get_info() invocation.
With this correction, flash_protect() function would be
able to return soon, for NULL flash_info.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>
9 years agocosmetic: cfi_flash: delete a space after an unary operator
Masahiro Yamada [Fri, 17 May 2013 05:50:36 +0000 (14:50 +0900)]
cosmetic: cfi_flash: delete a space after an unary operator

Linux Kernel Documentation/CodingStyle says:
 Do not add a space after unary operators such as &, *, ...

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>
9 years agocfi_flash: Fix unaligned accesses to cfi_qry structure
Andrew Gabbasov [Tue, 14 May 2013 17:27:52 +0000 (12:27 -0500)]
cfi_flash: Fix unaligned accesses to cfi_qry structure

Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.

Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Stefan Roese <sr@denx.de>
9 years agoUpdate MAINTAINERS file for sandbox
Simon Glass [Wed, 15 May 2013 06:54:41 +0000 (06:54 +0000)]
Update MAINTAINERS file for sandbox

This currently has no maintainer listed.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoUpdate MAINTAINERS file for x86
Simon Glass [Wed, 15 May 2013 06:54:40 +0000 (06:54 +0000)]
Update MAINTAINERS file for x86

This still shows the previous maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years ago.gitignore: add GNU GLOBAL files
Masahiro Yamada [Sun, 12 May 2013 18:14:05 +0000 (18:14 +0000)]
.gitignore: add GNU GLOBAL files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agofdt_support: Use CONFIG_NR_DRAM_BANKS if defined
Doug Anderson [Tue, 30 Apr 2013 10:22:00 +0000 (10:22 +0000)]
fdt_support: Use CONFIG_NR_DRAM_BANKS if defined

It appears that there are some cases where we have more than 4 banks
of memory.  Use CONFIG_NR_DRAM_BANKS if it's defined to handle this.
This will take up a little extra stack space (64 bytes extra if we go
up to 8 banks), but that seems OK.

Signed-off-by: Doug Anderson <dianders@chromium.org>
9 years agobootm: Avoid 256-byte overflow in fixup_silent_linux()
Doug Anderson [Tue, 17 Jan 2012 09:37:41 +0000 (09:37 +0000)]
bootm: Avoid 256-byte overflow in fixup_silent_linux()

This makes fixup_silent_linux() use malloc() to allocate its
working space, meaning that our maximum kernel command line
should only be limited by malloc().  Previously it was silently
overflowing the stack.

Note that nothing about this change increases the kernel's maximum
command line length.  If you have a command line that is >256
bytes it's up to you to make sure that kernel can handle it.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
9 years agoREADME: Correct reference for CONFIG_SUPPORT_RAW_INITRD
Tom Rini [Thu, 16 May 2013 15:40:11 +0000 (11:40 -0400)]
README: Correct reference for CONFIG_SUPPORT_RAW_INITRD

Signed-off-by: Tom Rini <trini@ti.com>
9 years agopowerpc/esdhc: Correct judgement for DATA PIO mode
Haijun.Zhang [Tue, 7 May 2013 15:50:58 +0000 (15:50 +0000)]
powerpc/esdhc: Correct judgement for DATA PIO mode

The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:

Commit 7b43db92110ec2f15c5f7187a165f2928464966b
drivers/mmc/fsl_esdhc.c: fix compiler warnings

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Sun Yusong-R58495 <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agommc: update Faraday FTSDC010 for rw performance
Kuo-Jung Su [Mon, 6 May 2013 20:32:51 +0000 (20:32 +0000)]
mmc: update Faraday FTSDC010 for rw performance

Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement this new version of driver which is
10+ times faster than the old one.

It's carefully designed to be compatible with Andes chips,
so it should be safe to replace it.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
Tom Rini [Tue, 14 May 2013 22:47:43 +0000 (18:47 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-mpc85xx

9 years agoPower: remove support for Freescale MPC8220
Wolfgang Denk [Sat, 11 May 2013 03:00:50 +0000 (03:00 +0000)]
Power: remove support for Freescale MPC8220

The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.

Remove the code to avoid wasting maitaining efforts on dead stuff.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
9 years agodoc/README.scrapyard: add missing commit IDs
Wolfgang Denk [Sat, 11 May 2013 03:00:49 +0000 (03:00 +0000)]
doc/README.scrapyard: add missing commit IDs

Signed-off-by: Wolfgang Denk <wd@denx.de>
9 years agodrivers/mmc: move spl_mmc.c to common/spl
Ying Zhang [Thu, 9 May 2013 23:00:36 +0000 (23:00 +0000)]
drivers/mmc: move spl_mmc.c to common/spl

The mpc85xx repuires a special layout on the memory device that is
connected to the eSDHC controller interface. But the file spl_mmc.c
didn't handle this specfic case, there needs a special treatmen, in
the powerpc drictory. So, there is no longer to keep spl_mmc.c on
mpc85xx, CONFIG_SPL_FRAMEWORK is not set.

When CONFIG_SPL_MMC_SUPPORT is set and CONFIG_SPL_FRAMEWORK is not
set, there was an error in drivers/mmc/spl_mmc.c:

drivers/mmc/libmmc.o:(.got2+0x8): undefined reference to `spl_image'.

Now, the solution is to move the file "spl_mmc.c" to directory "common/spl".

Signed-off-by: Ying Zhang <b40530@freescale.com>
9 years agosmc911x: fix the timeout detection
Masahiro Yamada [Wed, 8 May 2013 21:42:44 +0000 (21:42 +0000)]
smc911x: fix the timeout detection

If timeout is occurred at the while loop above,
the value of 'timeout' is -1, not 0.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agodoc/README.ubi: Add description of accessing ubi filesystems
Paul B. Henson [Wed, 8 May 2013 17:08:10 +0000 (17:08 +0000)]
doc/README.ubi: Add description of accessing ubi filesystems

Signed-off-by: "Paul B. Henson" <henson@acm.org>
9 years agoT4240/eth: fix SGMII card PHY address
Shaohui Xie [Mon, 25 Mar 2013 07:39:38 +0000 (07:39 +0000)]
T4240/eth: fix SGMII card PHY address

QSGMII card assumed to be used by default, but if SGMII card is used,
it will use different PHY address, but we don't know which card is used
until we access PHY on the card. So we check the card type slot by slot,
if we can read a PHY ID by reading a SGMII PHY address on a slot, then
the slot must have a SGMII card pluged, we mark all ports on that slot,
and fix dts to use the SGMII card PHY address when doing dts fixup
for the marked ports.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4qds: Fix disabling remote I2C connection
Ed Swarthout [Mon, 25 Mar 2013 07:39:37 +0000 (07:39 +0000)]
powerpc/t4qds: Fix disabling remote I2C connection

Only clear IRE bit in qixis brdcfg5 register and keep other bits
unchanged.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/b4860qds: Assign DDR address in board file
York Sun [Mon, 25 Mar 2013 07:39:36 +0000 (07:39 +0000)]
powerpc/b4860qds: Assign DDR address in board file

B4860QDS requires DDRC2 has 0 as base address and DDRC1 has higher address.
This is the requirement for DSP cores to run in 32-bit address space.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc8xxx: Allow board file to override DDR address assignment
York Sun [Mon, 25 Mar 2013 07:39:35 +0000 (07:39 +0000)]
powerpc/mpc8xxx: Allow board file to override DDR address assignment

This gives boards flexibility to assign other than default addresses to each
DDR controller. For example, DDR controler 2 can have 0 as the base and DDR
controller 1 has higher memory.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc85xx: Update workaround for DDR erratum A-004934
York Sun [Mon, 25 Mar 2013 07:39:34 +0000 (07:39 +0000)]
powerpc/mpc85xx: Update workaround for DDR erratum A-004934

The workaround has been updated to use a slightly different magic number.
Change from 0x00003000 to 0x30003000.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoT4/usb: move usb 2.0 utmi dual phy init code to cpu_init.c
Roy Zang [Mon, 25 Mar 2013 07:39:33 +0000 (07:39 +0000)]
T4/usb: move usb 2.0 utmi dual phy init code to cpu_init.c

This is what we have done for the UTMI PHY on P3041/P5020. Then the PHY
initialization can be reused in kernel without  “usb start” command.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoT4240/net: use QSGMII card PHY address by default
Shaohui Xie [Mon, 25 Mar 2013 07:39:32 +0000 (07:39 +0000)]
T4240/net: use QSGMII card PHY address by default

Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card
PHY address is variable depends on different slot.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agonet/phy: add VSC8574 support
Shaohui Xie [Mon, 25 Mar 2013 07:39:31 +0000 (07:39 +0000)]
net/phy: add VSC8574 support

The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
interfaces for quad-port dual media capability. This driver supports SGMII
and QSGMII MAC mode. For now SGMII mode is tested.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/85xx: fix build error introduced by serdes_get_prtcl
Shengzhou Liu [Mon, 25 Mar 2013 07:39:30 +0000 (07:39 +0000)]
powerpc/85xx: fix build error introduced by serdes_get_prtcl

Removed unused declare serdes_get_prtcl() which was no longer needed.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agonet/fm: fixup ethernet for mEMAC
Shengzhou Liu [Mon, 25 Mar 2013 07:39:29 +0000 (07:39 +0000)]
net/fm: fixup ethernet for mEMAC

- set proper compatible property name for mEMAC.
- fixed ft_fixup_port for dual-role mEMAC, which will lead to
  MAC node disabled incorrectly.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agot4240qds/eth: fixup ethernet for t4240qds
Shengzhou Liu [Mon, 25 Mar 2013 07:39:28 +0000 (07:39 +0000)]
t4240qds/eth: fixup ethernet for t4240qds

1, Implemented board_ft_fman_fixup_port() to fix port for kernel.
2, Implemented fdt_fixup_board_enet() to fix node status of different
   slots and interfaces.
3, Adding detection of slot present for XGMII interface.
4, There is no PHY for XFI, so removed related phy address settings.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/85xx: add missing QMAN frequency calculation
Shaohui Xie [Mon, 25 Mar 2013 07:33:25 +0000 (07:33 +0000)]
powerpc/85xx: add missing QMAN frequency calculation

When CONFIG_SYS_FSL_QORIQ_CHASSIS2 is not defined, QMAN frequency will not
be initialized, and QMAN will have a wrong frequency display.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc: Add T4160QDS
York Sun [Mon, 25 Mar 2013 07:33:31 +0000 (07:33 +0000)]
powerpc: Add T4160QDS

T4160QDS shares the same platform as T4240QDS. T4160 is a low power
version of T4240, with eight e6500 cores, two DDR3 controllers, and
slightly different SerDes protocols.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: Move SoC define into boards.cfg
York Sun [Mon, 25 Mar 2013 07:33:30 +0000 (07:33 +0000)]
powerpc/t4240qds: Move SoC define into boards.cfg

Separate CONFIG_PPC_T4240 from board config file. Prepare to add more SoC
variants supported on the same board.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc85xx: Add T4160 SoC
York Sun [Mon, 25 Mar 2013 07:33:29 +0000 (07:33 +0000)]
powerpc/mpc85xx: Add T4160 SoC

T4160 SoC is low power version of T4240. The T4160 combines eight dual
threaded Power Architecture e6500 cores and two memory complexes (CoreNet
platform cache and DDR3 memory controller) with the same high-performance
datapath acceleration, networking, and peripheral bus interfaces.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240: Fix SerDes protocol arrays with const prefix
York Sun [Mon, 25 Mar 2013 07:33:28 +0000 (07:33 +0000)]
powerpc/t4240: Fix SerDes protocol arrays with const prefix

Protocols are constants. Fix arrays with const prefix.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc85xx: Fix PIR parsing for chassis2
York Sun [Mon, 25 Mar 2013 07:33:27 +0000 (07:33 +0000)]
powerpc/mpc85xx: Fix PIR parsing for chassis2

The PIR parsing algorithm we used is not only for E6500. It applies to all
SoCs with chassis 2.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/corenet2: Print SerDes protocol in decimal
York Sun [Mon, 25 Mar 2013 07:33:26 +0000 (07:33 +0000)]
powerpc/corenet2: Print SerDes protocol in decimal

Use decimal and hexadecimal for protocol numbers. It helps to match with
SoC user manual.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoT4/USB: Add USB 2.0 UTMI dual phy support
Roy Zang [Mon, 25 Mar 2013 07:33:23 +0000 (07:33 +0000)]
T4/USB: Add USB 2.0 UTMI dual phy support

T4240 internal UTMI phy is different comparing to previous UTMI PHY
in P3041.
This patch adds USB 2.0 UTMI Dual PHY new memory map and enable it for
T4240.
The phy timing is very sensitive and moving the phy enable code to
cpu_init.c will not work.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: Add voltage ID support
York Sun [Mon, 25 Mar 2013 07:33:22 +0000 (07:33 +0000)]
powerpc/t4240qds: Add voltage ID support

T4240 has voltage ID fuse. Read the fuse and configure the voltage
correctly. Core voltage has higher tolerance on over side than below.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc85xx: Fix portal setup
York Sun [Mon, 25 Mar 2013 07:33:21 +0000 (07:33 +0000)]
powerpc/mpc85xx: Fix portal setup

Missing nodes of crypto, pme, etc in device tree is not a fatal error.
Setting up the qman portal should skip the missing node and continue
to finish the rest.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc8xxx: Fix DDR 3-way interleaving
York Sun [Mon, 25 Mar 2013 07:33:20 +0000 (07:33 +0000)]
powerpc/mpc8xxx: Fix DDR 3-way interleaving

Should check if interleaving is enabled before using interleaving mode.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: Update DDR timing table
York Sun [Mon, 25 Mar 2013 07:33:19 +0000 (07:33 +0000)]
powerpc/t4240qds: Update DDR timing table

Update the timing table to support more rank density, based on the theory
that similar density DIMMs have similar clock adjust and write level start
timing. Update the timing for 1600 and 1866 MT/s. Tested with Micron
MT18JSF1G72AZ-1G9E1 DIMMs, iDIMM M3CN-4GMJ3C0C-M92.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoT4/SerDes: correct the SATA index
Roy Zang [Mon, 25 Mar 2013 07:33:18 +0000 (07:33 +0000)]
T4/SerDes: correct the SATA index

Lane H on SerDes4 should be SATA2 instead of SATA1

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoFman/t4240: some fix for 10G XAUI
Shaohui Xie [Mon, 25 Mar 2013 07:33:17 +0000 (07:33 +0000)]
Fman/t4240: some fix for 10G XAUI

1. fix 10G mac offset by plus 8;
2. add second 10G port info for FM1 & FM2 when init ethernet info;
3. fix 10G lanes name to match lane protocol table;

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: fix XAUI card PHY address
Shaohui Xie [Mon, 25 Mar 2013 07:33:16 +0000 (07:33 +0000)]
powerpc/t4240qds: fix XAUI card PHY address

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoT4/serdes: fix the serdes clock frequency
Roy Zang [Mon, 25 Mar 2013 07:33:15 +0000 (07:33 +0000)]
T4/serdes: fix the serdes clock frequency

Reverse the bit sequence to set and display serdes clock frequency
correctly. The correct bit maps in BRDCFG2 are
0 1 2 3 4 5 6 7
S1RATE[1:0] S2RATE[1:0]  S3RATE[1:0]  S4RATE[1:0]

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoe6500: Move L1 enablement after L2 enablement
Andy Fleming [Mon, 25 Mar 2013 07:33:14 +0000 (07:33 +0000)]
e6500: Move L1 enablement after L2 enablement

The L1 D-cache on e6500 is write-through. This means that it's not
considered a good idea to have the L1 up and running if the L2 is
disabled. We don't actually *use* the L1 until after the L2 is
brought up on e6500, so go ahead and move the L1 enablement after
that code is done.

Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/t4240qds: Fix SPI flash type
Shaohui Xie [Mon, 25 Mar 2013 07:33:13 +0000 (07:33 +0000)]
powerpc/t4240qds: Fix SPI flash type

T4240QDS uses a SST instead of SPANSION SPI flash.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc85xx: Update corenet global utility block registers
York Sun [Mon, 25 Mar 2013 07:33:12 +0000 (07:33 +0000)]
powerpc/mpc85xx: Update corenet global utility block registers

Fix ccsr_gur for corenet platform. Remove non-exist registers. Add fuse
status register.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/mpc85xx: Add definitions for HDBCR registers
Andy Fleming [Mon, 25 Mar 2013 07:33:10 +0000 (07:33 +0000)]
powerpc/mpc85xx: Add definitions for HDBCR registers

Makes it a bit easier to see if we've properly set them. While
we're in there, modify the accesses to HDBCR0 and HDBCR1  to actually
use those definitions.

Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agopowerpc/B4860: Corrected FMAN1 operating frequency print at u-boot
Sandeep Singh [Mon, 25 Mar 2013 07:33:09 +0000 (07:33 +0000)]
powerpc/B4860: Corrected FMAN1 operating frequency print at u-boot

The bit positions for FMAN1 freq in RCW is different for B4860.
Also addded a case when FMAN1 frewuency is equal to systembus.

Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
9 years agoOMAP5: Enable USB Ethernet support with LAN9730
Lubomir Popov [Mon, 1 Apr 2013 04:50:55 +0000 (04:50 +0000)]
OMAP5: Enable USB Ethernet support with LAN9730

Added the LAN9730 to list of supported devices. This chip is used
in the sEVM, uEVM and som5_evb. Tested on the som5_evb with dhcp
and ping.

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
9 years agobuildman: Produce a sensible error message when branch is missing
Simon Glass [Wed, 8 May 2013 08:06:08 +0000 (08:06 +0000)]
buildman: Produce a sensible error message when branch is missing

Rather than a backtrace, produce a nice error message when an invalid
branch is provided to buildman.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agosparc: Use image_setup_linux() instead of local code
Simon Glass [Wed, 8 May 2013 08:06:06 +0000 (08:06 +0000)]
sparc: Use image_setup_linux() instead of local code

Sparc only really sets up the ramdisk, but we should still use
image_setup_linux() so that setup is common across all architectures
that use the FDT.

Cover-letter
Introduce a common image_setup_linux() function
This series continues the work to tidy up the image code. Each
architecture has its own code for setting up ready for booting linux.
An attempt is made here to unify these in a single image_setup_linux()
function.

The part of the image code that deals with FDT is split into image-fdt.c
and a few tweaks are added to make FIT images more viable in SPL.
END
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agom68k: Use image_setup_linux() instead of local code
Simon Glass [Wed, 8 May 2013 08:06:05 +0000 (08:06 +0000)]
m68k: Use image_setup_linux() instead of local code

Rather than having similar code in m68k, use image_setup_linux() which
should be common across all architectures that use the FDT.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agopowerpc: Use image_setup_linux() instead of local code
Simon Glass [Wed, 8 May 2013 08:06:04 +0000 (08:06 +0000)]
powerpc: Use image_setup_linux() instead of local code

Rather than having similar code in powerpc, use image_setup_linux() which
should be common across all architectures that use the FDT.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoarm: Use image_setup_linux() instead of local code
Simon Glass [Wed, 8 May 2013 08:06:03 +0000 (08:06 +0000)]
arm: Use image_setup_linux() instead of local code

Use the common FDT setup function that is now available in image. Move
the FDT-specific code to a new bootm-fdt.c and remove unused headers
from bootm.c.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoarm: Refactor bootm to reduce #ifdefs
Simon Glass [Wed, 8 May 2013 08:06:02 +0000 (08:06 +0000)]
arm: Refactor bootm to reduce #ifdefs

With fewer #ifdefs the code is more readable and more of the code is
compiled for all boards. Add defines in the header file to control
what features are enabled, and then use if() instead of #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoimage: Add device tree setup to image library
Simon Glass [Wed, 8 May 2013 08:06:01 +0000 (08:06 +0000)]
image: Add device tree setup to image library

This seems to be a common function for several architectures, so create
a common function rather than duplicating the code in each arch.

Also make an attempt to avoid introducing #ifdefs in the new code, partly
by removing useless #ifdefs around function declarations in the image.h
header.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoimage: Split libfdt code into image-fdt.c
Simon Glass [Wed, 8 May 2013 08:06:00 +0000 (08:06 +0000)]
image: Split libfdt code into image-fdt.c

The image file is still very large, and some of the code is only used when
libfdt is in use. Move this code into a new file.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoimage: Add CONFIG_FIT_SPL_PRINT to control FIT image printing in SPL
Simon Glass [Wed, 8 May 2013 08:05:59 +0000 (08:05 +0000)]
image: Add CONFIG_FIT_SPL_PRINT to control FIT image printing in SPL

This code is very large, and in SPL it isn't always useful to print
out image information (in fact there might not even be a console
active). So disable this feature unless this option is set.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoimage: Remove remaining #ifdefs in image-fit.c
Simon Glass [Wed, 8 May 2013 08:05:58 +0000 (08:05 +0000)]
image: Remove remaining #ifdefs in image-fit.c

There are only two left. One is unnecessary and the other can be moved
to the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agomkimage: Put FIT loading in function and tidy error handling
Simon Glass [Wed, 8 May 2013 08:05:57 +0000 (08:05 +0000)]
mkimage: Put FIT loading in function and tidy error handling

The fit_handle_file() function is quite long - split out the part that
loads and checks a FIT into its own function. We will use this
function for storing public keys into a destination FDT file.

The error handling is currently a bit repetitive - tidy it.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agosandbox: image: Add support for booting images in sandbox
Simon Glass [Tue, 7 May 2013 06:12:03 +0000 (06:12 +0000)]
sandbox: image: Add support for booting images in sandbox

Much of the image code uses addresses as ulongs and pointers interchangeably,
casting between the two forms as needed.

This doesn't work with sandbox, which has a U-Boot RAM buffer which is
separate from the host machine's memory.

Adjust the cost so that translating from a U-Boot address to a pointer uses
map_sysmem(). This allows bootm to work correctly on sandbox.

Note that there are no exhaustive tests for this code on sandbox, so it is
possible that some dark corners remain.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de> (v1)
9 years agoimage: Rename hash printing to fit_image_print_verification_data()
Simon Glass [Tue, 7 May 2013 06:12:02 +0000 (06:12 +0000)]
image: Rename hash printing to fit_image_print_verification_data()

This function will be used to print signatures as well as hashes, so rename
it. Also make it static since it is not used outside this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Rename fit_add_hashes() to fit_add_verification_data()
Simon Glass [Tue, 7 May 2013 06:12:01 +0000 (06:12 +0000)]
image: Rename fit_add_hashes() to fit_add_verification_data()

We intend to add signatures to FITs also, so rename this function so that
it is not specific to hashing. Also rename fit_image_set_hashes() and
make it static since it is not used outside this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Export fit_conf_get_prop_node()
Simon Glass [Tue, 7 May 2013 06:12:00 +0000 (06:12 +0000)]
image: Export fit_conf_get_prop_node()

This function will be needed by signature checking code, so export it,
and also add docs.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoimage: Move error! string to common place
Simon Glass [Tue, 7 May 2013 06:11:59 +0000 (06:11 +0000)]
image: Move error! string to common place

The string " error\n" appears in each error string. Move it out to a
common place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Move hash checking into its own function
Simon Glass [Tue, 7 May 2013 06:11:58 +0000 (06:11 +0000)]
image: Move hash checking into its own function

The existing function is long and most of the code is indented a long
way. Before adding yet more code, split this out into its own function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de> (v1)
9 years agoimage: Rename fit_image_check_hashes() to fit_image_verify()
Simon Glass [Tue, 7 May 2013 06:11:57 +0000 (06:11 +0000)]
image: Rename fit_image_check_hashes() to fit_image_verify()

This is the main entry point to the FIT image verification code. We will
be using it to handle image verification with signatures, so rename the
function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Convert fit_image_hash_set_value() to static, and rename
Simon Glass [Tue, 7 May 2013 06:11:56 +0000 (06:11 +0000)]
image: Convert fit_image_hash_set_value() to static, and rename

This function doesn't need to be exported, and with verification
we want to use it for setting the 'value' property in any node,
so rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Split hash node processing into its own function
Simon Glass [Tue, 7 May 2013 06:11:55 +0000 (06:11 +0000)]
image: Split hash node processing into its own function

This function has become quite long and much of the body is indented quite
a bit. Move it into a separate function to make it easier to work with.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
9 years agoimage: Move HOSTCC image code to tools/
Simon Glass [Tue, 7 May 2013 06:11:54 +0000 (06:11 +0000)]
image: Move HOSTCC image code to tools/

This code is never compiled into U-Boot, so move it into a separate
file in tools/ to avoid the large #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Split FIT code into new image-fit.c
Simon Glass [Tue, 7 May 2013 06:11:53 +0000 (06:11 +0000)]
image: Split FIT code into new image-fit.c

The FIT code is about half the size of the >3000-line image.c. Split this
code into its own file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Export fit_check_ramdisk()
Simon Glass [Tue, 7 May 2013 06:11:52 +0000 (06:11 +0000)]
image: Export fit_check_ramdisk()

One we split out the FIT code from image.c we will need this function.
Export it in the header.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
9 years agoimage: Move timestamp #ifdefs to header file
Simon Glass [Tue, 7 May 2013 06:11:51 +0000 (06:11 +0000)]
image: Move timestamp #ifdefs to header file

Rather than repeat the line
 #if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || \
defined(USE_HOSTCC)

everywhere, put this in a header file and #define IMAGE_ENABLE_TIMESTAMP
to either 1 or 0. Then we can use a plain if() in most code and avoid
the #ifdefs.

The compiler's dead code elimination ensures that the result is the same.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
9 years agolibfdt: Add fdt_next_subnode() to permit easy subnode iteration
Simon Glass [Tue, 7 May 2013 06:11:50 +0000 (06:11 +0000)]
libfdt: Add fdt_next_subnode() to permit easy subnode iteration

Iterating through subnodes with libfdt is a little painful to write as we
need something like this:

for (depth = 0, count = 0,
offset = fdt_next_node(fdt, parent_offset, &depth);
     (offset >= 0) && (depth > 0);
     offset = fdt_next_node(fdt, offset, &depth)) {
if (depth == 1) {
/* code body */
}
}

Using fdt_next_subnode() we can instead write this, which is shorter and
easier to get right:

for (offset = fdt_first_subnode(fdt, parent_offset);
     offset >= 0;
     offset = fdt_next_subnode(fdt, offset)) {
/* code body */
}

Also, it doesn't require two levels of indentation for the loop body.

Signed-off-by: Simon Glass <sjg@chromium.org>
(Cherry-picked from dtc commit 4e76ec79)
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
9 years agomkimage: Move ARRAY_SIZE to header file
Simon Glass [Tue, 7 May 2013 06:11:49 +0000 (06:11 +0000)]
mkimage: Move ARRAY_SIZE to header file

Move this definition from aisimage.c to mkimage.h so that it is available
more widely.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
9 years agobootstage: Don't build for HOSTCC
Simon Glass [Tue, 7 May 2013 06:11:48 +0000 (06:11 +0000)]
bootstage: Don't build for HOSTCC

We don't measure boot timing on the host, or with SPL, so use both
conditions in the bootstage header. This allows us to avoid using
conditional compilation around bootstage_...() calls. (#ifdef)

Signed-off-by: Simon Glass <sjg@chromium.org>