karo-tx-uboot.git
6 years agoavr32: delete non generic board's atstk100{3, 4, 6}
Andreas Bießmann [Mon, 11 May 2015 11:07:27 +0000 (13:07 +0200)]
avr32: delete non generic board's atstk100{3, 4, 6}

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
6 years agoavr32: delete non generic board mimc200
Andreas Bießmann [Mon, 11 May 2015 11:07:26 +0000 (13:07 +0200)]
avr32: delete non generic board mimc200

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
6 years agoavr32: delete non generic board hammerhead
Andreas Bießmann [Mon, 11 May 2015 11:07:25 +0000 (13:07 +0200)]
avr32: delete non generic board hammerhead

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
6 years agoavr32: delete non generic board favr-32-ezkit
Andreas Bießmann [Mon, 11 May 2015 11:07:24 +0000 (13:07 +0200)]
avr32: delete non generic board favr-32-ezkit

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
6 years agoatngw100: convert to generic board
Andreas Bießmann [Sat, 23 May 2015 21:09:15 +0000 (23:09 +0200)]
atngw100: convert to generic board

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
6 years agoodroid: dts: cleanup of MAX77686 regulators
Przemyslaw Marczak [Mon, 18 May 2015 15:56:47 +0000 (17:56 +0200)]
odroid: dts: cleanup of MAX77686 regulators

This commit cleanup MAX77686 regulator node by:
- remove the sub-nodes of unconnected regulators
- remove the "regulator-compatible" properties of all regulators

This prevents printing init errors for the regulators,
with duplicated name strings.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
6 years agotegra: config: nyan-big: Add options required by Chrome OS boot
Simon Glass [Fri, 5 Jun 2015 20:39:46 +0000 (14:39 -0600)]
tegra: config: nyan-big: Add options required by Chrome OS boot

We need to match the device tree in the FIT with the U-Boot model so we
can automatically select the right device tree. Also adjust the load address
so that the device tree is not in the way when a zImage kernel tries to
extract itself.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: Replace 'Norrin' with 'Nyan-big' and fix typo
Simon Glass [Fri, 5 Jun 2015 20:39:45 +0000 (14:39 -0600)]
tegra: Replace 'Norrin' with 'Nyan-big' and fix typo

With the rename the MAINTAINER file was not updated. Fix it and the
'Chrombook' typo in Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: config: Allow Chrome OS environment settings to be included
Simon Glass [Fri, 5 Jun 2015 20:39:44 +0000 (14:39 -0600)]
tegra: config: Allow Chrome OS environment settings to be included

Bring these in if they are provided by the board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: nyan-big: Add additional clock and kernel init
Simon Glass [Fri, 5 Jun 2015 20:39:43 +0000 (14:39 -0600)]
tegra: nyan-big: Add additional clock and kernel init

We need to turn on all audio-related clocks for the Chrome OS kernel to
boot. Otherwise it will hang when trying to enable audio.

Also for Linux set up graphics driver video protection.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: Allow board-specific init
Simon Glass [Fri, 5 Jun 2015 20:39:42 +0000 (14:39 -0600)]
tegra: Allow board-specific init

Add a hook to allows boards to add their own init to board_init().

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: lcd: Tidy up clock init
Simon Glass [Fri, 5 Jun 2015 20:39:41 +0000 (14:39 -0600)]
tegra: lcd: Tidy up clock init

Use the correct function for clock init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: Increase maximum arguments to 32
Simon Glass [Fri, 5 Jun 2015 20:39:40 +0000 (14:39 -0600)]
tegra: Increase maximum arguments to 32

When setting up large environment variables we can exceed 16 arguemnts.
Increase this to avoid problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: Add missing tegra124 peripherals
Simon Glass [Fri, 5 Jun 2015 20:39:39 +0000 (14:39 -0600)]
tegra: Add missing tegra124 peripherals

There are some missing entries in the tables. Add them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: Introduce SRAM repair on tegra124
Simon Glass [Fri, 5 Jun 2015 20:39:38 +0000 (14:39 -0600)]
tegra: Introduce SRAM repair on tegra124

This is required in order to avoid instability when running from caches
after the kernel starts.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: clock: Adjust PLL access to avoid a warning
Simon Glass [Fri, 5 Jun 2015 20:39:37 +0000 (14:39 -0600)]
tegra: clock: Adjust PLL access to avoid a warning

A harmless but confusing warning is displayed when looking up the
DisplayPort PLL. Correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: clock: Support enabling external clocks
Simon Glass [Fri, 5 Jun 2015 20:39:36 +0000 (14:39 -0600)]
tegra: clock: Support enabling external clocks

Add a simple function to enable external clocks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: spi: Support slow SPI rates
Simon Glass [Fri, 5 Jun 2015 20:39:35 +0000 (14:39 -0600)]
tegra: spi: Support slow SPI rates

Use the oscillator as the source clock when we cannot achieve a low-enough
speed with the peripheral clock. This happens when we request 3MHz on a SPI
clock, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agodm: tegra: cros_ec: Enable Chrome OS EC on Nyan-big
Simon Glass [Fri, 5 Jun 2015 20:39:34 +0000 (14:39 -0600)]
dm: tegra: cros_ec: Enable Chrome OS EC on Nyan-big

Enable the EC and keyboard, using the SPI bus.

The EC driver requires a particular format and a deactivation delay. Also
U-Boot does not support interrupts.

For now, adjust the device tree to comply. At some point we should tidy
this up to support interrupts and make tegra and exynos use the same setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: spi: Drop the claim_bus() method to correct delays
Simon Glass [Fri, 5 Jun 2015 20:39:33 +0000 (14:39 -0600)]
tegra: spi: Drop the claim_bus() method to correct delays

At present the driver does not properly honour the requested SPI CS
deactivation delay since the SPI bus is changed in the claim_bus() method.

Everything the claim_bus() method does can be done when the device is probed
(setting the speed and mode) and at the start of a new transfer (where the
fifo_status is already cleared). So drop this method.

Also, until the delay is complete, we should not touch the bus, so make sure
that spi_cs_activate() is called before other things are done in the xfer()
method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotegra: cros_ec: Add tegra support for Chrome OS EC
Simon Glass [Fri, 5 Jun 2015 20:39:32 +0000 (14:39 -0600)]
tegra: cros_ec: Add tegra support for Chrome OS EC

This requires a change to stdin to include the 'cros-ec-keyb' input device.
Put this in the common file, enabled by the relevant CONFIG.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agotbs2910: add PRE_CONSOLE_BUFFER support
Soeren Moch [Fri, 29 May 2015 18:32:42 +0000 (20:32 +0200)]
tbs2910: add PRE_CONSOLE_BUFFER support

Add PRE_CONSOLE_BUFFER support to display early boot messages over HDMI.

Signed-off-by: Soeren Moch <smoch@web.de>
6 years agotbs2910: add thermal support
Soeren Moch [Fri, 29 May 2015 18:32:41 +0000 (20:32 +0200)]
tbs2910: add thermal support

Signed-off-by: Soeren Moch <smoch@web.de>
6 years agoimx6: novena: Reinstate missing CONFIG_FAT_WRITE
Marek Vasut [Thu, 28 May 2015 11:52:44 +0000 (13:52 +0200)]
imx6: novena: Reinstate missing CONFIG_FAT_WRITE

Commit a380ce6e9698257c4e8be4c0711b09c90a8febff removed CONFIG_FAT_WRITE
from novena.h , so Novena lost ability to write FAT partitions. Add this
functionality back.

Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Peter Robinson <pbrobinson at gmail.com>
Cc: Stefano Babic <sbabic at denx.de>
6 years agopatch - arm - define SYS_CACHELINE_SIZE for mx5
Chris Kuethe [Tue, 2 Jun 2015 23:31:43 +0000 (16:31 -0700)]
patch - arm - define SYS_CACHELINE_SIZE for mx5

mx5 is a cortex-a8 which has 64 byte cache lines. i'll need this for
adding gadget support to usbarmory, but it's a property common the the
entire SoC family - may as well make it available to all MX5 boards

Works on usbarmory; compile-tested on mx53loco and mx51_efikamx too

Signed-off-by: Chris Kuethe <chris.kuethe@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Matthew Starr <mstarr@hedonline.com>
Cc: Andrej Rosano <andrej@inversepath.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Chris Kuethe <chris.kuethe@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
6 years agoPrepare v2015.07-rc2
Tom Rini [Mon, 8 Jun 2015 21:48:33 +0000 (17:48 -0400)]
Prepare v2015.07-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agopepper: Implement Board Detection mechanism
Adam YH Lee [Mon, 1 Jun 2015 21:29:09 +0000 (14:29 -0700)]
pepper: Implement Board Detection mechanism

AM335x-based 'Gumstix Pepper' SBCs and variants use different types of
RAM (DDR2 vs DDR3 with DDR3 being the default).  Detect the board type
by reading the factory-programmed EEPROM [1] and use this to select any
runtime boot options such as RAM type.

[1] http://elinux.org/BeagleBoardPinMux#List_of_Vendor_and_Device_IDs

Signed-off-by: Adam YH Lee <adam.yh.lee@gmail.com>
Signed-off-by: Ash Charles <ashcharles@gmail.com>
6 years agoautoboot.c: Add feature to stop autobooting via SHA256 encrypted password
Stefan Roese [Mon, 18 May 2015 12:08:24 +0000 (14:08 +0200)]
autoboot.c: Add feature to stop autobooting via SHA256 encrypted password

This patch adds the feature to only stop the autobooting, and therefor
boot into the U-Boot prompt, when the input string / password matches
a values that is encypted via a SHA256 hash and saved in the environment.

This feature is enabled by defined these config options:
     CONFIG_AUTOBOOT_KEYED
     CONFIG_AUTOBOOT_STOP_STR_SHA256

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoautoboot.c: Move config options to Kconfig
Stefan Roese [Mon, 18 May 2015 12:08:23 +0000 (14:08 +0200)]
autoboot.c: Move config options to Kconfig

This patch moves the following config options to Kconfig:

CONFIG_AUTOBOOT_KEYED
CONFIG_AUTOBOOT_PROMPT
CONFIG_AUTOBOOT_DELAY_STR
CONFIG_AUTOBOOT_STOP_STR
AUTOBOOT_KEYED_CTRLC

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Drop ip04 and pm9263 configs/ additions, those boards previously
 set CONFIG_AUTOBOOT_PROMPT but never used it, re-run savedefconfig over
 all boards that did change. Make digsy_mtc_* string include seconds to
 match others and not warn. ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoautoboot.c: Remove CONFIG_AUTOBOOT_STOP_STR2 and CONFIG_AUTOBOOT_DELAY_STR2
Stefan Roese [Mon, 18 May 2015 12:08:22 +0000 (14:08 +0200)]
autoboot.c: Remove CONFIG_AUTOBOOT_STOP_STR2 and CONFIG_AUTOBOOT_DELAY_STR2

These defines for a 2nd autoboot stop and delay string are nearly unused. Only
sc3 defines CONFIG_AUTOBOOT_DELAY_STR2. And a patch to remove this most likely
unmaintained board is also posted to the list.

By removing these defines the code will become cleaner and moving the remaining
compile options to Kconfig will get easier.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
6 years agoKconfig: Enable usage of escape char '\' in string values
Stefan Roese [Fri, 29 May 2015 09:47:32 +0000 (11:47 +0200)]
Kconfig: Enable usage of escape char '\' in string values

I might have missed something, but I failed to use the escape char '\'
in strings. To pass a printf format string like "foo %d bar\n" via
Kconfig to the code.

Right now its not possible to use the escape character '\' in Kconfig
string values correctly to e.g. set this string value "test output\n".
The '\n' will be converted to 'n'.

The current implementation removes some of the '\' chars from the input
string in conf_set_sym_val(). Examples:

'\' -> ''
'\\' -> '\'
'\\\' -> '\'
'\\\\' -> '\\'
...

And then doubles the backslash chars in the output string in
sym_escape_string_value(). Example:

'\' -> '' -> ''
'\\' -> '\' -> '\\'
'\\\' -> '\' -> '\\'
'\\\\' -> '\\' -> '\\\\'
...

As you see in these examples, its impossible to generate a single '\'
charater in the output string as its needed for something like '\n'.

This patch now changes this behavior to not drop some backslashes in
conf_set_sym_val() and to not add new backslashes in the resulting
output string. Removing the function sym_escape_string_value()
completely as its not needed anymore.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
6 years agosamsung: common: add example boot scripts
Przemyslaw Marczak [Fri, 22 May 2015 16:14:28 +0000 (18:14 +0200)]
samsung: common: add example boot scripts

This commit adds example scripts of boot.scr:
- bootzimg.cmd - check if dtb exists and boot zImage
- autoboot.cmd - check which image exists: Image.itb, zImage or uImage
                 and optionally load fdt file for u/zImage

The blank spaces are added to improve readability and can be removed
before use mkimage.

Required U-Boot environment variables: $boardname, $fdtfile, $console,
$mmcbootdev, $mmcbootpart, $mmcrootdev, $mmcrootpart, $rootfstype.

Making boot.scr from file.cmd:
 mkimage -C none -A arm -T script -d file.cmd boot.scr

The Odroid XU3 default environment is ready for those boot scripts and
the right script can be loaded by DFU.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
6 years agoodroid-xu3: config: enable DFU/THOR/UMS by add configs and environment
Przemyslaw Marczak [Fri, 22 May 2015 16:14:27 +0000 (18:14 +0200)]
odroid-xu3: config: enable DFU/THOR/UMS by add configs and environment

This patch enables all functions required to use DFU/THOR and UMS:
- DWC3: core, gadget, Samsung DWC3 PHY
- USB gadget: endpoint autoconf, downloader, DFU, THOR, UMS

The CONFIG_EXTRA_ENV_SETINGS from exynos5-common.h is redefined
and appended by dfu environment setting and some system settings.

The boot is still using $distro_boot as previous.

Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
6 years agousb: f_mass_storage: sleep_thread: decrease the interval for check ctrlc()
Inha Song [Fri, 22 May 2015 16:14:26 +0000 (18:14 +0200)]
usb: f_mass_storage: sleep_thread: decrease the interval for check ctrlc()

This change decreases the interval of calls to:
- display busy indicator
- check ctrlc()
- check cable connection

By this change, breaking the UMS command is more easy on Odroid XU3.

Signed-off-by: Inha Song <ideal.song@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
6 years agosmdk5420: board: add functions to init dfu environment settings
Inha Song [Fri, 22 May 2015 16:14:25 +0000 (18:14 +0200)]
smdk5420: board: add functions to init dfu environment settings

This commit extends SMDK5420 board's file by adding functions:
- get_dfu_alt_system()
- get_dfu_alt_boot()

This allows setting the DFU environment by function set_dfu_alt_info()
from: board/samsung/common/misc.c

Signed-off-by: Inha Song <ideal.song@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
6 years agosmdk5420: board: add functions required to enable USB DWC3
Joonyoung Shim [Fri, 22 May 2015 16:14:24 +0000 (18:14 +0200)]
smdk5420: board: add functions required to enable USB DWC3

This commit adds implementation of function calls:
- usb_gadget_handle_interrupts()
- board_usb_init()

Which allow enable USB DWC3 gadget for this board.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
6 years agosamsung: usb: phy: Support for DWC3 PHY
Lukasz Majewski [Fri, 22 May 2015 16:14:23 +0000 (18:14 +0200)]
samsung: usb: phy: Support for DWC3 PHY

New files, namely samsung_usb_phy.c and samsung-usb-phy-uboot.h have
been added to u-boot to provide proper PHY handling at Exynos5 SoCs.

This code is used thereafter in the board_usb_init() call.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
6 years agoarm: exynos: USB3 PHY base definition for Exynos5 SoCs
Lukasz Majewski [Fri, 22 May 2015 16:14:22 +0000 (18:14 +0200)]
arm: exynos: USB3 PHY base definition for Exynos5 SoCs

After that change it would be possible to call samsung_get_base_usb3_phy()
function to get proper base address

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
6 years agoimx: drop warning: unused variable 'max_freq'
Stefano Babic [Tue, 26 May 2015 17:53:41 +0000 (19:53 +0200)]
imx: drop warning: unused variable 'max_freq'

max_freq in print_cpuinfo is used only with
imx6.

Signed-off-by: Stefano Babic <sbabic@denx.de>
6 years agoot1200: setup i2c bus 1 in setup_iomux_i2c()
Christian Gmeiner [Wed, 3 Jun 2015 09:33:23 +0000 (11:33 +0200)]
ot1200: setup i2c bus 1 in setup_iomux_i2c()

On this bus there is a EEPROM containing EDID and ddr3
calibration information.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
6 years agoot1200: setup i2c bus in board_early_init_f(..)
Christian Gmeiner [Wed, 3 Jun 2015 09:33:22 +0000 (11:33 +0200)]
ot1200: setup i2c bus in board_early_init_f(..)

Make it possible to use the i2c bus in SPL.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
6 years agocolibri_vf: Enable board specific USB initialisation for USB pen gpio
Sanchayan Maity [Mon, 1 Jun 2015 13:07:25 +0000 (18:37 +0530)]
colibri_vf: Enable board specific USB initialisation for USB pen gpio

Add IOMUX for the pad used as USB pen. This needs to be driven low for
the Iris and Viola boards where it is pulled up high by default. This is
required for the USB host functionality to work on these boards. Use the
board specific weak initialisation function, to drive the pin low which
would be called on "usb start".

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
6 years agousb: ehci-vf: Add weak function for board specific initialisation
Sanchayan Maity [Mon, 1 Jun 2015 13:07:24 +0000 (18:37 +0530)]
usb: ehci-vf: Add weak function for board specific initialisation

Add a weak function board_ehci_hcd_init which can be used by the board
file for board specific initialisation.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
6 years agocolibri_vf: Add separate defconfig for device tree support
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:23 +0000 (18:37 +0530)]
colibri_vf: Add separate defconfig for device tree support

Most of the drivers available for Vybrid are not yet converted
to OF model to use device tree model, only few drivers
like SPI and GPIO drivers use device trees.
Add separate defconfig for who needs to use device tree model.
Later this can be integrated to single defconfig.

Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agocolibri-vf: Enable SPI support
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:22 +0000 (18:37 +0530)]
colibri-vf: Enable SPI support

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan@agner.ch>
6 years agovf610: dts: Add device tree support
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:21 +0000 (18:37 +0530)]
vf610: dts: Add device tree support

Add device tree files for Freescale Vybrid platform and
Toradex Colibri VF50, VF61 modules.
Device tree files are taken from upstream Kernel.
Removed the stuff which are not used/supported yet in U-Boot.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agoarm: vf610: Add iomux support for DSPI
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:20 +0000 (18:37 +0530)]
arm: vf610: Add iomux support for DSPI

Add iomux definitions for DSPI second instance.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agoarm: vf610: Add clock support for DSPI
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:19 +0000 (18:37 +0530)]
arm: vf610: Add clock support for DSPI

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agocolibri_vf: Enable GPIO support
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:18 +0000 (18:37 +0530)]
colibri_vf: Enable GPIO support

Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agocolibri_vf: Add pinmux entries for GPIOs
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:17 +0000 (18:37 +0530)]
colibri_vf: Add pinmux entries for GPIOs

Inorder to use the pins as GPIO, apart from setting the alt-function,
pinmuxing need to be done, this patch adds pinmux entries of
few GPIOs.

Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agodm: gpio: vf610: Add GPIO driver support
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:16 +0000 (18:37 +0530)]
dm: gpio: vf610: Add GPIO driver support

Add GPIO driver support to Freescale VF610

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agodm: gpio: uclass: Add flag to control sequence numbering
Bhuvanchandra DV [Mon, 1 Jun 2015 13:07:15 +0000 (18:37 +0530)]
dm: gpio: uclass: Add flag to control sequence numbering

Like SPI and I2C few GPIO controllers also have
multiple chip instances. This patch adds the
flag 'DM_UC_FLAG_SEQ_ALIAS' in gpio_uclass driver
to control device sequence numbering. By defalut
the dev->r_seq for gpio_uclass will alwalys
returns -1, which leads the gpio driver probe
failure when using the driver with device trees.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
6 years agomx6_common: Fix LOADADDR and SYS_TEXT_BASE for MX6SL and MX6SX
Fabio Estevam [Thu, 28 May 2015 15:33:34 +0000 (12:33 -0300)]
mx6_common: Fix LOADADDR and SYS_TEXT_BASE for MX6SL and MX6SX

Commit 8183058188cd2d942 ("imx6: centralise common boot options in
mx6_common.h") broke boot on mx6sl and mx6sx by assuming that all mx6
SoCs use the same LOADADDR/SYS_TEXT_BASE range, which is not correct.

DDR on mx6sx/mx6sl starts at 0x80000000.

Adjust LOADADDR/SYS_TEXT_BASE to the proper values for mx6sx/mx6sl,
so that these SoCs can boot again.

Also, TQMA6 requires a custom CONFIG_SYS_TEXT_BASE value, so move
its setting prior to the inclusion of mx6_common.h.

Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
6 years agowandboard: Add board revision detection support
Fabio Estevam [Thu, 21 May 2015 22:24:05 +0000 (19:24 -0300)]
wandboard: Add board revision detection support

There are two revisions of wandboard: version B1 and C1.

Add the revision detection support, so that the correct dtb file can
be automatically loaded.

Based on the patch from Richard Hu <hakahu@gmail.com>.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-By: Vagrant Cascadian <vagrant@aikidev.net>
6 years agodrivers: usb: fsl: Return if USB_MAX_CONTROLLER_COUNT is incorrect
Nikhil Badola [Sun, 7 Jun 2015 06:58:04 +0000 (12:28 +0530)]
drivers: usb: fsl: Return if USB_MAX_CONTROLLER_COUNT is incorrect

Return if USB_MAX_CONTROLLER_COUNT hence the index of the controller
to be initialised is incorrect

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
6 years agoimage-fit: Fix compiler warning in fit_conf_print()
Hans de Goede [Fri, 29 May 2015 13:09:48 +0000 (15:09 +0200)]
image-fit: Fix compiler warning in fit_conf_print()

This fixes the following compiler warning:

In file included from tools/common/image-fit.c:1:0:
./tools/../common/image-fit.c: In function ‘fit_conf_print’:
./tools/../common/image-fit.c:1470:27: warning: logical not is only applied
 to the left hand side of comparison [-Wlogical-not-parentheses]
    (const char **)&uname) > 0;

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agosunxi: Select CONFIG_CMD_NET and CONFIG_CMD_SETEXPR by default
Hans de Goede [Wed, 3 Jun 2015 18:08:37 +0000 (20:08 +0200)]
sunxi: Select CONFIG_CMD_NET and CONFIG_CMD_SETEXPR by default

Select CONFIG_CMD_NET and CONFIG_CMD_SETEXPR by default rather then
needing to have this in every sunxi defconfig file.

This also fixes the Merrii_A80_Optimus defconfig no longer building.

Cc: Maxin B. John <maxin.john@enea.com>
Reported-by: Maxin B. John <maxin.john@enea.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: Add a proper dts file for the ga10h a33 based tablet
Hans de Goede [Tue, 2 Jun 2015 14:18:44 +0000 (16:18 +0200)]
sunxi: Add a proper dts file for the ga10h a33 based tablet

Add and use a proper dts for the ga10h a33 based tablet, as
submitted upstream.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agofdt: Documentation for a few support functions aside their prototypes
Paul Kocialkowski [Sun, 24 May 2015 10:01:53 +0000 (12:01 +0200)]
fdt: Documentation for a few support functions aside their prototypes

This instroduces comments that explain the purpose, parameters and return codes
of a few fdt support functions, that are used to fill the fdt.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agofdt: Pass the device serial number through devicetree
Paul Kocialkowski [Thu, 21 May 2015 09:27:03 +0000 (11:27 +0200)]
fdt: Pass the device serial number through devicetree

Before device-tree, the device serial number used to be passed to the kernel
using ATAGs (on ARM). This is now deprecated and all the handover to the kernel
should now be done using device-tree. Thus, this passes the serial-number
property to the kernel using the serial-number property of the root node, as
expected by the kernel.

The serial number is a string that somewhat represents the device's serial
number. It might come from some form of storage (e.g. an eeprom) and be
programmed at factory-time by the manufacturer or come from identification
bits available in e.g. the SoC.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Simon Glass <sgj@chromium.org>
6 years agosunxi: Rename Astar_MID756 to Et_q8_v1_6 to match kernel dts name
Hans de Goede [Tue, 2 Jun 2015 14:07:19 +0000 (16:07 +0200)]
sunxi: Rename Astar_MID756 to Et_q8_v1_6 to match kernel dts name

Rename the Astar_MID756 to Et_q8_v1_6 to match the kernel dts name.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: Sync dts files with the linux kernel
Hans de Goede [Tue, 2 Jun 2015 13:53:40 +0000 (15:53 +0200)]
sunxi: Sync dts files with the linux kernel

Copy over all the latest dts changes from mripard/sunxi/dt-for-4.2 ,
this gives us a proper dtsi file for the A33 rather then abusing
sun8i-a23.dtsi for this.

And this replaces our minimal (dummy) sun7i-a20-mk808c and
sun8i-a33-astar-mid756 dts files with proper ones.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: gpio: Add "allwinner,sun8i-a33-pinctrl"
Hans de Goede [Tue, 2 Jun 2015 16:09:25 +0000 (18:09 +0200)]
sunxi: gpio: Add "allwinner,sun8i-a33-pinctrl"

Add "allwinner,sun8i-a33-pinctrl", this is used by the latest upstream
linux sunxi dts files.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: Add new Mele_A1000G_quad defconfig
Hans de Goede [Mon, 1 Jun 2015 14:37:24 +0000 (16:37 +0200)]
sunxi: Add new Mele_A1000G_quad defconfig

The Mele A1000G-quad and the Mele M9 have the same PCB, sofar we've been
using the same defconfig (and dts on the kernel side) for both models.
Unfortunately this does not work for the otg controller, on the M9 this
is routed to a micro-usb connector on the outside, while as on the
A1000G-quad it is connected to an usb to sata bridge.

This commit adds a new defconfig for the Mele-A1000G-quad to allow using
different otg controller settings on the 2 boards.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: usb_phy: Swap check for disconnect threshold
Hans de Goede [Sun, 31 May 2015 17:26:54 +0000 (19:26 +0200)]
sunxi: usb_phy: Swap check for disconnect threshold

Before this commit the code for determining the disconnect threshold was
checking for sun4i or sun6i assuming that those where the exception and
that newer SoCs use a disconnect threshold of 2 like sun7i does.

But it turns out that newer SoCs actually use a disconnect threshold of 3
and sun5i and sun7i are the exceptions, so check for those instead.

Here are the settings from the various Allwinner SDK sources:
 sun4i-a10: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
 sun5i-a13: USBC_Phy_Write(usbc_no, 0x2a, 2, 2);
 sun6i-a31: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
 sun7i-a20: USBC_Phy_Write(usbc_no, 0x2a, 2, 2);
 sun8i-a23: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
 sun8i-h3:  USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
 sun9i-a80: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);

Note this commit makes no functional changes for sun4i - sun7i, and
changes the disconnect threshold for sun8i to match what Allwinner uses.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: mmc: Enable pull-up on card-detect gpio pin
Hans de Goede [Sat, 30 May 2015 14:39:10 +0000 (16:39 +0200)]
sunxi: mmc: Enable pull-up on card-detect gpio pin

On some boards we need to enable the internal pull-up te reliable detect
that no card is inserted.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agogpio: fix typos in GPIO header
Masahiro Yamada [Fri, 29 May 2015 12:57:33 +0000 (21:57 +0900)]
gpio: fix typos in GPIO header

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agosandbox: Compile test device tree when CONFIG_UT_DM is defined
Simon Glass [Sat, 23 May 2015 17:53:57 +0000 (11:53 -0600)]
sandbox: Compile test device tree when CONFIG_UT_DM is defined

A conflict between the PMIC and unit test work means that the sandbox test
device tree file is no-longer built. Fix this.

Series-to: u-boot
Series-cc: joe, prz

Change-Id: I6616428e05713e5306f848e7dd0a645dedf0934e
Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: dts: Add the real-time-clock test nodes back in
Simon Glass [Fri, 22 May 2015 21:42:17 +0000 (15:42 -0600)]
sandbox: dts: Add the real-time-clock test nodes back in

These were lost when the PMIC series was applied. Add them back so that the
tests pass again.

Reported-by: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agosandbox: dts: Sort the sandbox.dts file
Simon Glass [Fri, 22 May 2015 21:42:16 +0000 (15:42 -0600)]
sandbox: dts: Sort the sandbox.dts file

Sort this by node name for easier browsing.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: dts: Sort the test.dts file a little
Simon Glass [Fri, 22 May 2015 21:42:15 +0000 (15:42 -0600)]
sandbox: dts: Sort the test.dts file a little

There are some core test nodes near the beginning of the file which should
be grouped together. But for other nodes, let's sort them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodm: Sort the uclass IDs after the tegra/PMIC addition
Simon Glass [Fri, 22 May 2015 21:42:14 +0000 (15:42 -0600)]
dm: Sort the uclass IDs after the tegra/PMIC addition

Tidy up the sort order again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodm: pci: Allow PCI bus numbering aliases
Simon Glass [Mon, 11 May 2015 03:08:06 +0000 (21:08 -0600)]
dm: pci: Allow PCI bus numbering aliases

Commit 9cc36a2 'dm: core: Add a flag to control sequence numbering' changed
the default uclass behaviour to not support bus numbering. This is incorrect
for PCI and that commit should have enabled the flag for PCI.

Enable it so that PCI buses can be found and the 'pci' command works again.
Also add a test for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: Tidy up terminal restore
Simon Glass [Mon, 11 May 2015 03:07:27 +0000 (21:07 -0600)]
sandbox: Tidy up terminal restore

For some reason 'u-boot -D' does not restore the terminal correctly when
the 'reset' command is used. Call the terminal restore function explicitly
in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agox86: minnowmax: initialize the pin-muxing from device tree
Gabriel Huau [Tue, 12 May 2015 06:18:25 +0000 (23:18 -0700)]
x86: minnowmax: initialize the pin-muxing from device tree

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: gpio: add pinctrl support from the device tree
Gabriel Huau [Tue, 26 May 2015 05:27:37 +0000 (22:27 -0700)]
x86: gpio: add pinctrl support from the device tree

Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: baytrail: pci region 3 is not always mapped to end of ram
Andrew Bradford [Wed, 3 Jun 2015 16:37:39 +0000 (12:37 -0400)]
x86: baytrail: pci region 3 is not always mapped to end of ram

Baytrail physically maps the first 2 GB of SDRAM from 0x0 to 0x7FFFFFFF
and additional SDRAM is mapped from 0x100000000 and up.  There is a
physical memory hole from 0x80000000 to 0xFFFFFFFF for other uses.
Because of this, PCI region 3 should only try to use up to the amount of
SDRAM or 0x80000000, which ever is less.

Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Implement PIRQ routing
Bin Meng [Wed, 3 Jun 2015 01:20:06 +0000 (09:20 +0800)]
x86: qemu: Implement PIRQ routing

Support QEMU PIRQ routing via device tree on both i440fx and q35
platforms. With this commit, Linux booting on QEMU from U-Boot
has working ATA/SATA, USB and ethernet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: coreboot: Control I/O port 0xb2 writing via device tree
Bin Meng [Wed, 3 Jun 2015 01:20:05 +0000 (09:20 +0800)]
x86: coreboot: Control I/O port 0xb2 writing via device tree

Writing 0xcb to I/O port 0xb2 (Advanced Power Management Control) causes
U-Boot to hang on QEMU q35 target. We introduce a config option in the
device tree "u-boot,no-apm-finalize" under /config node if we don't want
to do that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Create separate i440fx and q35 device trees
Bin Meng [Wed, 3 Jun 2015 01:20:04 +0000 (09:20 +0800)]
x86: qemu: Create separate i440fx and q35 device trees

Although the two qemu-x86 targets (i440fx and q35) share a lot in
common, they still have something that cannot easily handled in one
single device tree). Split to create two dedicated device tree files
and make the i440fx be the default build target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: coreboot: Fix cosmetic issues
Bin Meng [Wed, 3 Jun 2015 01:20:02 +0000 (09:20 +0800)]
x86: coreboot: Fix cosmetic issues

Clean up arch/x86/cpu/coreboot.c to fix several cosmetic issues.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: kconfig: Make FSP_TEMP_RAM_ADDR depend on HAVE_FSP
Bin Meng [Mon, 1 Jun 2015 13:07:23 +0000 (21:07 +0800)]
x86: kconfig: Make FSP_TEMP_RAM_ADDR depend on HAVE_FSP

FSP_TEMP_RAM_ADDR should only be visible when HAVE_FSP is on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agotools: ifdtool: Do not write region while its size is negative
Bin Meng [Sun, 31 May 2015 06:57:35 +0000 (14:57 +0800)]
tools: ifdtool: Do not write region while its size is negative

We should ignore those regions whose size is negative. These are
typically optional and unused regions (like GbE and platform data).

Change-Id: I65ad01746144604a1dc0588b617af21f2722ebbf
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Adjust VGA initialization
Bin Meng [Mon, 25 May 2015 14:36:27 +0000 (22:36 +0800)]
x86: qemu: Adjust VGA initialization

As VGA option rom needs to run at C segment, although QEMU PAM emulation
seems to only guard E/F segments, for correctness, move VGA initialization
after PAM decode C/D/E/F segments.

Also since we already tested QEMU targets to differentiate I440FX and Q35
platforms, change to locate the VGA device via hardcoded b.d.f instead of
dynamic search for its vendor id & device id pair.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Enable legacy IDE I/O ports decode
Bin Meng [Mon, 25 May 2015 14:36:26 +0000 (22:36 +0800)]
x86: qemu: Enable legacy IDE I/O ports decode

QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix
driver does sanity check to see whether legacy ports decode is turned on.
To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Turn on legacy segments decode
Bin Meng [Sat, 23 May 2015 16:12:33 +0000 (00:12 +0800)]
x86: qemu: Turn on legacy segments decode

By default the legacy segments C/D/E/F do not decode to system RAM.
Turn on the decode via Programmable Attribute Map (PAM) registers
so that we can write configuration tables in the F segment.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Make host bridge (b.d.f=0.0.0) visible
Bin Meng [Sat, 23 May 2015 16:12:32 +0000 (00:12 +0800)]
x86: qemu: Make host bridge (b.d.f=0.0.0) visible

The default weak version of pci_skip_dev() in drivers/pci/pci_common.c
skips the host bridge (b.d.f = 0.0.0) which is actually the i440fx/q35
chipset for QEMU targets. Define CONFIG_PCI_CONFIG_HOST_BRIDGE to make
it visible in the PCI configuration space.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: fsp_support: Correct high mem comment typo
Andrew Bradford [Fri, 22 May 2015 19:11:23 +0000 (15:11 -0400)]
x86: fsp_support: Correct high mem comment typo

High mem starts at 4 GiB.

Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Do sanity test on pirq table before writing
Bin Meng [Mon, 25 May 2015 14:35:07 +0000 (22:35 +0800)]
x86: Do sanity test on pirq table before writing

If pirq_routing_table points to NULL, that means U-Boot fails to
generate the table before in create_pirq_routing_table(), so we
test it against NULL before actually writing it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: quark: Implement PIRQ routing
Bin Meng [Mon, 25 May 2015 14:35:06 +0000 (22:35 +0800)]
x86: quark: Implement PIRQ routing

Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Document irq router device tree bindings
Bin Meng [Mon, 25 May 2015 14:35:05 +0000 (22:35 +0800)]
x86: Document irq router device tree bindings

Describe all required properties needed by the irq router device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Refactor PIRQ routing support
Bin Meng [Mon, 25 May 2015 14:35:04 +0000 (22:35 +0800)]
x86: Refactor PIRQ routing support

PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Add ATA/SATA support
Bin Meng [Sat, 16 May 2015 01:33:19 +0000 (09:33 +0800)]
x86: qemu: Add ATA/SATA support

Enable legacy IDE support on the pc target and AHCI support on the
q35 target. Default configuration is to support the pc target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.h
Bin Meng [Sat, 16 May 2015 01:33:18 +0000 (09:33 +0800)]
x86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.h

Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed
by cmd_ide.c which is not common for modern x86 targets, hence remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agocmd_ide: Eliminate build warnings in atapi_inquiry()
Bin Meng [Sat, 16 May 2015 01:33:17 +0000 (09:33 +0800)]
cmd_ide: Eliminate build warnings in atapi_inquiry()

Eliminate the following build warning in atapi_inquiry():
  "warning: assignment from incompatible pointer type [enabled by default]"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agopci: Do not skip legacy IDE device configuration
Bin Meng [Sat, 16 May 2015 01:33:15 +0000 (09:33 +0800)]
pci: Do not skip legacy IDE device configuration

The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
needs to be configured.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agopci: Allow debug message output in pci_auto.c
Bin Meng [Sat, 16 May 2015 01:33:14 +0000 (09:33 +0800)]
pci: Allow debug message output in pci_auto.c

Remove the '#undef DEBUG' in pci_auto.c so that we can enable debug
message output via '-DDEBUG'.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Add graphics support
Bin Meng [Sun, 10 May 2015 23:36:30 +0000 (07:36 +0800)]
x86: qemu: Add graphics support

It turns out that QEMU x86 emulated graphic card has a built-in
option ROM which can be run perfectly with native mode by U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Move FRAMEBUFFER_SET_VESA_MODE etc to video Kconfig
Bin Meng [Sun, 10 May 2015 23:36:29 +0000 (07:36 +0800)]
x86: Move FRAMEBUFFER_SET_VESA_MODE etc to video Kconfig

CONFIG_FRAMEBUFFER_SET_VESA_MODE and CONFIG_FRAMEBUFFER_VESA_MODE
are not x86-specific, so move them to drivers/video/Kconfig and
make them depend on VIDEO_VESA driver. Some cosmetic fixes are
applied to the Kconfig help text as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agovideo: Kconfig: Make VESA driver avaiable for non-x86 boards
Bin Meng [Sun, 10 May 2015 23:36:28 +0000 (07:36 +0800)]
video: Kconfig: Make VESA driver avaiable for non-x86 boards

There is no reason to prevent CONFIG_VIDEO_VESA driver working on
non-x86 boards, so remove such limitation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>