karo-tx-uboot.git
8 years agotricorder: enable hw assisted BCH8 in SPL and u-boot
Andreas Bießmann [Tue, 2 Apr 2013 06:05:58 +0000 (06:05 +0000)]
tricorder: enable hw assisted BCH8 in SPL and u-boot

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
8 years agoomap_gpmc: add support for hw assisted BCH8
Andreas Bießmann [Fri, 5 Apr 2013 04:55:21 +0000 (04:55 +0000)]
omap_gpmc: add support for hw assisted BCH8

The kernel states:

---8<---
The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not
provide automatic error location and correction: this step is implemented using
the BCH library.
--->8---

And we do so in u-boot.

This implementation uses the same layout for BCH8 but it is fix. The current
provided layout does only work with 64 Byte OOB.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Mansoor Ahamed <mansoor.ahamed@ti.com>
Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
8 years agoomap_gpmc: change nandecc command
Andreas Bießmann [Thu, 4 Apr 2013 23:52:50 +0000 (23:52 +0000)]
omap_gpmc: change nandecc command

With uppcoming BCH support on OMAP devices we need to decide between differnt
algorithms when switching the ECC engine.  Currently we support 1-bit hammign
and 8-bit BCH on HW backend.

In order to switch between differnet ECC algorithms we need to change the
interface of omap_nand_switch_ecc() also.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
8 years agoomap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel
Andreas Bießmann [Tue, 2 Apr 2013 06:05:55 +0000 (06:05 +0000)]
omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel

This patch adds BCH8 ooblayout for NAND as provided by
0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is
currently only provided for 64 byte OOB.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
Reviewed-by: Tom Rini <trini@ti.com>
8 years agoasm/omap_gpmc.h: consolidate common defines
Andreas Bießmann [Tue, 2 Apr 2013 06:05:54 +0000 (06:05 +0000)]
asm/omap_gpmc.h: consolidate common defines

arch/arm/include/asm/arch-am33xx/omap_gpmc.h and
arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate
the common parts into a new header.

Introduce a new asm/omap_gpmc.h which defines the command part and pulls in
the architecture specific one.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
8 years agoomap3/cpu.h: add BCH support
Andreas Bießmann [Tue, 2 Apr 2013 06:05:53 +0000 (06:05 +0000)]
omap3/cpu.h: add BCH support

This patch adds the BCH result registers to register mapping for OMAP3 gpmc.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
Reviewed-by: Tom Rini <trini@ti.com>
8 years agoomap3_beagle: Flush UART3 xmit on enable if TEMT is broken
Manfred Huber [Fri, 29 Mar 2013 02:52:36 +0000 (02:52 +0000)]
omap3_beagle: Flush UART3 xmit on enable if TEMT is broken

Flush UART3 xmit on enable if TEMT is broken

On some OMAP3 devices when UART3 is configured for boot mode before SPL starts
only THRE bit is set. We have to empty the transmitter before initialization
starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT.

Signed-off-by: Manfred Huber <man.huber@arcor.de>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoam335x: Enable MMC1 clock
Tom Rini [Wed, 3 Apr 2013 08:50:01 +0000 (08:50 +0000)]
am335x: Enable MMC1 clock

We must not assume ROM has enabled the clock for MMC1.

Reported-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
8 years agopcm051: Enable DDR PHY dynamic power down bit
Lars Poeschel [Wed, 3 Apr 2013 04:37:52 +0000 (04:37 +0000)]
pcm051: Enable DDR PHY dynamic power down bit

This is done already for am335x in
59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 and also applies for pcm051.

It powers down the IO receiver when not performing read which helps
reducing the overall power consuption in low power states
(suspend/standby).

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
8 years agomusb: set MUSB speed based on CONFIG
Bin Liu [Thu, 21 Mar 2013 05:27:49 +0000 (05:27 +0000)]
musb: set MUSB speed based on CONFIG

Do not config MUSB to highspeed mode if CONFIG_USB_GADGET_DUALSPEED
is not set, in which case Ether gadget only operates in fullspeed.

Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
8 years agomusb: am335x: disable bulk split-combine feature
Bin Liu [Thu, 21 Mar 2013 05:27:48 +0000 (05:27 +0000)]
musb: am335x: disable bulk split-combine feature

On TI AM335x devices, MUSB has bulk split/combine feature enabled
in the ConfigData register, but the current MUSB driver does not
support it yet. Therefore, disable the feature for now, until the
driver adds the support.

One usecase which is broken because of this feature is that Ether
gadget stops working in Fullspeed mode (by un-defining
CONFIG_USB_GADGET_DUALSPEED)

After desabled this feature, MUSB driver send packets in proper size
(no more than 64 bytes) in Fullspeed mode.

This has been validated with Ether gadget in Fullspeed mode on AM335x
EVM.

Signed-off-by: Bin Liu <b-liu@ti.com>
8 years agologo: update to the new logo for ATMEL
Josh Wu [Thu, 28 Mar 2013 10:37:49 +0000 (18:37 +0800)]
logo: update to the new logo for ATMEL

Atmel change to new logo since 2012. This patch update the logo to new one.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 4 Apr 2013 13:44:57 +0000 (15:44 +0200)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

8 years agoexynos: change indentation of defines in cpu.h
Minkyu Kang [Mon, 1 Apr 2013 19:22:40 +0000 (19:22 +0000)]
exynos: change indentation of defines in cpu.h

Fix the indentation of some defines by tab.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 4 Apr 2013 09:49:32 +0000 (11:49 +0200)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

8 years agospi: mxc_spi: Fix ECSPI reset handling
Dirk Behme [Wed, 20 Mar 2013 22:03:44 +0000 (22:03 +0000)]
spi: mxc_spi: Fix ECSPI reset handling

Reviewing the ECSPI reset handling shows two issues:

1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg
   (ECSPIx_CONGREG) the i.MX6 technical reference manual states:

   -- cut --
   ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block
   and resets the internal logic with the exception of the ECSPI_CONREG.
   -- cut --

   Note the exception mentioned: The CONREG itself isn't reset.

   Fix this by manually writing the reset value 0 to the whole register.
   This sets the EN bit to zero, too (i.e. includes the old
   ~MXC_CSPICTRL_EN).

2. We want to reset the whole SPI block here. So it makes no sense
   to first read the old value of the CONREG and write it back, later.
   This will give us the old (historic/random) value of the CONREG back.
   And doesn't reset the CONREG.

   To get a clean CONREG after the reset of the block, too, don't use
   the old (historic/random) value of the CONREG while doing the reset.
   And read the clean CONREG after the reset.

This was found while working on a SPI boot device where the i.MX6 boot
ROM has already initialized the SPI block. The initialization by the
boot ROM might be different to what the U-Boot driver wants to configure.
I.e. we need a clean reset of SPI block, including the CONREG.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
8 years agoARM: bcm2835: fix get_timer() to return ms
Stephen Warren [Wed, 27 Mar 2013 18:43:23 +0000 (18:43 +0000)]
ARM: bcm2835: fix get_timer() to return ms

Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer
driver to conform to this.

Have the timer implementation export a custom API get_timer_us() for use
by the BCM2835 MMC API, which needs us resolution for a HW workaround.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agoi.MX6: mx6qsabrelite: README: don't pass chip-select to sf probe command
Javier Martinez Canillas [Tue, 2 Apr 2013 23:57:23 +0000 (23:57 +0000)]
i.MX6: mx6qsabrelite: README: don't pass chip-select to sf probe command

board/freescale/mx6qsabrelite/README explain a procedure to
update the SPI-NOR on the SabreLite board without Freescale
manufacturing tool but following this procedure leads to both
"sf erase" and "sf write" failing on a mx6qsabrelite board:

MX6QSABRELITE U-Boot > sf probe 1
MX6QSABRELITE U-Boot > sf erase 0 0x40000
SPI flash erase failed
MX6QSABRELITE U-Boot > sf write 0x10800000 0 0x40000
SPI flash write failed

This is because the chip-select 1 is wrong and the correct
value is 0x7300.

Since commit c1173bd0 ("sf command: allow default bus and chip selects")
the chip-select and bus arguments for the sf probe command are optional
so let's just remove it and use "sf probe" instead.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
8 years agowandboard: Remove CONFIG_SYS_FSL_USDHC_NUM
Fabio Estevam [Mon, 1 Apr 2013 16:03:38 +0000 (16:03 +0000)]
wandboard: Remove CONFIG_SYS_FSL_USDHC_NUM

CONFIG_SYS_FSL_USDHC_NUM is not used for wandboard.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx6qsabrelite: Remove duplicate 'mmc dev'
Fabio Estevam [Mon, 1 Apr 2013 16:03:37 +0000 (16:03 +0000)]
mx6qsabrelite: Remove duplicate 'mmc dev'

No need to call 'mmc dev' twice.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agowandboard: Remove duplicate 'mmc dev'
Fabio Estevam [Mon, 1 Apr 2013 16:03:36 +0000 (16:03 +0000)]
wandboard: Remove duplicate 'mmc dev'

No need to call 'mmc dev' twice.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx6: Fix get_board_rev() for the mx6 solo case
Fabio Estevam [Wed, 27 Mar 2013 07:36:55 +0000 (07:36 +0000)]
mx6: Fix get_board_rev() for the mx6 solo case

When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev()
returns 0x62xxx, which is not a value understood by the VPU
(Video Processing Unit) library in the kernel and causes the video playback to
fail.

The expected values for get_board_rev are:
0x63xxx: For mx6quad/dual
0x61xxx: For mx6dual-lite/solo

So adjust get_board_rev() accordingly and make it as weak function, so that we
do not need to define it in every mx6 board file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
8 years agomx23_olinuxino: Fix netboot console
Alexandre Pereira da Silva [Mon, 25 Mar 2013 18:23:45 +0000 (18:23 +0000)]
mx23_olinuxino: Fix netboot console

The netargs variable was referencing the non-existing variable
console_mainline. Change that to console variable instead.

Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agommc: i.MX6: fsl_esdhc: Define maximum bus width supported by a board
Abbas Raza [Mon, 25 Mar 2013 09:13:34 +0000 (09:13 +0000)]
mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by a board

Maximum bus width supported by some i.MX6 boards is not 8bit like
others. In case where both host controller and card support 8bit transfers,
they agree to communicate on 8bit interface while some boards support only 4bit interface.
Due to this reason the mmc 8bit default mode fails on these boards. To rectify this,
define maximum bus width supported by these boards (4bit). If max_bus_width is not
defined, it is 0 by default and 8bit width support will be enabled in host
capabilities otherwise host capabilities are modified accordingly.

It is tested with a MMCplus card.

Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com>
cc: stefano Babic <sbabic@denx.de>
cc: Andy Fleming <afleming@gmail.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
8 years agomx23_olinuxino: Change definitions to use spaces instead of tabs
Otavio Salvador [Sun, 24 Mar 2013 16:17:33 +0000 (16:17 +0000)]
mx23_olinuxino: Change definitions to use spaces instead of tabs

Change all "#define/ifdef<TAB>" sequences into "#define/ifdef<SPACE>".

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx25pdk: Enable imxdi RTC
Benoît Thébaudeau [Fri, 22 Mar 2013 09:30:29 +0000 (09:30 +0000)]
mx25pdk: Enable imxdi RTC

The mx25pdk board supports the i.MX25 DryIce RTC (imxdi), so enable it. This
allows to compile-test the imxdi driver in the mainline tree.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6qsabrelite: README: No need to pass 'u-boot.imx'
Fabio Estevam [Wed, 20 Mar 2013 04:07:58 +0000 (04:07 +0000)]
mx6qsabrelite: README: No need to pass 'u-boot.imx'

The u-boot.imx binary is generated by default, so no need to pass it in the
'make' line.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx28evk: Introduce a new target for saving env vars to NAND
Fabio Estevam [Thu, 7 Mar 2013 11:28:19 +0000 (11:28 +0000)]
mx28evk: Introduce a new target for saving env vars to NAND

Introduce 'mx28evk_nand' target for saving environment variables into NAND.

The mx28evk board does not come with a NAND flash populated from the
factory. It comes with an empty slot (U23), which allows the insertion of a
48-pin TSOP flash device.

Tested with a K9LBG08U0D.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx6qsabre{sd,auto}: Add boot mode select
Otavio Salvador [Sat, 16 Mar 2013 08:05:07 +0000 (08:05 +0000)]
mx6qsabre{sd,auto}: Add boot mode select

Adds support for 'bmode' command which let user to choose where to
boot from; this allows U-Boot to load system from another storage
without messing with jumpers.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx6qsabresd: Fix card detection for invalid card id case
Otavio Salvador [Sat, 16 Mar 2013 08:05:06 +0000 (08:05 +0000)]
mx6qsabresd: Fix card detection for invalid card id case

This changes the code so in case an unkown value is passed it will
return as invalid.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx6qsabresd: Document the mapping of USDHC[2-4]
Otavio Salvador [Sat, 16 Mar 2013 08:05:05 +0000 (08:05 +0000)]
mx6qsabresd: Document the mapping of USDHC[2-4]

This documents the SD card identifier so it is easier for user to spot
which card number will be used, if need.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agoExynos: pwm: Remove dead code of function exynos5_get_pwm_clk
Akshay Saraswat [Thu, 28 Mar 2013 04:32:24 +0000 (04:32 +0000)]
Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk

As we shall now be using clock_get_periph_rate function.
We find no reason for keeping code in function exynos5_get_pwm_clk.
Hence, removing it.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: pwm: Use generic api to get pwm clk freq
Padmavathi Venna [Thu, 28 Mar 2013 04:32:23 +0000 (04:32 +0000)]
Exynos: pwm: Use generic api to get pwm clk freq

Use generic api to get the pwm clock frequency

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: clock: Correct pwm source clk selection
Padmavathi Venna [Thu, 28 Mar 2013 04:32:22 +0000 (04:32 +0000)]
Exynos: clock: Correct pwm source clk selection

MPLL is selected as the source clk of pwm by default

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: clock: Add generic api to get the clk freq
Padmavathi Venna [Thu, 28 Mar 2013 04:32:21 +0000 (04:32 +0000)]
Exynos: clock: Add generic api to get the clk freq

Add generic api to get the frequency of the required peripherial. This
API gets the source clock frequency and returns the required frequency
by dividing with first and second dividers based on the requirement.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: Add peripherial id for pwm
Padmavathi Venna [Sun, 31 Mar 2013 18:42:24 +0000 (18:42 +0000)]
Exynos: Add peripherial id for pwm

Add peripherial id for pwm inorder to support
generic api to get the clk frequency

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: Tidy up the pwm_config function in the exynos pwm driver
Gabe Black [Thu, 28 Mar 2013 04:32:20 +0000 (04:32 +0000)]
Exynos: Tidy up the pwm_config function in the exynos pwm driver

Some small fixes in the exynos pwm driver:

1. NS_IN_HZ is non-sensical since these are not compatible units. This
constant actually describes the number of nanoseconds in a second. Renamed it
to NS_IN_SEC. Also dropped the unnecessary parenthesis.
2. The variable "period" is not used to hold a period, it's used to hold a
frequency. Renamed it to "frequency".
3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if
which checks that condition will never execute. Also, there should be no
problem if the pwm never switches, so there's no reason to subtract one from
tcmp and therefore no reason to compare it against zero. Removed both ifs. If
they weren't removed, tcmp should be a signed value.
4. Add a check for a 0 period.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: Avoid a divide by zero by specifying a non-zero period for pwm 4
Gabe Black [Thu, 28 Mar 2013 04:32:19 +0000 (04:32 +0000)]
Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4

The pwm_config function in the exynos pwm driver divides by its period
period parameter. A function was calling pwm_config with a 0ns period and a
0ns duty cycle. That doesn't actually make any sense physically, and results
in a divide by zero in the driver. This change changes the parameters to be a
100000ns period and duty cycle.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: pwm: Fix two bugs in the exynos pwm configuration code
Gabe Black [Thu, 28 Mar 2013 04:32:18 +0000 (04:32 +0000)]
Exynos: pwm: Fix two bugs in the exynos pwm configuration code

First, the "div" value was being used incorrectly to compute the frequency of
the PWM timer. The value passed in is a constant which reflects the value
that would be found in a configuration register, 0 to 4. That should
correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was
being used instead.

Second, the reset value of the timers were being calculated to give an overall
frequency, thrown out, and set to a maximum value. This was done so that PWM 4
could be used as the system clock by counting down from a high value, but it
was applied indiscriminantly. It should at most be applied only to PWM 4.

This change also takes the opportunity to tidy up the pwm_init function.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: Add timer_get_us function
Che-Liang Chiou [Thu, 28 Mar 2013 04:32:17 +0000 (04:32 +0000)]
Exynos: Add timer_get_us function

timer_get_us returns the time in microseconds since a certain reference
point of history.  However, it does not guarantee to return an accurate
time after a long period; instead, it wraps around (that is, the
reference point is reset to some other point of history) after some
periods. The frequency of wrapping around is about an hour (or 2^32
microseconds).

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: Change get_timer() to work correctly
Simon Glass [Thu, 28 Mar 2013 04:32:16 +0000 (04:32 +0000)]
Exynos: Change get_timer() to work correctly

At present get_timer() does not return sane values. It should count up
smoothly in milliscond intervals.

We can change the PWM to count down at 1MHz, providing a resolution
of 1us and a range of about an hour between required get_timer() calls.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos5: config: enable time command
Akshay Saraswat [Thu, 28 Mar 2013 04:32:15 +0000 (04:32 +0000)]
Exynos5: config: enable time command

This patch enables time command.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos5: clock: Fix a typo bug in exynos clock init
Akshay Saraswat [Thu, 21 Mar 2013 02:13:13 +0000 (02:13 +0000)]
Exynos5: clock: Fix a typo bug in exynos clock init

We intended to clear the bits of CLK_SRC_TOP2 register, instead we were
writing on the reserved bits of src_core1 register. Since the default
value of clk_src_top2 register were itself zero, this typo was not
creating any big issue. But it is better to fix this error for better
readability of the code.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos: config: Enable hash command
Akshay Saraswat [Wed, 20 Mar 2013 21:00:59 +0000 (21:00 +0000)]
Exynos: config: Enable hash command

This enables hash command.

Tested with command "hash sha256 0x40008000 0x2B 0x40009000".
Used mm and md to write a standard string to memory location
0x40008000 and ran the above command to verify the output.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agogen: Add sha h/w acceleration to hash
Akshay Saraswat [Wed, 20 Mar 2013 21:00:58 +0000 (21:00 +0000)]
gen: Add sha h/w acceleration to hash

Adding H/W acceleration support to hash which can be used
to test SHA 256 hash algorithm.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoExynos: config: Enable ACE HW for SHA 256 for Exynos
Akshay Saraswat [Wed, 20 Mar 2013 21:00:57 +0000 (21:00 +0000)]
Exynos: config: Enable ACE HW for SHA 256 for Exynos

This enables SHA 256 for exynos.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoExynos: Add hardware accelerated SHA256 and SHA1
Akshay Saraswat [Wed, 20 Mar 2013 21:00:56 +0000 (21:00 +0000)]
Exynos: Add hardware accelerated SHA256 and SHA1

SHA-256 and SHA-1 accelerated using ACE hardware.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoExynos: clock: Fix a bug in PLL lock check condition
Akshay Saraswat [Fri, 15 Mar 2013 02:29:09 +0000 (02:29 +0000)]
Exynos: clock: Fix a bug in PLL lock check condition

The condition for testing of PLL getting locked was incorrect. Rectify
this error in this patch.

Reported-by: Alexei Fedorov <alexie.fedorov@arm.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agospl:falcon:trats: Fix SPL image size computing.
Przemyslaw Marczak [Tue, 12 Mar 2013 03:41:49 +0000 (03:41 +0000)]
spl:falcon:trats: Fix SPL image size computing.

"spl_imgsize" was set as decimal variable by "setexpr"
and this causes wrong image size written by "ext4write".
Preset this val with "0x" prefix allow to fix this issue.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agospi: exynos: Fix compiler warnings for non-dt systems
Vivek Gautam [Tue, 5 Mar 2013 03:49:57 +0000 (03:49 +0000)]
spi: exynos: Fix compiler warnings for non-dt systems

Enclosing process_nodes() and spi_get_config() inside
CONFIG_OF_CONTROL, since they are compiled only for DT systems.

This fixes following warning:
exynos_spi.c:391:12: warning: 'process_nodes' defined but not used [-Wunused-function]

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoSMDK5250: Fix compiler warning for non-dt systems
Vivek Gautam [Tue, 5 Mar 2013 03:49:56 +0000 (03:49 +0000)]
SMDK5250: Fix compiler warning for non-dt systems

Compiling for non-dt systems gives folowing warning:
smdk5250.c: In function 'board_eth_init':
smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable]

Declare variable 'node' only for dt enabled systems to remove this
warning.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoMerge branch 'u-boot/master' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 28 Mar 2013 17:50:01 +0000 (18:50 +0100)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
drivers/spi/tegra20_sflash.c
include/fdtdec.h
lib/fdtdec.c

8 years agoarmv7: do not relocate _start twice
Vincent Stehlé [Fri, 15 Mar 2013 06:54:00 +0000 (06:54 +0000)]
armv7: do not relocate _start twice

The _start symbol is already relocated, so do not add the relocation the second
time in c_runtime_cpu_setup.

This fixes e.g. the abort exception handling path, which ended in double fault
due to bad address in VBAR.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
Reported-by: Lubomir Popov <lpopov@mm-sol.com>
8 years agoARM: mmu: Set domain permissions to client access
R Sricharan [Mon, 4 Mar 2013 20:04:45 +0000 (20:04 +0000)]
ARM: mmu: Set domain permissions to client access

 The 'XN' execute never bit is set in the pagetables. This will
 prevent speculative prefetches to non executable regions. But the
 domain permissions are set as master in the DACR register.
 So the pagetable attribute for 'XN' is not effective. Change the
 permissions to client.

 This fixes lot of speculative prefetch aborts seen on OMAP5
 secure devices.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Tested-by: Vincent Stehle <v-stehle@ti.com>
Cc: Vincent Stehle <v-stehle@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
8 years agoARM: mmu: Introduce weak dram_bank_setup function
R Sricharan [Mon, 4 Mar 2013 20:04:44 +0000 (20:04 +0000)]
ARM: mmu: Introduce weak dram_bank_setup function

Introduce a weak version of dram_bank_setup function
to allow a platform specific function.

This is used in the subsequent patch to setup dram region
without 'XN' attribute in order to enable the region
under client permissions.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Vincent Stehle <v-stehle@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
8 years agoARM: cache: declare set_section_dcache
Vincent Stehlé [Mon, 4 Mar 2013 20:04:43 +0000 (20:04 +0000)]
ARM: cache: declare set_section_dcache

We declare the set_section_dcache function globally in the cache header, for
later use by e.g. machine specific code.

Signed-off-by: Vincent Stehlé <v-stehle <at> ti.com>
Cc: Tom Rini <trini <at> ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
8 years agoapx4devkit: change maintainer
Veli-Pekka Peltola [Wed, 20 Mar 2013 09:08:10 +0000 (09:08 +0000)]
apx4devkit: change maintainer

As I am no longer working for Bluegiga I will pass apx4devkit maintenance
to Lauri.

Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@iki.fi>
Acked-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
8 years agoimage: Add support for Plan 9
Steven Stallion [Wed, 20 Mar 2013 06:31:35 +0000 (06:31 +0000)]
image: Add support for Plan 9

Signed-off-by: Steven Stallion <sstallion@gmail.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
8 years agocmd_ext4: BREAK and correct ext4write parameter order
Tom Rini [Wed, 20 Mar 2013 04:21:38 +0000 (04:21 +0000)]
cmd_ext4: BREAK and correct ext4write parameter order

The ext4write command was taking the in-memory address and filename path
in reverse order from the rest of the filesystem read and write
commands.  This corrects the order to be the same as fatload, etc.

Signed-off-by: Tom Rini <trini@ti.com>
8 years ago.checkpatch.conf: ignore udelay->usleep_range warnings
Matt Porter [Fri, 15 Mar 2013 10:43:48 +0000 (10:43 +0000)]
.checkpatch.conf: ignore udelay->usleep_range warnings

usleep_range() is a Linux facility, ignore it when udelay()
is encountered.

Signed-off-by: Matt Porter <mporter@ti.com>
8 years agocheckpatch.pl: Add 'debug' to the list of logFunctions
Tom Rini [Thu, 14 Mar 2013 05:36:13 +0000 (05:36 +0000)]
checkpatch.pl: Add 'debug' to the list of logFunctions

While the kernel mainly uses pr_debug(...), etc, for debug messages, we
use debug(...).  Add this to the list of logFunctions so that they are
correctly checked (and not warned against) for long string literals.

Signed-off-by: Tom Rini <trini@ti.com>
8 years agoenv_callback: Mark find_env_callback as static
Tom Rini [Tue, 12 Mar 2013 06:16:50 +0000 (06:16 +0000)]
env_callback: Mark find_env_callback as static

This is not called outside of env_callback.c so mark static, remove from
<env_callback.h>

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoMAKEALL: allow regex matches for -s option
Stephen Warren [Tue, 5 Mar 2013 11:15:01 +0000 (11:15 +0000)]
MAKEALL: allow regex matches for -s option

This allows:

MAKEALL -s tegra

to replace:

MAKEALL -s tegra20 -s tegra30 -s tegra114

The following also works:

MAKEALL -s tegra -s omap

Signed-off-by: Stephen Warren <swarren@nvidia.com>
8 years agoSMDK5250: Use statically defined structures only in non DT case
Ajay Kumar [Thu, 21 Feb 2013 23:53:09 +0000 (23:53 +0000)]
SMDK5250: Use statically defined structures only in non DT case

Since we have DT support in exynos_fb and exynos_dp drivers now,
we need not define any static structure or platform data related to
display in the board file smdk5250.c.
So, we place the already existing structures inside #ifndef CONFIG_OF_CONTROL block.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoSMDK5250: Add device node for DP
Ajay Kumar [Thu, 21 Feb 2013 23:53:08 +0000 (23:53 +0000)]
SMDK5250: Add device node for DP

Add DT bindings for DP supporting an eDP panel of size 2560x1600.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS5: Add device node for DP
Ajay Kumar [Thu, 21 Feb 2013 23:53:07 +0000 (23:53 +0000)]
EXYNOS5: Add device node for DP

Add DT node and bindings documentaion for DP.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agovideo: exynos_dp: Add function to parse DP DT node
Ajay Kumar [Thu, 21 Feb 2013 23:53:06 +0000 (23:53 +0000)]
video: exynos_dp: Add function to parse DP DT node

Add function to parse the required platform data fron DP DT node
and fill the edp_info structure.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS5: FDT: Add compatible strings for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:05 +0000 (23:53 +0000)]
EXYNOS5: FDT: Add compatible strings for FIMD

Add required compatible information for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agovideo: exynos_dp: Make dp_regs global
Ajay Kumar [Thu, 21 Feb 2013 23:53:04 +0000 (23:53 +0000)]
video: exynos_dp: Make dp_regs global

dp_regs variable was redundantly defined across all the functions in
the driver even though it contains just the same address. We make it
global and initialize it once using exynos_dp_set_base_addr().
>From then on, other funtions can use the address stored in the global variable.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoSMDK5250: Add device node for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:03 +0000 (23:53 +0000)]
SMDK5250: Add device node for FIMD

Add DT bindings for FIMD supporting an eDP panel of size 2560x1600.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS5: Add device node for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:02 +0000 (23:53 +0000)]
EXYNOS5: Add device node for FIMD

Add DT node and bindings documentation for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agovideo: exynos_fb: add DT support for FIMD driver
Ajay Kumar [Thu, 21 Feb 2013 23:53:01 +0000 (23:53 +0000)]
video: exynos_fb: add DT support for FIMD driver

Add function to parse FIMD data from device tree.
The driver still supports non-DT case.
Define panel_info statically in some file if you are not using DT.
If you have defined DT node for FIMD, panel_info will be filled
using the bindings of FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS: FDT: Add compatible strings for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:00 +0000 (23:53 +0000)]
EXYNOS: FDT: Add compatible strings for FIMD

Add required compatible information for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agovideo: exynos_fb: Make fimd_ctrl global
Ajay Kumar [Thu, 21 Feb 2013 23:52:59 +0000 (23:52 +0000)]
video: exynos_fb: Make fimd_ctrl global

fimd_ctrl variable was redundantly defined across all the functions in
the driver even though it contains just the same address. We make it
global and initialize it in exynos_fimd_lcd_init. From then on, other
funtions can use the data in the global variable.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agovideo: exynos_dp: Remove callbacks from the driver
Ajay Kumar [Thu, 21 Feb 2013 23:52:58 +0000 (23:52 +0000)]
video: exynos_dp: Remove callbacks from the driver

Replaced the functionality of callbacks by using a standard set of functions.
Instead of implementing and hooking up a callback, put the same code in one of
the standard set of functions by overriding it.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agovideo: exynos_fb: Remove callbacks from the driver
Ajay Kumar [Thu, 21 Feb 2013 23:52:57 +0000 (23:52 +0000)]
video: exynos_fb: Remove callbacks from the driver

Replaced the functionality of callbacks by using a standard set of functions.
Instead of implementing and hooking up a callback, put the same code in one of
the standard set of functions by overriding it.

This patch is tested only on SMDK5250.
For Trats and universal_c210 board, it is only compile tested.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS5: Add L2 Cache Support.
Rajeshwari Shinde [Thu, 29 Nov 2012 20:29:35 +0000 (20:29 +0000)]
EXYNOS5: Add L2 Cache Support.

This patch set adds L2 Cache Support to EXYNOS.

Signed-off-by: Arun Mankuzhi <arun.m@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 26 Mar 2013 09:40:13 +0000 (10:40 +0100)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

8 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 26 Mar 2013 08:51:09 +0000 (09:51 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

8 years agoTegra114: MMC: Enable DT MMC driver support for Tegra114 Dalmore boards
Tom Warren [Mon, 18 Mar 2013 21:52:26 +0000 (14:52 -0700)]
Tegra114: MMC: Enable DT MMC driver support for Tegra114 Dalmore boards

Tested on my Dalmore E1611 board, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20/30).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agoTegra114: MMC: Add SD bus power-rail init routine
Tom Warren [Mon, 18 Mar 2013 21:51:20 +0000 (14:51 -0700)]
Tegra114: MMC: Add SD bus power-rail init routine

T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agoTegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
Tom Warren [Mon, 18 Mar 2013 21:47:55 +0000 (14:47 -0700)]
Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table

SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup
before the MMC driver is added.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agoTegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)
Tom Warren [Mon, 18 Mar 2013 21:46:46 +0000 (14:46 -0700)]
Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)

Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra114: dalmore: config: enable SPI
Allen Martin [Sat, 16 Mar 2013 18:58:14 +0000 (18:58 +0000)]
tegra114: dalmore: config: enable SPI

Turn on SPI in dalmore config file

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra114: add SPI driver
Allen Martin [Sat, 16 Mar 2013 18:58:13 +0000 (18:58 +0000)]
tegra114: add SPI driver

Add driver for tegra114 SPI controller.  This controller is not
compatible with either the tegra20 or tegra30 controllers, so it
requires a new driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra114: dalmore: fdt: enable dalmore SPI controller
Allen Martin [Sat, 16 Mar 2013 18:58:12 +0000 (18:58 +0000)]
tegra114: dalmore: fdt: enable dalmore SPI controller

Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra114: fdt: add SPI blocks
Allen Martin [Sat, 16 Mar 2013 18:58:11 +0000 (18:58 +0000)]
tegra114: fdt: add SPI blocks

Add nodes for t114 SPI controller hardware

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra114: fdt: add apbdma block
Allen Martin [Sat, 16 Mar 2013 18:58:10 +0000 (18:58 +0000)]
tegra114: fdt: add apbdma block

Add node for apbdma controller hardware.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra114: fdt: add compatible string for tegra114 SPI ctrl
Allen Martin [Sat, 16 Mar 2013 18:58:09 +0000 (18:58 +0000)]
tegra114: fdt: add compatible string for tegra114 SPI ctrl

Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agosf: winbond: add W25Q32DW
Allen Martin [Sat, 16 Mar 2013 18:58:08 +0000 (18:58 +0000)]
sf: winbond: add W25Q32DW

Add support for Winbond W25Q32DW 32Mbit part

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agospi: add common fdt SPI driver interface
Allen Martin [Sat, 16 Mar 2013 18:58:07 +0000 (18:58 +0000)]
spi: add common fdt SPI driver interface

Add a common interface to fdt based SPI drivers.  Each driver is
represented by a table entry in fdt_spi_drivers[].  If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra20: spi: move fdt probe to spi_init
Allen Martin [Sat, 16 Mar 2013 18:58:06 +0000 (18:58 +0000)]
tegra20: spi: move fdt probe to spi_init

Make the tegra20 SPI driver similar to the tegra30 (and soon to be
tegra114) SPI drivers in preparation of common fdt SPI driver front
end.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra: spi: pull register structs out of headers
Allen Martin [Sat, 16 Mar 2013 18:58:05 +0000 (18:58 +0000)]
tegra: spi: pull register structs out of headers

Move register structs from headers into .c files and use common name.
This is in preparation of making common fdt front end for SPI
drivers.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra: spi: remove non fdt support
Allen Martin [Sat, 16 Mar 2013 18:58:04 +0000 (18:58 +0000)]
tegra: spi: remove non fdt support

Remove non fdt support from tegra20 and tegra30 SPI drivers in
preparation of new common fdt based SPI driver front end.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra: spi: rename tegra SPI drivers
Allen Martin [Sat, 16 Mar 2013 18:58:03 +0000 (18:58 +0000)]
tegra: spi: rename tegra SPI drivers

Rename tegra SPI drivers to tegra20_flash and tegra20_slink in
preparation for commonization and addition of tegra114_spi.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotegra: remove support for UART SPI switch
Allen Martin [Sat, 16 Mar 2013 18:58:02 +0000 (18:58 +0000)]
tegra: remove support for UART SPI switch

This feature was only used for tegra20 seaboard that had a pinmux
conflict on the SPI pins.  These boards were never manufactured, so
remove this support to clean up SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Sun, 24 Mar 2013 16:52:22 +0000 (17:52 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

8 years agommc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be used
Peter Korsgaard [Thu, 21 Mar 2013 04:00:04 +0000 (04:00 +0000)]
mmc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be used

Gets rid of warnings from omap_gpio:
ERROR : check_gpio: invalid GPIO -1

(and undefined behaviour as the -1 error code is interpreted as gpio value)

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
8 years agommc: mmc_getcd/getwp: use sensible defaults
Peter Korsgaard [Thu, 21 Mar 2013 04:00:03 +0000 (04:00 +0000)]
mmc: mmc_getcd/getwp: use sensible defaults

Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Add braces around first if test in each case to fix warning]
Signed-off-by: Tom Rini <trini@ti.com>
8 years agoarm: Correct CONFIG_STANDALONE_LOAD_ADDR for AM33XX/OMAP* platforms
Tom Rini [Thu, 14 Mar 2013 06:49:04 +0000 (06:49 +0000)]
arm: Correct CONFIG_STANDALONE_LOAD_ADDR for AM33XX/OMAP* platforms

All of these platforms have memory starting at 0x80000000, so this is
the correct CONFIG_STANDALONE_LOAD_ADDR for all of them.

Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>