karo-tx-uboot.git
7 years agoARM: DRA72x: volt: Update the pmic offsets
Keerthy [Thu, 15 May 2014 05:38:39 +0000 (11:08 +0530)]
ARM: DRA72x: volt: Update the pmic offsets

TPS65917 is used in DRA722 evm. Update the address offsets accordingly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Tom Rini <trini@ti.com>
7 years agoARM: DRA72x: Add Silicon ID support
Lokesh Vutla [Thu, 15 May 2014 05:38:38 +0000 (11:08 +0530)]
ARM: DRA72x: Add Silicon ID support

Add silicon ID code for DRA722 silicon.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
7 years agoARM: omap: merge GPMC initialization code for all platform
pekon gupta [Thu, 8 May 2014 16:13:47 +0000 (21:43 +0530)]
ARM: omap: merge GPMC initialization code for all platform

GPMC controller on TI's OMAP SoC is general purpose controller to interface
with different types of external devices like;
 - parallel NOR flash
 - parallel NAND flash
 - OneNand flash
 - SDR RAM
 - Ethernet Devices like LAN9220

Though GPMC configurations may be different for each platform depending on
clock-frequency and external device interfacing with controller. But
initialization sequence remains common across all platfoms.

Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c
files into single omap-common/mem-common.c

However, actual platforms specific register config values are still sourced
from corresponding platform specific headers like;
 AM33xx: arch/arm/include/asm/arch-am33xx/mem.h
 OMAP3:  arch/arm/include/asm/arch-omap3/mem.h
 OMAP4:  arch/arm/include/asm/arch-omap4/mem.h
 OMAP4:  arch/arm/include/asm/arch-omap5/mem.h

Also, CONFIG_xx passed by board-profile decide config for which set of macros
need to be used for initialization
 CONFIG_NAND:    initialize GPMC for NAND device
 CONFIG_NOR:     initialize GPMC for NOR device
 CONFIG_ONENAND: initialize GPMC for ONENAND device

Signed-off-by: Pekon Gupta <pekon@ti.com>
[trini: define GPMC_SIZE_256M for omap3]
Signed-off-by: Tom Rini <trini@ti.com>
7 years agoARM: omap5: add platform specific info for GPMC and ELM controllers
pekon gupta [Thu, 8 May 2014 16:13:46 +0000 (21:43 +0530)]
ARM: omap5: add platform specific info for GPMC and ELM controllers

This patch moves platform specific information for GPMC and ELM controller
into separate header files, so that any derivative devices do not mess other
header files.

Platform specific information added into arch-xx/../hardware.h
 - CPU related platform specific details like base-address of GPMC and ELM

Platform specific information added into arch-xx/../mem.h
 - Generic configs for GPMC and ELM initialization.
 - Hardware parameters or constrains specific to GPMC and ELM IP like;
   number of max number of chip-selects available

Signed-off-by: Pekon Gupta <pekon@ti.com>
7 years agoARM: omap4: add platform specific info for GPMC and ELM controllers
pekon gupta [Thu, 8 May 2014 16:13:45 +0000 (21:43 +0530)]
ARM: omap4: add platform specific info for GPMC and ELM controllers

This patch moves platform specific information for GPMC and ELM controller
into separate header files, so that any derivative devices do not mess other
header files.

Platform specific information added into arch-xx/../hardware.h
 - CPU related platform specific details like base-address of GPMC and ELM

Platform specific information added into arch-xx/../mem.h
 - Generic configs for GPMC and ELM initialization.
 - Hardware parameters or constrains specific to GPMC and ELM IP like;
   number of max number of chip-selects available

Signed-off-by: Pekon Gupta <pekon@ti.com>
7 years agoomap3: overo: Use common configurations for Overo
Ash Charles [Wed, 21 May 2014 21:04:55 +0000 (14:04 -0700)]
omap3: overo: Use common configurations for Overo

Clean-up the board configuration file for the Gumstix Overo board by
including common omap3 definitions from ti_omap3_common.h as suggested
here [1].

[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/185960

Signed-off-by: Ash Charles <ashcharles@gmail.com>
Conflicts:
include/configs/omap3_overo.h

7 years agoAllow overo to boot with device tree
Ash Charles [Wed, 21 May 2014 21:04:54 +0000 (14:04 -0700)]
Allow overo to boot with device tree

Update the board configuration for Gumstix Overo. In particular,
add support for zImage and DTB files on boot.

Signed-off-by: Ash Charles <ashcharles@gmail.com>
7 years agoOMAP3: overo: add some Gumstix expansion boards
Ash Charles [Wed, 21 May 2014 21:04:53 +0000 (14:04 -0700)]
OMAP3: overo: add some Gumstix expansion boards

Add EEPROM ID switches for Alto35, Arbor43C, Stagecoach, Thumbo, and
Turtlecore Gumstix Overo expansion boards.

Signed-off-by: Ash Charles <ash@gumstix.com>
7 years agoAdd Board Revision for Wireless chip
Ash Charles [Wed, 21 May 2014 21:04:52 +0000 (14:04 -0700)]
Add Board Revision for Wireless chip

Gumstix Overo COMs with board revision 0x4 use a different Wifi and
Bluetooth module: Wi2Wi's W2CBW0015.  No other code changes are required
in u-boot---just handling of this particular board revision.

Signed-off-by: Ash Charles <ashcharles@gmail.com>
7 years agoarm: omap3: Fix omap3_overo SPL boot hangup
Ash Charles [Wed, 21 May 2014 21:04:51 +0000 (14:04 -0700)]
arm: omap3: Fix omap3_overo SPL boot hangup

Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on Overo. Since some gpio inputs are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.

Signed-off-by: Ash Charles <ashcharles@gmail.com>
7 years agoOMAP3: overo: eliminate hard-coded partition offsets
Ash Charles [Wed, 21 May 2014 21:04:50 +0000 (14:04 -0700)]
OMAP3: overo: eliminate hard-coded partition offsets

The linux kernel is at nand0,3 using the current layout, but is best
accessed through the partition label "linux".  Since CONFIG_CMD_MTDPARTS is
defined the CONFIG_JFFS2 settings are unreferenced; use "setenv partition
rootfs" to set the default mtd partition for jffs2.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
7 years agoOMAP3: overo: increase linux partition to 8 MiB
Peter A. Bigot [Wed, 21 May 2014 21:04:49 +0000 (14:04 -0700)]
OMAP3: overo: increase linux partition to 8 MiB

Linux kernel at version 3.5 is about 3.5 MiB; test kernels for 3.10 exceed 4
MiB.  Prepare for future upgrades by increasing the NAND partition now.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
7 years agoOMAP3: overo: add command support for mtd and ubi
Ash Charles [Wed, 21 May 2014 21:04:48 +0000 (14:04 -0700)]
OMAP3: overo: add command support for mtd and ubi

The NAND linux partition format default was changed from jffs2 to ubi in
254973e6df0e48f1a72b67905185c774dcd9f394 but the corresponding commands were
not enabled.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
7 years agoomap: overo: allow the use of a plain text env file instead boot scripts
Ash Charles [Wed, 21 May 2014 21:04:47 +0000 (14:04 -0700)]
omap: overo: allow the use of a plain text env file instead boot scripts

Adapted from d70f5480 described below.

    commit d70f54808dfa83b574e1239c3eccbcf3317343e1
    Author: Javier Martinez Canillas <javier@dowhile0.org>
    Date:   Mon Jan 7 03:51:20 2013 +0000

    omap4: allow the use of a plain text env file instead boot scripts

    For production systems it is better to use script images since
    they are protected by checksums and carry valuable information like
    name and timestamp. Also, you can't validate the content passed to
    env import.

    But for development, it is easier to use the env import command and
    plain text files instead of script-images.

    Since both OMAP4 supported boards (Panda and TI SDP4430) are used
    primarily for development, this patch allows U-Boot to load env var
    from a text file in case that an boot.scr script-image is not present.

    The variable uenvcmd (if existent) will be executed (using run) after
    uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence
    will be started.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
7 years agoMerge remote-tracking branch 'u-boot/master'
Albert ARIBAUD [Tue, 20 May 2014 08:05:42 +0000 (10:05 +0200)]
Merge remote-tracking branch 'u-boot/master'

Conflicts:
boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).

7 years agoboards.cfg: reformat
Albert ARIBAUD [Tue, 20 May 2014 07:31:40 +0000 (09:31 +0200)]
boards.cfg: reformat

Apply command "tools/reformat.py -i -d '-' -s 8 <boards.cfg
>boards0.cfg && mv boards0.cfg boards.cfg" in preparation of
pull request from ARM to main tree.

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Fri, 16 May 2014 22:30:33 +0000 (18:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

7 years agopowerpc/srio-pcie-boot: Adjust addresses for SRIO/PCIE boot
Liu Gang [Thu, 15 May 2014 06:30:34 +0000 (14:30 +0800)]
powerpc/srio-pcie-boot: Adjust addresses for SRIO/PCIE boot

The new 768KB u-boot image size requires changes for
SRIO/PCIE boot. These addresses need to be updated to
appropriate locations.

The updated addresses are used to configure the SRIO/PCIE
inbound windows for the boot, and they must be aligned
with the window size based on the SRIO/PCIE modules requirement.
So for the 768KB u-boot image, the inbound window cannot be set
with 0xfff40000 base address and 0xc0000 size, it should be
extended to 1MB size and the base address can be aligned with
the size.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agompc85xx: configs: remove c=ffe from default environment
Kim Phillips [Thu, 15 May 2014 00:33:45 +0000 (19:33 -0500)]
mpc85xx: configs: remove c=ffe from default environment

AFAICT, c=ffe does nothing and was a typo from the original commit
d17123696c6180ac8b74fbd318bf14652623e982 "powerpc/p4080: Add support
for the P4080DS board" and just kept on getting duplicated
in subsequently added board config files.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Edward Swarthout <ed.swarthout@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agoboard/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPL
Prabhakar Kushwaha [Thu, 15 May 2014 11:13:12 +0000 (16:43 +0530)]
board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPL

In the earlier patches, the SPL/TPL fraamework was introduced.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.

For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.

This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/mpc85xx: SECURE BOOT- corrected CSPR settings for BSC9132QDS NAND
Aneesh Bansal [Wed, 14 May 2014 06:15:15 +0000 (11:45 +0530)]
powerpc/mpc85xx: SECURE BOOT- corrected CSPR settings for BSC9132QDS NAND

In case of secure boot from NAND, CSPR and FTIM settings are
same as non-secure NAND boot. CSPR0 is configured as NAND and
CSPR1 is configured as NOR.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agompc85xx/p1020:Define number of USB controllers used on P1020RDB-PD platform
ramneek mehresh [Tue, 13 May 2014 10:06:07 +0000 (15:36 +0530)]
mpc85xx/p1020:Define number of USB controllers used on P1020RDB-PD platform

P1020 SoC which has two USB controllers, but only first one is used
on this platform.

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agodrivers/usb : Define usb control register mask for w1c bits
Nikhil Badola [Thu, 8 May 2014 11:35:26 +0000 (17:05 +0530)]
drivers/usb : Define usb control register mask for w1c bits

Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/mpc85xx: Added B4460 support
Shaveta Leekha [Wed, 7 May 2014 09:13:23 +0000 (14:43 +0530)]
powerpc/mpc85xx: Added B4460 support

B4460 differs from B4860 only in number of CPU cores,
hence used existing support for B4860.
B4460 has 2 PPC cores whereas B4860 has 4 PPC cores.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/85xx: Add T4160RDB board support
Chunhe Lan [Wed, 7 May 2014 02:56:18 +0000 (10:56 +0800)]
powerpc/85xx: Add T4160RDB board support

T4160RDB shares the same platform as T4240RDB. T4160 is
a low power version of T4240, with the eight e6500 cores,
two DDR3 controllers, and same peripheral bus interfaces.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agofsl/pci: Add workaround for erratum A-005434
Chunhe Lan [Wed, 7 May 2014 02:50:20 +0000 (10:50 +0800)]
fsl/pci: Add workaround for erratum A-005434

By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are
mapped to 0xF, which is local memory. But for BSC9132, 0xF
is CCSR, 0x0 is local memory.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/t104xrdb: Toggle deep sleep management signals after resume
Tang Yuantian [Wed, 7 May 2014 02:25:06 +0000 (10:25 +0800)]
powerpc/t104xrdb: Toggle deep sleep management signals after resume

T104xrdb has several sleep management signals that are used for deep
sleep. They are enabled by OS to enter deep sleep and should be
disabled by u-boot when cores wake up.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agoboard/freescale: Move CRC32 offset in NXID v1 data format
Ebony Zhu [Fri, 25 Apr 2014 23:38:44 +0000 (18:38 -0500)]
board/freescale: Move CRC32 offset in NXID v1 data format

According to AN3638, CRC of NXID v1 is at the end of the
256-byte I2C memory. The wrong CRC32 offset prevents Uboot
from reading system information from EEPROM. No NXID v0 is
being used on Freescale boards.

Signed-off-by: Ebony Zhu <b45385@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agonet: phy/vitesse: Add support for VSC8664 phy module
Chunhe Lan [Wed, 16 Apr 2014 08:40:52 +0000 (16:40 +0800)]
net: phy/vitesse: Add support for VSC8664 phy module

This patch adds support for VSC8664 PHY module which can
be found on Freescale's T4240RDB boards.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agoMerge remote-tracking branch 'u-boot-sh/rmobile'
Albert ARIBAUD [Fri, 16 May 2014 18:43:04 +0000 (20:43 +0200)]
Merge remote-tracking branch 'u-boot-sh/rmobile'

Conflicts:
boards.cfg

Trivial conflict, maintainer change plus board addition

7 years agopatman: Suppress duplicate signoffs only for real patches
Simon Glass [Tue, 13 May 2014 18:14:02 +0000 (12:14 -0600)]
patman: Suppress duplicate signoffs only for real patches

There is an unfortunate bug in the signoff suppression logic. The first
pass is performed with 'git log', and all signoffs are added to the
supression set, such that the second time (when processing the real
patches) we always suppress the signoffs.

Correct this by only suppressing signoffs in the second pass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Michal Simek <monstr@monstr.eu>
Tested-by: Andreas BieƟmann <andreas.devel@googlemail.com>
7 years agosandbox: set sandbox's vendor to null
Masahiro Yamada [Wed, 14 May 2014 03:57:28 +0000 (12:57 +0900)]
sandbox: set sandbox's vendor to null

Because sandbox is not a real hardware, setting vendor=sandbox is
almost meaningless.

This commit sets sandbox's vendor field to '-'.

It is a good thing that it decreases one level directory hierarchy.
The files board/sandbox/sandbox/* have been moved to board/sandbox/*.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
7 years agoRevert "sandbox: move source files from board/ to arch/sandbox/"
Masahiro Yamada [Wed, 14 May 2014 03:54:37 +0000 (12:54 +0900)]
Revert "sandbox: move source files from board/ to arch/sandbox/"

This reverts commit 258060905e04fe2eb509756ef3b37e23e220a2d6.

Conflicts:
boards.cfg

Wrong patch 25806090 was applied by accident. Revert it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 16 May 2014 15:56:50 +0000 (17:56 +0200)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

7 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 16 May 2014 14:49:50 +0000 (16:49 +0200)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

7 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 15 May 2014 15:19:45 +0000 (17:19 +0200)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

7 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 15 May 2014 14:36:02 +0000 (16:36 +0200)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

7 years agoarm: move exception handling out of start.S files
Albert ARIBAUD [Tue, 15 Apr 2014 14:13:51 +0000 (16:13 +0200)]
arm: move exception handling out of start.S files

Exception handling is basically identical for all ARM targets.
Factorize it out of the various start.S files and into a
single vectors.S file, and adjust linker scripts accordingly.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
7 years agoarm: remove unused _end_vect and _vectors_end symbols
Albert ARIBAUD [Tue, 15 Apr 2014 14:13:50 +0000 (16:13 +0200)]
arm: remove unused _end_vect and _vectors_end symbols

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
7 years agoarm: pxa: move SP check from start.S to cpuinfo.c
Albert ARIBAUD [Tue, 15 Apr 2014 14:13:49 +0000 (16:13 +0200)]
arm: pxa: move SP check from start.S to cpuinfo.c

PXA start.S has a PXA (variant) specific check in
start.S. Move it to cpuinfo.c.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marex@denx.de>
7 years agoarm: move reset_cpu from start.S into cpu.c
Albert ARIBAUD [Tue, 15 Apr 2014 14:13:48 +0000 (16:13 +0200)]
arm: move reset_cpu from start.S into cpu.c

CPUs arm946es and sa1100 both define the reset_cpu()
function in their start.S file. Move this cpu-specific code
into cpu.c so that start.S only contains ARM generic code.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
7 years agoarm1136: move cache code from start.S to cache.c
Albert ARIBAUD [Tue, 15 Apr 2014 14:13:47 +0000 (16:13 +0200)]
arm1136: move cache code from start.S to cache.c

arch/arm/cpu/arm1136/start.S contain a cache flushing function.
Remove the function and move its code into arch/arm/lib/cache.c.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Stefano Babic [Thu, 15 May 2014 08:27:32 +0000 (10:27 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

7 years agonand: remove CONFIG_SYS_NAND_PAGE_SIZE
Tim Harvey [Thu, 8 May 2014 05:16:12 +0000 (22:16 -0700)]
nand: remove CONFIG_SYS_NAND_PAGE_SIZE

We only need to read in the size of struct image_header and thus don't
need to know the page size of the nand device.

Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
7 years agomvtwsi: Remove unnecessary twsi_baud_rate and twsi_slave_address globals
Hans de Goede [Sat, 3 May 2014 15:46:27 +0000 (17:46 +0200)]
mvtwsi: Remove unnecessary twsi_baud_rate and twsi_slave_address globals

These are used only once, so their is no need to have them global.

This also stops mvtwsi from using any bss vars making it easier to use
before dram init (to talk to the pmic to set the dram voltage).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agomvtwsi: Fix clock programming
Hans de Goede [Sat, 3 May 2014 15:46:26 +0000 (17:46 +0200)]
mvtwsi: Fix clock programming

The TWSI_FREQUENCY macro was wrong in 2 ways:
1) It was casting the result of the calculations to an u8, while i2c clk
rates are often >= 100Khz which won't fit in a u8, drop the cast.
2) It had an extra factor of 2 in the divider which neither the datasheet nor
the Linux driver have.

The comment for the default value was wrongly saying that m lives in
bits 4-7, while in reality it is in bits 3-6, as can be seen from the correct
shift by 3 used in i2c_init().

While at it remove the unused twsi_actual_speed variable.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agomtd: nand: omap_gpmc: Fix update of read_ecc in oob
Belisko Marek [Fri, 25 Apr 2014 10:00:07 +0000 (12:00 +0200)]
mtd: nand: omap_gpmc: Fix update of read_ecc in oob

We need to flip only one bit not assign.

Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Acked-by: Pekon Gupta <pekon@ti.com>
7 years agoam335x: pepper: Add Gumstix Pepper AM335x-based machine
Ash Charles [Wed, 7 May 2014 15:24:11 +0000 (08:24 -0700)]
am335x: pepper: Add Gumstix Pepper AM335x-based machine

This adds the Gumstix Pepper[1] single-board computer based on the
TI AM335x processor. Schematics are available [2].

[1] https://store.gumstix.com/index.php/products/344/
[2] https://pubs.gumstix.com/boards/PEPPER/

Signed-off-by: Ash Charles <ash@gumstix.com>
[trini: Move 'cdev' in board.c down to under #ifdef's where it's used]
Signed-off-by: Tom Rini <trini@ti.com>
7 years agoarm, davinci: Use CONFIG_SPL_PAD_TO for padding the SPL in an ais image
Christian Riesch [Wed, 7 May 2014 08:16:28 +0000 (10:16 +0200)]
arm, davinci: Use CONFIG_SPL_PAD_TO for padding the SPL in an ais image

The commits

commit b7b5f1a16ca66dfdd817e7339f0e263a5b9f2758
Author: Albert ARIBAUD <albert.u.boot@aribaud.net>
da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINT

and

commit e7497891e34efe5cb2b3a3dc7c6c096c012ede28
Author: Albert ARIBAUD <albert.u.boot@aribaud.net>
cam_enc_4xx: convert to CONFIG_SPL_MAX_FOOTPRINT

replaced CONFIG_SPL_MAX_SIZE by CONFIG_SPL_MAX_FOOTPRINT. However,
CONFIG_SPL_MAX_SIZE is used in the Makefile for padding the SPL
when preparing an u-boot.ais image. By removing CONFIG_SPL_MAX_SIZE
said commits broke the ais image of the da850evm and cam_enc_4xx
configurations.

This patch converts the u-boot.ais target to use CONFIG_SPL_PAD_TO
instead of CONFIG_SPL_MAX_SIZE for padding the SPL and adds
a #define CONFIG_SPL_PAD_TO where it is required.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Reported-by: Tom Taylor <ttaylor.tampa@gmail.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
7 years agosiemens, draco: add new target
Egli, Samuel [Mon, 5 May 2014 14:50:44 +0000 (16:50 +0200)]
siemens, draco: add new target

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Reviewed-by: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
7 years agosiemens:cosmetic, dxr2: rename dxr2 to draco
Egli, Samuel [Mon, 5 May 2014 14:50:43 +0000 (16:50 +0200)]
siemens:cosmetic, dxr2: rename dxr2 to draco

The actual board name is draco and dxr2 is the target name.
In the future we'll have different targets based on draco board.
All changes are purely non-functional and basically rename dxr2
to draco.

One style fix in board.c that existed already before.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Reviewed-by: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
7 years agoomap3_beagle: xM A/B validate new dtb exits in file system
Robert Nelson [Fri, 2 May 2014 20:15:03 +0000 (15:15 -0500)]
omap3_beagle: xM A/B validate new dtb exits in file system

Fall back to previous dtb used when omap3-beagle-xm-ab.dtb doesn't exist in file system

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Nishanth Menon <nm@ti.com>
Acked-by: Tom Rini <trini@ti.com>
7 years agoomap3_beagle: use omap3-beagle-xm-ab.dtb for the xM AB revision
Robert Nelson [Fri, 2 May 2014 20:14:39 +0000 (15:14 -0500)]
omap3_beagle: use omap3-beagle-xm-ab.dtb for the xM AB revision

As of v3.15-rc3, omap3-beagle-xm-ab.dtb now exists with the usb hub (ehci) enabled.

For older kernels versions, cherry pick from mainline:
ef78f3869c37c480f1d58462a760a40dabc823f4

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Nishanth Menon <nm@ti.com>
7 years agoARM: OMAP5: add CKO buffer control mask
Dmitry Lifshitz [Sun, 27 Apr 2014 10:17:27 +0000 (13:17 +0300)]
ARM: OMAP5: add CKO buffer control mask

Add CKOBUFFER_CLK_EN bit mask enabling FREF_XTAL_CLK clock.

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
7 years agoARM: OMAP5: Power: add LDO2 support for Palmas driver
Dmitry Lifshitz [Sun, 27 Apr 2014 10:17:26 +0000 (13:17 +0300)]
ARM: OMAP5: Power: add LDO2 support for Palmas driver

Add defines required to turn on LDO2 regulator.

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
7 years agoARM: OMAP5: add UART4 support
Dmitry Lifshitz [Sun, 27 Apr 2014 10:17:25 +0000 (13:17 +0300)]
ARM: OMAP5: add UART4 support

Add UART4 base address.

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
7 years agosiemens: cosmetic: rename project_dir
Egli, Samuel [Thu, 24 Apr 2014 15:57:56 +0000 (17:57 +0200)]
siemens: cosmetic: rename project_dir

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
7 years agosiemens: change LED indication in DFU mode
Egli, Samuel [Thu, 24 Apr 2014 15:57:55 +0000 (17:57 +0200)]
siemens: change LED indication in DFU mode

In order to have the same LED indication like in another product
when ready for updating, enable only red led and disable status
LED when entering DFU mode.

The status LED is only switched off when defined in board file.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
7 years agosiemens: add led cmd for flexible LED control
Egli, Samuel [Thu, 24 Apr 2014 15:57:54 +0000 (17:57 +0200)]
siemens: add led cmd for flexible LED control

* remove setting LED in user button function.
   We want to decouple reading user button and setting LED. This
   two things need to be done independently.

 * led cmd can be used to control LEDs that are defined in board file
   having a led cmd, one can easily set LEDs in u-boot shell. For
   example bootcmd can be extended to disable status LED before
   loading kernel.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
7 years agosiemens: update DDR3 parameters for dxr2
Egli, Samuel [Thu, 24 Apr 2014 15:57:53 +0000 (17:57 +0200)]
siemens: update DDR3 parameters for dxr2

* add parameters for factory and print them at start up to
   facilitate control of right DDR3 settings in EEPROM.

 * cosmetic changes in a couple of printfs

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
7 years agosiemens: cosmetic: remove unused and rename defines
Egli, Samuel [Thu, 24 Apr 2014 15:57:52 +0000 (17:57 +0200)]
siemens: cosmetic: remove unused and rename defines

For dxr2 board DXR2_IOCTRL_VAL is set by data in EEPROM. In pxm2
board it does not make sense to have dxr2 as prefix. Replace it with
more meaningful DDR prefix.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Pascal Bach <pascal.bach@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
7 years agoam33xx: add SSC enable macro
Yegor Yefremov [Sat, 19 Apr 2014 20:12:18 +0000 (22:12 +0200)]
am33xx: add SSC enable macro

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
7 years agoconfig: k2hk_evm: Add generic board support
Khoronzhuk, Ivan [Tue, 15 Apr 2014 18:32:25 +0000 (21:32 +0300)]
config: k2hk_evm: Add generic board support

We should use generic board in order the ARM maintainer
be able to remove arch/arm/lib/board.c

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Tue, 13 May 2014 21:09:28 +0000 (17:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

7 years agoARM: tegra: use a CPU freq that all SKUs can support
Stephen Warren [Thu, 8 May 2014 15:33:45 +0000 (09:33 -0600)]
ARM: tegra: use a CPU freq that all SKUs can support

U-Boot on Tegra30 currently selects a main CPU frequency that cannot be
supported at all on some SKUs, and needs higher VDD_CPU/VDD_CORE values
on some others. This can result in unreliable operation of the main CPUs.

Resolve this by switching to a CPU frequency that can be supported by any
SKU. According to the following link, the maximum supported CPU frequency
of the slowest Tegra30 SKU is 600MHz:

repo http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=summary
branch l4t/l4t-r16-r2
path arch/arm/mach-tegra/tegra3_dvfs.c
table cpu_dvfs_table[]

According to that same table, the minimum VDD_CPU required to operate at
that frequency across all SKUs is 1.007V. Given the adjustment resolution
of the TPS65911 PMIC that's used on all Tegra30-based boards we support,
we'll end up using 1.0125V instead.

At that VDD_CPU, tegra3_get_core_floor_mv() in that same file dictates
that VDD_CORE must be at least 1.2V on all SKUs. According to
tegra_core_speedo_mv() (in tegra3_speedo.c in the same source tree),
that voltage is safe for all SKUs.

An alternative would be to port much of the code from tegra3_dvfs.c and
tegra3_speedo.c in the kernel tree mentioned above. That's more work
than I want to take on right now.

While all the currently supported boards use the same regulator chip for
VDD_CPU, different types of regulators are used for VDD_CORE. Hence, we
add some small conditional code to select how VDD_CORE is programmed. If
this becomes more complex in the future as new boards are added, or we
end up adding code to detect the SoC SKU and dynamically determine the
allowed frequency and required voltages, we should probably make this a
runtime call into a function provided by the board file and/or relevant
PMIC driver.

Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Marcel Ziswiler <marcel@ziswiler.com>
Cc: Bard Liao <bardliao@realtek.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: Venice2 pinmux spreadsheet updates
Stephen Warren [Tue, 6 May 2014 17:18:41 +0000 (11:18 -0600)]
ARM: tegra: Venice2 pinmux spreadsheet updates

The Venice2 pinmux spreadsheet was updated to fix a few issues. Import
those changes into the U-Boot pinmux initialization tables.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: update Venice2 pinmux
Stephen Warren [Tue, 22 Apr 2014 20:37:57 +0000 (14:37 -0600)]
ARM: tegra: update Venice2 pinmux

This re-imports the entire Venice2 pinmux data from the board's master
spreadsheet, and makes use of the new IO clamping GPIO initialization
table features. This makes the board port fully compliant with the
required HW-defined pinmux initialization sequence.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: clamp inputs on Jetson TK1
Stephen Warren [Tue, 22 Apr 2014 20:37:56 +0000 (14:37 -0600)]
ARM: tegra: clamp inputs on Jetson TK1

The HW-defined procedure for booting Tegra requires that
CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux.
Modify the Jetson TK1 board to do this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: make use of GPIO init table on Jetson TK1
Stephen Warren [Tue, 22 Apr 2014 20:37:55 +0000 (14:37 -0600)]
ARM: tegra: make use of GPIO init table on Jetson TK1

The HW-defined procedure for booting Tegra requires that some pins be
set up as GPIOs immediately at boot in order to avoid glitches on those
pins, when the pinmux is programmed. This patch implements this
procedure for Jetson TK1. For pins which are to be used as GPIOs, the
pinmux mux function need not be programmed, so the pinmux table is also
adjusted.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: add function to enable input clamping on tristate
Stephen Warren [Tue, 22 Apr 2014 20:37:54 +0000 (14:37 -0600)]
ARM: tegra: add function to enable input clamping on tristate

The HW-defined procedure for booting Tegra requires that
CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux.
Add a function to the pinmux driver to allow boards to do this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: add GPIO initialization table function
Stephen Warren [Tue, 22 Apr 2014 20:37:53 +0000 (14:37 -0600)]
ARM: tegra: add GPIO initialization table function

The HW-defined procedure for booting Tegra requires that some pins be
set up as GPIOs immediately at boot in order to avoid glitches on those
pins, when the pinmux is programmed. Add a feature to the GPIO driver
which executes a GPIO configuration table. Board files will use this to
implement the correct HW initialization procedure.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: allow pinmux mux option not to be set by init tables
Stephen Warren [Tue, 22 Apr 2014 20:37:52 +0000 (14:37 -0600)]
ARM: tegra: allow pinmux mux option not to be set by init tables

Define enum PMUX_FUNC_DEFAULT, which indicates that a table entry passed
to pinmux_config_pingrp()/pinmux_config_pingrp_table() shouldn't change
the mux option in HW.

For pins that will be used as GPIOs, the mux option is irrelevant, so we
simply don't want to define any mux option in the pinmux initialization
table.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: fix CPU VDD comment in Tegra30 CPU init code
Stephen Warren [Mon, 21 Apr 2014 20:50:33 +0000 (14:50 -0600)]
ARM: tegra: fix CPU VDD comment in Tegra30 CPU init code

The register writes performed by arch/arm/cpu/arm720t/tegra30/cpu.c
enable_cpu_power_rail() set the voltage to 1.0V not 1.4V as the comment
implies. Fix the comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: set CONFIG_SYS_MMC_MAX_DEVICE
Stephen Warren [Fri, 18 Apr 2014 16:56:11 +0000 (10:56 -0600)]
ARM: tegra: set CONFIG_SYS_MMC_MAX_DEVICE

If CONFIG_API is ever to be enabled on Tegra, this define must be set,
since api/api_storage.c uses it.

A couple of annoyting things about CONFIG_SYS_MMC_MAX_DEVICE

1) It isn't documented in README. The same is true for a lot of similar
   defines used by api_storage.c.

2) It doesn't represent MAX_DEVICE but rather NUM_DEVICES, since the
   valid values are 0..n-1 not 0..n.

However, I this patch does not address those shortcomings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoboards.cfg: fix a configuration error of ep8248 board
Masahiro Yamada [Wed, 30 Apr 2014 03:55:22 +0000 (12:55 +0900)]
boards.cfg: fix a configuration error of ep8248 board

"make ep8248_config" fails with an error like this:

    $ make ep8248_config
    make: *** [ep8248_config] Error 1

Its cause is that there are two entries for "ep8248".

The first is around line 652 of boards.cfg. (as Active)

The second appears around line 1230. (as Orphan)

This bug was accidentally introduced by commit e7e90901.
But it is not the author's fault. He just intended to change
IDS8247 board.

The commiter added ep8248 entry by mistake when he resolved a conflict.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Kim Phillips <kim.phillips@linaro.org>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
7 years agopowerpc/freescale: Convert selected boards to generic board architecture
York Sun [Wed, 30 Apr 2014 21:43:49 +0000 (14:43 -0700)]
powerpc/freescale: Convert selected boards to generic board architecture

This patch converts the following boards to use generic board: MPC8536DS,
MPC8572DS, MPC8641HPCN, p1_p2_rdb_pc, corenet_ds, t4qds, B4860QDS. It has
been tested on NOR boot on MPC8536DS, MPC8572DS, P1021RDB, P4080DS,
P5020DS, P5040DS, P3041DS, T4240QDS, B4860QDS.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Ying Zhang <b40530@freescale.com>
CC: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Haijun.Zhang <Haijun.Zhang@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Shaohui Xie <Shaohui.Xie@freescale.com>
7 years agopowerpc/mpc86xx: Fix boot_flag for calling board_init_f()
York Sun [Wed, 30 Apr 2014 21:43:48 +0000 (14:43 -0700)]
powerpc/mpc86xx: Fix boot_flag for calling board_init_f()

The argument boot_flag of board_inti_f() hasn't been used for powerpc until
recent changing to use generic board. Set it to 0 as a proper value.

Signed-off-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/mpc85xx: Fix boot_flag for calling board_init_f()
York Sun [Wed, 30 Apr 2014 21:43:47 +0000 (14:43 -0700)]
powerpc/mpc85xx: Fix boot_flag for calling board_init_f()

baord_init_f takes one argument, boot_flag. It has not been used for
powerpc, until recently changing to use generic board architecture.
The boot flag is added as a return value from cpu_init_f().

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alexander Graf <agraf@suse.de>
7 years agopowerpc/freescale: Change the return value of mac_read_from_eeprom()
York Sun [Wed, 30 Apr 2014 21:43:46 +0000 (14:43 -0700)]
powerpc/freescale: Change the return value of mac_read_from_eeprom()

The return value has not been checked by its caller, until recent change
of using generic board architecture. The error of this function is not
critical enough to hang the system. Printing the warning message is enough
to catch user's attention. U-boot should continue to boot to give user
a chance to fix the EEPROM. Chaning the return value to 0 to avoid hanging
in the board_init_r().

Signed-off-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/mpc85xx: Ignore FDT pointer for non-QEMU in cpu_init_early_f()
York Sun [Wed, 30 Apr 2014 21:43:45 +0000 (14:43 -0700)]
powerpc/mpc85xx: Ignore FDT pointer for non-QEMU in cpu_init_early_f()

The pointer of device tree comes from r3 for QEMU. This is not the case
for normal SoCs out of reset. Having gd->fdt_blob as 0 is important for
other functions to detect the non-existence of device tree.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alexander Graf <agraf@suse.de>
7 years agopowerpc/mpc8572ds: Increase u-boot size to 768KB
York Sun [Fri, 25 Apr 2014 19:06:17 +0000 (12:06 -0700)]
powerpc/mpc8572ds: Increase u-boot size to 768KB

U-boot image has grown and exceeded the predefined 512KB. Increasing to
768KB to align with other powerpc boards. Tested on MPC8572DS for 32-
and 36-bit targets with NOR flash boot. NAND boot is not covered by
this patch.

Also update board maintainer for these boards.

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoqe: disable qe when qe-ucode fails to be uploaded for "deep sleep"
Zhao Qiang [Wed, 30 Apr 2014 08:45:31 +0000 (16:45 +0800)]
qe: disable qe when qe-ucode fails to be uploaded for "deep sleep"

when qe-ucode fails to be uploaded, "deep sleep" will hang.
if there is no qe-ucode, disable qe module for platforms
which support "deep sleep"

Signed-off-by: Zhao Qiang <B45475@freescale.com>
7 years agoPPC 85xx QEMU: Make a generic board file
Alexander Graf [Wed, 30 Apr 2014 17:21:14 +0000 (19:21 +0200)]
PPC 85xx QEMU: Make a generic board file

This patch enables the E500 QEMU board to use the generic cross-arch board
infrastructure.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agopowerpc/mpc85xx: Update TLB CAMs in relocated mode
Alexander Graf [Wed, 30 Apr 2014 17:21:12 +0000 (19:21 +0200)]
powerpc/mpc85xx: Update TLB CAMs in relocated mode

We want to use the TLB mapping helpers in relocated mode as well. These helpers
need to have awareness of already occupied TLB entries. We already had them in
sync in non-relocated mode, but need to resync them when we move into relocated.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC 85xx QEMU: Don't use HID1
Alexander Graf [Wed, 30 Apr 2014 17:21:11 +0000 (19:21 +0200)]
PPC 85xx QEMU: Don't use HID1

For the QEMU machine type, we can plug in either e500v2, e500mc, e5500
or e6500 style cores into the system. U-boot has to work with all of them.

So avoid using HID1 which is not available on e500mc systems to make sure
we don't trap on it.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC 85xx QEMU: Always assume 1 core
Alexander Graf [Wed, 30 Apr 2014 17:21:10 +0000 (19:21 +0200)]
PPC 85xx QEMU: Always assume 1 core

We only need u-boot to bother about a single core in the QEMU machine.
Everything that would require additional knowledge of more cores gets
handled by QEMU and passed straight into the payload we execute.

Because of this setup, it would be counterproductive to enable SMP support
in u-boot. We would have to rip CPUs out of already existing spin tables
and respin them from u-boot. It would be a pretty big mess.

So only assume we have a single core. This fixes errors about CONFIG_MP
being disabled.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agokmp204x: enable the errata command
Valentin Longchamp [Wed, 30 Apr 2014 13:01:49 +0000 (15:01 +0200)]
kmp204x: enable the errata command

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokmp204x: add workaround for A-004849
Valentin Longchamp [Wed, 30 Apr 2014 13:01:48 +0000 (15:01 +0200)]
kmp204x: add workaround for A-004849

This should prevent the problems that the CCF can deadlock with certain
traffic patterns.

This also fixes the workaround for A-006559 that was not correctly
implemented before.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokmp204x: update the RCW
Valentin Longchamp [Wed, 30 Apr 2014 13:01:47 +0000 (15:01 +0200)]
kmp204x: update the RCW

Fix the IRQ/GPIO settings: all the muxed GPIO/external IRQs that are
used as internal interrupts are defined as GPIOs to avoid confusion
between the internal/external interrupts.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokmp204x: complete the reset sequence and PRST configuration
Valentin Longchamp [Wed, 30 Apr 2014 13:01:46 +0000 (15:01 +0200)]
kmp204x: complete the reset sequence and PRST configuration

This adds the reset support for the following devices that was until
then not implemented:
- BFTIC4
- QSFPs

This also fixes the configuration of the prst behaviour for the other
resets: Only the u-boot and kernel relevant subsystems are taken out of
reset (pcie, ZL30158, and front eth phy).

Most of the prst config move to misc_init_f(), except for the PCIe
related ones that are in pci_init_board and the bftic and ZL30158 ones
that should be done as soon as possible.

Only the behavior of the Hooper reset is changed according to the
documentation as the application is not able to not configure the switch
when it is not reset.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokmp204x: update the CONFIG_PRAM and CONFIG_KM_RESERVED_PRAM defines
Valentin Longchamp [Wed, 30 Apr 2014 13:01:45 +0000 (15:01 +0200)]
kmp204x: update the CONFIG_PRAM and CONFIG_KM_RESERVED_PRAM defines

This prevents u-boot from accessing into the reserved memory areas that
we have for /var and the logbooks.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokmp204x: selftest/factory test pin support
Valentin Longchamp [Wed, 30 Apr 2014 13:01:44 +0000 (15:01 +0200)]
kmp204x: selftest/factory test pin support

This patch defines the post_hotkeys_pressed() function that is used for:
- triggering POST memory regions test
- starting the test application through the checktestboot command in
  a script by setting the active bank to testbank

The post_hotkeys_pressed return the state of the SELFTEST pin.

The patch moves from the complete POST-memory test that is too long in
its SLOW version for our production HW test procedure to the much shorter
POST-memory-regions test.

Finally, the unused #defines for the not so relevant mtest command are
removed.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokmp204x: handle dip-switch for factory settings
Stefan Bigler [Fri, 2 May 2014 08:49:27 +0000 (10:49 +0200)]
kmp204x: handle dip-switch for factory settings

Add readout of dip-switch to revert to factory settings.
If one or more dip-switch are set, launch bank 0 that contains the
bootloader to do the required action.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokmp204x: Add support for the unit LEDs
Stefan Bigler [Fri, 2 May 2014 08:48:41 +0000 (10:48 +0200)]
kmp204x: Add support for the unit LEDs

The unit LEDs are managed by the QRIO CPLD. This patch adds support for
accessing these LEDs in the QRIO.

The LEDs then are set to a correct boot state:
- UNIT-LED is red
- BOOT-LED is on.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agopowerpc/85xx: add T4080 SoC support
Shengzhou Liu [Fri, 25 Apr 2014 08:31:22 +0000 (16:31 +0800)]
powerpc/85xx: add T4080 SoC support

The T4080 SoC is a low-power version of the T4160.
T4080 combines 4 dual-threaded Power Architecture e6500
cores with single cluster and two memory complexes.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
7 years agopowerpc/t208x: enable errata A006261, A006593, A006379
Shengzhou Liu [Thu, 24 Apr 2014 03:10:09 +0000 (11:10 +0800)]
powerpc/t208x: enable errata A006261A006593A006379

Enable errata A006261A006593A006379 for T208x.
Additionally enable CONFIG_CMD_ERRATA for T2080RDB.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
7 years agopowerpc/fman/memac: use default MDIO_HOLD value
Shaohui Xie [Tue, 22 Apr 2014 10:21:37 +0000 (18:21 +0800)]
powerpc/fman/memac: use default MDIO_HOLD value

Current driver uses a Maximum value for MDIO_HOLD when doing 10G MDIO
access, this is due to an errata A-006260 on T4 rev1.0 which is fixed
on rev2.0, so remove the maximum value to use the default value for rev2.0.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
7 years agopowerpc/mpc85xx: SECURE BOOT- Add secure boot target for T2080RDB
Aneesh Bansal [Tue, 22 Apr 2014 09:47:06 +0000 (15:17 +0530)]
powerpc/mpc85xx: SECURE BOOT- Add secure boot target for T2080RDB

Secure Boot Target is added for T2080RDB

Changes:
For Secure boot, CPC is configured as SRAM and used as house
keeping area which needs to be disabled.
So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T2080RDB.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
7 years agopowerpc/mpc85xx: SECURE BOOT- secure boot target for t1040rdb
Aneesh Bansal [Tue, 22 Apr 2014 09:46:48 +0000 (15:16 +0530)]
powerpc/mpc85xx: SECURE BOOT- secure boot target for t1040rdb

T1040RDB.h file is removed and a unified file T104xRDB.h is created.
Hence macro CONFIG_T1040 is renamed to CONFIG_T104x.

Signed-off-by: Gaurav Kumar Rana <gaurav.rana@freescale.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
7 years agopowerpc/85xx: Add T4240RDB board support
Chunhe Lan [Mon, 14 Apr 2014 10:42:06 +0000 (18:42 +0800)]
powerpc/85xx: Add T4240RDB board support

T4240RDB board Specification
----------------------------
Memory subsystem:
   6GB DDR3
   128MB NOR flash
   2GB NAND flash

Ethernet:
   Eight 1G SGMII ports
   Four 10Gbps SFP+ ports

PCIe:
   Two PCIe slots

USB:
   Two USB2.0 Type A ports

SDHC:
   One SD-card port

SATA:
   One SATA port

UART:
   Dual RJ45 ports

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]