Graeme Russ [Sat, 12 Feb 2011 04:11:22 +0000 (15:11 +1100)]
eNET: Create distinct board configurations
Position independant functionality is due for removal from the x86
architecture, so create two distinct configurations - One for Flash and
one for SRAM
York Sun [Thu, 10 Feb 2011 18:13:10 +0000 (10:13 -0800)]
powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3
When DDR data rate is higher than 1200MT/s or controller interleaving is
enabled, additional cycle for write-to-read turnaround is needed to satisfy
dynamic ODT timing.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Wed, 9 Feb 2011 19:40:51 +0000 (13:40 -0600)]
fsl: update CRC after setting EEPROM identifier
The "mac id" command is used to initialize the EEPROM data to a specific
format, but it was not updating the CRC. This didn't cause any real
problems, because writing the data to the EEPROM will always update the
CRC anyway, but it did result in a bogus CRC warning.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Dirk Eibach [Fri, 21 Jan 2011 08:31:21 +0000 (09:31 +0100)]
ppc4xx: Add DLVision-10G board support
Board support for the Guntermann & Drunck DLVision-10G.
Adds support for multiple FPGAs per board for gdsys 405ep
architecture.
Adds support for dual link osd hardware for gdsys 405ep.
Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
Joakim Tjernlund [Thu, 27 Jan 2011 15:30:54 +0000 (16:30 +0100)]
mpc83xx: Use correct register to calculate clocks.
Use SPMR instead of HRCWL when calculating clocks as HCRWL
may be changed and the CPU will not pick up all changes
until there is a POR. u-boot will think SPMF has changed and get
the clocks wrong.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Alexander Holler [Fri, 28 Jan 2011 11:42:13 +0000 (12:42 +0100)]
USB: Change the necessary defines to get debug output
While debugging some USB stuff, I've first missed that there are actually
two defines necessary to get usefull output. The one needed to get debug output
for the communication with HUBs was burried somewhere deep inside the code.
Change that so that a #define DEBUG is enough while still leaving the possibility
to reduce unwanted debug output.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Kumar Gala [Fri, 4 Feb 2011 18:50:53 +0000 (12:50 -0600)]
powerpc/8xxx: Fix possible compile issue related to P1013
The P1013 is a single core version of P1022 and thus should use the
p1022_serdes.c code. It was acciently pointing to p1013_serdes.c which
doesn't exist.
Reported-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
York Sun [Wed, 26 Jan 2011 06:05:49 +0000 (22:05 -0800)]
powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134
Workaround for the following errata:
DDR111 - MCKE signal may not function correctly at assertion of HRESET
DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can
calibrate to incorrect values
These two workarounds must be implemented together because they touch
common registers.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Alexander Holler [Tue, 18 Jan 2011 23:24:40 +0000 (00:24 +0100)]
Print compiler and linker version with the version command
After years of unsuccessful research I've finally shamelessly stolen other
peoples intellectual properties to present the all-new and world-changing
updated version command:
-
U-Boot>> version
U-Boot 2010.12-00014-g7435056-dirty (Jan 18 2011 - 23:19:38)
MyBoard
gcc (GCC) 0.42 (Distro foobar)
GNU ld (GNU Binutils) 0.314159265
-
May the toolchain bugs rest in peace.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Po-Yu Chuang [Sun, 19 Dec 2010 23:07:23 +0000 (23:07 +0000)]
arm: a320evb: fixes for relocation support
* add CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR
* do not update gd->bd in dram_init() because bd is unavailable then
* move CONFIG_SYS_TEXT_BASE from config.mk to a320evb.h
* remove config.mk
ARM: Avoid compiler optimization for readb, writeb and friends.
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.
Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.
Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alessandro Rubini <rubini-list@gnudd.com> Tested-by: Thomas Weber <weber@corscience.de> Acked-by: Alexander Holler <holler@ahsoftware.de> Tested-by: Alexander Holler <holler@ahsoftware.de>
Sandeep Paulraj [Tue, 28 Dec 2010 22:38:22 +0000 (17:38 -0500)]
DaVinci DM6467: Enhance board Support
Support for DM6467 was incomplete and the build failed
as well. Patches were sent to the list but have not been
added. This enhances the DM6467 support.
Some more patches will need to be sent to bring
it in line with what is available in internal TI
trees
Sandeep Paulraj [Tue, 28 Dec 2010 20:43:16 +0000 (15:43 -0500)]
DaVinci DM6467: Added ET1011C (LSI) PHY support
Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling
ET1011C gigabit phy. which overrides get_link_speed function
from default implementation. This enables output of 125 MHz
reference clock on SYS_CLK pin.
Sandeep Paulraj [Tue, 28 Dec 2010 19:42:27 +0000 (14:42 -0500)]
DaVinci EMAC: Add name to Ethernet device
Adds "DaVinci-EMAC" as the name of the device so that
it gets printed as "Using DaVinci-EMAC device"
during network access (dhcp, tftp) instead of empty name
in "Using" statement.This name also gets
reflected in 'ethact' env variable.
Sandeep Paulraj [Tue, 28 Dec 2010 19:37:33 +0000 (14:37 -0500)]
DaVinci EMAC: Fix davinci_eth_gigabit_enable
Enabling the gigabit was overwriting the
previous configuration by setting up only GIGAFORCE and
GIG bits of MAC control register.
Modified to retain previous configuration while
gigabit enabling.
Sandeep Paulraj [Tue, 21 Dec 2010 01:01:21 +0000 (20:01 -0500)]
Davinci MMCSD Support
Added support for MMC/SD cards for Davinci. This feature is enabled by
CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC
options. This is tested on DM355 and DM365 EVMs with both the available mmc
controllers.
The patch adds the -pie option to link u-boot.bin only.
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <liu.h.jason@gmail.com> CC: lool@dooz.org CC: Wolfgang Denk <wd@denx.de> CC: Albert Aribaud <albert.aribaud@free.fr> Tested-by: Alexander Holler <holler@ahsoftware.de>
Stefano Babic [Thu, 20 Jan 2011 08:05:15 +0000 (08:05 +0000)]
Add support for Freescale's mx35pdk board.
The patch adds suupport for the Freescale's mx35pdk board
(known as well as mx35_3stack).
The board boots from the NOR flash. Following devices
are supported:
- two ethernet devices (FEC and SMC911x on debug board)
- I2C
- PMIC (MC13892) via I2C interface
- UART
- NOR flash (64MB)
- NAND flash (2GB)
- basic access to mc9sdz60 registers via I2C interface
SPI: mxc_spi: add SPI clock calculation and setup to the driver
The MXC SPI driver didn't calculate the SPI clock up to
now and just used highest possible divider 512 for DATA
RATE in the control register. This results in very low
transfer rates.
The patch adds code to calculate and setup the SPI clock
frequency for transfers.
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case
We need to shift only one time in each cycle in the swapping loop
for unaligned tx case. Currently two byte shift operations are
performed in each loop cycle causing zero gaps in the transmited
data, so not all data scheduled for transmition is actually
transmited.
The proper swapping in unaligned rx case is missing, so add it
as we need to put the received data into the rx buffer in the
correct byte order.
Stefano Babic [Thu, 20 Jan 2011 07:51:31 +0000 (07:51 +0000)]
I2C: mxc_i2c: address failure with mx35 processor
There is sporadic failures when more as one I2C slave
is on the bus and the processor tries to communicate
with more as one slave.
The problem was seen on a mx35pdk (two I2C slaves,
PMIC controller and CAN/RTC chip).
The current driver uses the IIF bit in the status register
to check if the bus is busy or not. According to the manual,
this is not correct, because the IIB bit should be checked.
Not only, to check if a transfer is finished must be checked
the ICF bit, and this is not tested at all.
This patch comes from analyse with a corresponding driver
provided by Freescale as part of the LTIB tool. Comparing
the two drivers, it appears that the current u-boot driver checks
the wrong bits, and depending on race condition, the transfer
can be successful or not.
The patch gets rid also of own debug function (DPRINTF),
replaced with the general debug().
Stefano Babic [Thu, 20 Jan 2011 07:50:44 +0000 (07:50 +0000)]
I2C: mxc_i2c: get rid of __REG access
This driver accesses to processor's register
via __REG macros, that are removed (or are planned
to be removed) and replaced by C structures.
This patches replaces all occurrencies of __REG macros.
projects / karo-tx-uboot.git / log