karo-tx-uboot.git
6 years agox86: minnowmax: initialize the pin-muxing from device tree
Gabriel Huau [Tue, 12 May 2015 06:18:25 +0000 (23:18 -0700)]
x86: minnowmax: initialize the pin-muxing from device tree

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: gpio: add pinctrl support from the device tree
Gabriel Huau [Tue, 26 May 2015 05:27:37 +0000 (22:27 -0700)]
x86: gpio: add pinctrl support from the device tree

Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: baytrail: pci region 3 is not always mapped to end of ram
Andrew Bradford [Wed, 3 Jun 2015 16:37:39 +0000 (12:37 -0400)]
x86: baytrail: pci region 3 is not always mapped to end of ram

Baytrail physically maps the first 2 GB of SDRAM from 0x0 to 0x7FFFFFFF
and additional SDRAM is mapped from 0x100000000 and up.  There is a
physical memory hole from 0x80000000 to 0xFFFFFFFF for other uses.
Because of this, PCI region 3 should only try to use up to the amount of
SDRAM or 0x80000000, which ever is less.

Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Implement PIRQ routing
Bin Meng [Wed, 3 Jun 2015 01:20:06 +0000 (09:20 +0800)]
x86: qemu: Implement PIRQ routing

Support QEMU PIRQ routing via device tree on both i440fx and q35
platforms. With this commit, Linux booting on QEMU from U-Boot
has working ATA/SATA, USB and ethernet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: coreboot: Control I/O port 0xb2 writing via device tree
Bin Meng [Wed, 3 Jun 2015 01:20:05 +0000 (09:20 +0800)]
x86: coreboot: Control I/O port 0xb2 writing via device tree

Writing 0xcb to I/O port 0xb2 (Advanced Power Management Control) causes
U-Boot to hang on QEMU q35 target. We introduce a config option in the
device tree "u-boot,no-apm-finalize" under /config node if we don't want
to do that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Create separate i440fx and q35 device trees
Bin Meng [Wed, 3 Jun 2015 01:20:04 +0000 (09:20 +0800)]
x86: qemu: Create separate i440fx and q35 device trees

Although the two qemu-x86 targets (i440fx and q35) share a lot in
common, they still have something that cannot easily handled in one
single device tree). Split to create two dedicated device tree files
and make the i440fx be the default build target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: coreboot: Fix cosmetic issues
Bin Meng [Wed, 3 Jun 2015 01:20:02 +0000 (09:20 +0800)]
x86: coreboot: Fix cosmetic issues

Clean up arch/x86/cpu/coreboot.c to fix several cosmetic issues.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: kconfig: Make FSP_TEMP_RAM_ADDR depend on HAVE_FSP
Bin Meng [Mon, 1 Jun 2015 13:07:23 +0000 (21:07 +0800)]
x86: kconfig: Make FSP_TEMP_RAM_ADDR depend on HAVE_FSP

FSP_TEMP_RAM_ADDR should only be visible when HAVE_FSP is on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agotools: ifdtool: Do not write region while its size is negative
Bin Meng [Sun, 31 May 2015 06:57:35 +0000 (14:57 +0800)]
tools: ifdtool: Do not write region while its size is negative

We should ignore those regions whose size is negative. These are
typically optional and unused regions (like GbE and platform data).

Change-Id: I65ad01746144604a1dc0588b617af21f2722ebbf
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Adjust VGA initialization
Bin Meng [Mon, 25 May 2015 14:36:27 +0000 (22:36 +0800)]
x86: qemu: Adjust VGA initialization

As VGA option rom needs to run at C segment, although QEMU PAM emulation
seems to only guard E/F segments, for correctness, move VGA initialization
after PAM decode C/D/E/F segments.

Also since we already tested QEMU targets to differentiate I440FX and Q35
platforms, change to locate the VGA device via hardcoded b.d.f instead of
dynamic search for its vendor id & device id pair.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Enable legacy IDE I/O ports decode
Bin Meng [Mon, 25 May 2015 14:36:26 +0000 (22:36 +0800)]
x86: qemu: Enable legacy IDE I/O ports decode

QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix
driver does sanity check to see whether legacy ports decode is turned on.
To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Turn on legacy segments decode
Bin Meng [Sat, 23 May 2015 16:12:33 +0000 (00:12 +0800)]
x86: qemu: Turn on legacy segments decode

By default the legacy segments C/D/E/F do not decode to system RAM.
Turn on the decode via Programmable Attribute Map (PAM) registers
so that we can write configuration tables in the F segment.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Make host bridge (b.d.f=0.0.0) visible
Bin Meng [Sat, 23 May 2015 16:12:32 +0000 (00:12 +0800)]
x86: qemu: Make host bridge (b.d.f=0.0.0) visible

The default weak version of pci_skip_dev() in drivers/pci/pci_common.c
skips the host bridge (b.d.f = 0.0.0) which is actually the i440fx/q35
chipset for QEMU targets. Define CONFIG_PCI_CONFIG_HOST_BRIDGE to make
it visible in the PCI configuration space.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: fsp_support: Correct high mem comment typo
Andrew Bradford [Fri, 22 May 2015 19:11:23 +0000 (15:11 -0400)]
x86: fsp_support: Correct high mem comment typo

High mem starts at 4 GiB.

Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Do sanity test on pirq table before writing
Bin Meng [Mon, 25 May 2015 14:35:07 +0000 (22:35 +0800)]
x86: Do sanity test on pirq table before writing

If pirq_routing_table points to NULL, that means U-Boot fails to
generate the table before in create_pirq_routing_table(), so we
test it against NULL before actually writing it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: quark: Implement PIRQ routing
Bin Meng [Mon, 25 May 2015 14:35:06 +0000 (22:35 +0800)]
x86: quark: Implement PIRQ routing

Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Document irq router device tree bindings
Bin Meng [Mon, 25 May 2015 14:35:05 +0000 (22:35 +0800)]
x86: Document irq router device tree bindings

Describe all required properties needed by the irq router device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Refactor PIRQ routing support
Bin Meng [Mon, 25 May 2015 14:35:04 +0000 (22:35 +0800)]
x86: Refactor PIRQ routing support

PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Add ATA/SATA support
Bin Meng [Sat, 16 May 2015 01:33:19 +0000 (09:33 +0800)]
x86: qemu: Add ATA/SATA support

Enable legacy IDE support on the pc target and AHCI support on the
q35 target. Default configuration is to support the pc target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.h
Bin Meng [Sat, 16 May 2015 01:33:18 +0000 (09:33 +0800)]
x86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.h

Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed
by cmd_ide.c which is not common for modern x86 targets, hence remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agocmd_ide: Eliminate build warnings in atapi_inquiry()
Bin Meng [Sat, 16 May 2015 01:33:17 +0000 (09:33 +0800)]
cmd_ide: Eliminate build warnings in atapi_inquiry()

Eliminate the following build warning in atapi_inquiry():
  "warning: assignment from incompatible pointer type [enabled by default]"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agopci: Do not skip legacy IDE device configuration
Bin Meng [Sat, 16 May 2015 01:33:15 +0000 (09:33 +0800)]
pci: Do not skip legacy IDE device configuration

The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
needs to be configured.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agopci: Allow debug message output in pci_auto.c
Bin Meng [Sat, 16 May 2015 01:33:14 +0000 (09:33 +0800)]
pci: Allow debug message output in pci_auto.c

Remove the '#undef DEBUG' in pci_auto.c so that we can enable debug
message output via '-DDEBUG'.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Add graphics support
Bin Meng [Sun, 10 May 2015 23:36:30 +0000 (07:36 +0800)]
x86: qemu: Add graphics support

It turns out that QEMU x86 emulated graphic card has a built-in
option ROM which can be run perfectly with native mode by U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Move FRAMEBUFFER_SET_VESA_MODE etc to video Kconfig
Bin Meng [Sun, 10 May 2015 23:36:29 +0000 (07:36 +0800)]
x86: Move FRAMEBUFFER_SET_VESA_MODE etc to video Kconfig

CONFIG_FRAMEBUFFER_SET_VESA_MODE and CONFIG_FRAMEBUFFER_VESA_MODE
are not x86-specific, so move them to drivers/video/Kconfig and
make them depend on VIDEO_VESA driver. Some cosmetic fixes are
applied to the Kconfig help text as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agovideo: Kconfig: Make VESA driver avaiable for non-x86 boards
Bin Meng [Sun, 10 May 2015 23:36:28 +0000 (07:36 +0800)]
video: Kconfig: Make VESA driver avaiable for non-x86 boards

There is no reason to prevent CONFIG_VIDEO_VESA driver working on
non-x86 boards, so remove such limitation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Remove DECLARE_GLOBAL_DATA_PTR in board files
Bin Meng [Thu, 30 Apr 2015 11:05:24 +0000 (19:05 +0800)]
x86: Remove DECLARE_GLOBAL_DATA_PTR in board files

gd is not referenced in those board files so DECLARE_GLOBAL_DATA_PTR
should be removed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Update README.x86 for QEMU support
Bin Meng [Thu, 7 May 2015 13:34:12 +0000 (21:34 +0800)]
x86: Update README.x86 for QEMU support

Document how to build and test U-Boot with QEMU.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Change coreboot default build configuration to QEMU
Bin Meng [Thu, 7 May 2015 13:34:11 +0000 (21:34 +0800)]
x86: Change coreboot default build configuration to QEMU

QEMU is much easier for us test booting U-Boot as a coreboot payload
than having a real board like chromebook_link.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
6 years agox86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h
Bin Meng [Thu, 7 May 2015 13:34:10 +0000 (21:34 +0800)]
x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h

Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect
DRAM size printed when booting from coreboot, like this:

CPU: x86, vendor Intel, device 663h
DRAM:  636 KiB
Using default environment

Change it to 8 which should be enough for both coreboot and bare
cases, and move it to x86-common.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agox86: Make QEMU the default vendor
Bin Meng [Thu, 7 May 2015 13:34:09 +0000 (21:34 +0800)]
x86: Make QEMU the default vendor

Now that we have QEMU support, make it the default vendor in the
'make menuconfig' screen.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
6 years agox86: Support QEMU x86 targets
Bin Meng [Thu, 7 May 2015 13:34:08 +0000 (21:34 +0800)]
x86: Support QEMU x86 targets

This commit introduces the initial U-Boot support for QEMU x86 targets.
U-Boot can boot from coreboot as a payload, or directly without coreboot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Merged in patch 'x86: qemu: Add CMD_NET to qemu-x86_defconfig
   https://patchwork.ozlabs.org/patch/479745/

6 years agopci: Move pci_hose_phys_to_bus() to pci_common.c
Bin Meng [Thu, 7 May 2015 13:34:07 +0000 (21:34 +0800)]
pci: Move pci_hose_phys_to_bus() to pci_common.c

pci_hose_phys_to_bus() is needed by several drivers. Move it to
pci_common.c to avoid a broken build when CONFIG_DM_PCI is on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
6 years agoboard/BuR/common: fix netconsole
Hannes Schmelzer [Thu, 28 May 2015 14:41:54 +0000 (16:41 +0200)]
board/BuR/common: fix netconsole

netconsole had become defective over time and cleanups.
Because the feature is used very rarely nobody did take notice about this
defect.

With this patch the resulting syntax error on call will be fixed.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
6 years agoconfigs: remove CONFIG_NET_MULTI
Lars Poeschel [Tue, 2 Jun 2015 09:25:54 +0000 (11:25 +0200)]
configs: remove CONFIG_NET_MULTI

CONFIG_NET_MULTI is not used anywhere and thus can safely be removed
from the configs.

Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
6 years agoARM: phytec: pcm051: Remove unneeded CONFIG_USE_IRQ
Lars Poeschel [Tue, 2 Jun 2015 09:23:04 +0000 (11:23 +0200)]
ARM: phytec: pcm051: Remove unneeded CONFIG_USE_IRQ

The config for pcm051 still undef'd CONFIG_USE_IRQ. This is not
needed any more since it is not defined in the whole include path
before.

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
6 years agonet: Fix NET_RANDOM_ETHADDR dependencies
Michal Simek [Mon, 25 May 2015 09:37:22 +0000 (11:37 +0200)]
net: Fix NET_RANDOM_ETHADDR dependencies

NET_RANDOM_ETHADDR depends on lib/rand.c. This patch adds dependency to
Kconfig to ensure that library is also compiled.

Remove the definitions from Blackfin boards' include/configs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Move the CMD_NET config to defconfigs
Joe Hershberger [Sat, 30 May 2015 00:46:35 +0000 (19:46 -0500)]
net: Move the CMD_NET config to defconfigs

This also selects CONFIG_NET for any CONFIG_CMD_NET board.

Remove the imx default for CONFIG_NET.

This moves the config that was defined by 60296a8 (commands: add more
command entries in Kconfig).

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoMove setexpr to Kconfig
Joe Hershberger [Wed, 6 May 2015 00:08:13 +0000 (19:08 -0500)]
Move setexpr to Kconfig

Another shell scripting command that has not been moved.

Moved using tools/moveconfig.py using these settings:

CMD_SETEXPR bool n y

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoblackfin: fix build error on bct-brettl2 board
Masahiro Yamada [Tue, 26 May 2015 03:42:13 +0000 (12:42 +0900)]
blackfin: fix build error on bct-brettl2 board

Commit 76ec988b062e (net: Remove all calls to net_random_ethaddr())
accidentally deleted CONFIG_TARGET_BCT_BRETTL2=y, and since then
bct-brettl2 would not build.

Since commit a26cd04920dc (arch: Make board selection choices
optional), Kconfig actually allows such a .config file in which no
board is selected, but the build never succeeds.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agosparc: fix build error on gr_ep2s60 board
Masahiro Yamada [Tue, 26 May 2015 01:58:31 +0000 (10:58 +0900)]
sparc: fix build error on gr_ep2s60 board

Commit 92ac52082140 (net: Remove all references to CONFIG_ETHADDR
and friends) accidentally dropped #endif.  Since then, gr_ep2s60
could not build.

scripts/kconfig/conf --silentoldconfig Kconfig
  CHK     include/config.h
  GEN     include/autoconf.mk
In file included from include/config.h:5:0,
                 from ./include/common.h:18:
include/configs/gr_ep2s60.h:15:0: error: unterminated #ifndef
 #ifndef __CONFIG_H__
 ^
make[1]: *** [include/autoconf.mk] Error 1

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoarm: mx6: tqma6: use default CONFIG_SYS_PBSIZE
Markus Niebel [Tue, 12 May 2015 08:55:40 +0000 (10:55 +0200)]
arm: mx6: tqma6: use default CONFIG_SYS_PBSIZE

this removes a config entry and uses the default value
defined in config_fallbacks.h. This implements the same
behaviour as a patch series for other i.MX6 boards from
Freescale

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
6 years agoarm: mx6: tqma6: fix spelling error in condition
Markus Niebel [Tue, 12 May 2015 08:55:39 +0000 (10:55 +0200)]
arm: mx6: tqma6: fix spelling error in condition

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
6 years agoimx: ventana: skip mtdparts fixup if no flash
Tim Harvey [Tue, 26 May 2015 18:04:58 +0000 (11:04 -0700)]
imx: ventana: skip mtdparts fixup if no flash

This avoids an error message on NAND-less boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
6 years agoimx: ventana: hang if board model could not be determined
Tim Harvey [Tue, 26 May 2015 18:04:57 +0000 (11:04 -0700)]
imx: ventana: hang if board model could not be determined

If the EEPROM could not be read or is corrupt we always want to hang.
Note that an error message will have been displayed by read_eeprom in this
case.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
6 years agoimx: ventana: make fdt_file1 and fdt_file2 automatic and non-overridable
Tim Harvey [Tue, 26 May 2015 18:04:56 +0000 (11:04 -0700)]
imx: ventana: make fdt_file1 and fdt_file2 automatic and non-overridable

The fdt_file1 and fdt_file2 vars provide fallbacks for the fdt file loading
script. There is no need to allow the user to override these as if they
want to specify the fdt, they should do so in the first attempt which is
the fdt_file var.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
6 years agoimx: ventana: make model env var automatic and non-overridable
Tim Harvey [Tue, 26 May 2015 18:04:55 +0000 (11:04 -0700)]
imx: ventana: make model env var automatic and non-overridable

We want to model env var to always reflect what was in the EEPROM. There
is no point in allowing a user to override this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
6 years agoimx: ventana: various board-specific GPIO config updates
Tim Harvey [Tue, 26 May 2015 18:04:54 +0000 (11:04 -0700)]
imx: ventana: various board-specific GPIO config updates

- Added iomux for CAN_STBY and RS484_TEN (GW52xx/GW53xx/GW54xx/GW551x)
- Moved iomux of USBHUB_RST# out of board_ehci_hcd_init so that it is
  done regardless of USB being initialized in bootloader
- Added usb_sel iomux/hwconfig for GW552x
- Fixed mezzanine DIO for GW54xx
- Fixed PANLEDR# for GW54xx
- Fixed dio iomux/hwconfig for GW552x
- Fixed dio iomux for GW551x
- removed redundant #define

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
6 years agomxs: Do not disable bo detection when DC-DC is already enabled
Stefan Wahren [Thu, 21 May 2015 11:20:17 +0000 (11:20 +0000)]
mxs: Do not disable bo detection when DC-DC is already enabled

In case the DC-DC is already enabled mxs_enable_4p2_dcdc_input() returns
without reenabling brown out detection. So fix this issue by
moving the return before brown out deactivation.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Marek Vasut <marex@denx.de>
6 years agoarm: rmobile: alt: Update to QoS revision 0.31 and 0.321
Nobuhiro Iwamatsu [Wed, 4 Mar 2015 23:30:40 +0000 (08:30 +0900)]
arm: rmobile: alt: Update to QoS revision 0.31 and 0.321

This updates r8a7794 QoS to revision 0.31 for ES1 and revision 0.321 for ES2.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoarm: rmobile: gose: Update to QoS revision 0.311
Nobuhiro Iwamatsu [Wed, 4 Mar 2015 23:30:39 +0000 (08:30 +0900)]
arm: rmobile: gose: Update to QoS revision 0.311

This updates r8a7793 QoS to revision 0.311.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoarm: rmobile: koelsch: Update to QoS revision 0.411
Nobuhiro Iwamatsu [Wed, 4 Mar 2015 23:30:38 +0000 (08:30 +0900)]
arm: rmobile: koelsch: Update to QoS revision 0.411

This updates r8a7791 QoS to revision 0.411.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoarm: rmobile: lager: Update to QoS revision 0.973
Nobuhiro Iwamatsu [Wed, 4 Mar 2015 23:30:37 +0000 (08:30 +0900)]
arm: rmobile: lager: Update to QoS revision 0.973

This updates r8a7790 QoS to revision 0.973.
This commit can changed from KConfig to fit contents of the QoS.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoarm: rmobile: alt: Add ethernet function B support
Mitsuhiro Kimura [Wed, 4 Mar 2015 06:57:03 +0000 (15:57 +0900)]
arm: rmobile: alt: Add ethernet function B support

Ethernet function of Alt board can select normal and B by DIP switch
on board. But user need to set not only DIP switch but also pin function.
This adds pin function of Ethernet function B. This can select from Kconfig.

Signed-off-by: Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: UniPhier: add pin mux setting for NAND CS1 of PH1-Pro4
Masahiro Yamada [Fri, 29 May 2015 08:30:10 +0000 (17:30 +0900)]
ARM: UniPhier: add pin mux setting for NAND CS1 of PH1-Pro4

The chip select 1 of the NAND controller is available if you want to
use, although the pins are shared with UART port 2.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: fix pin mux setting for USB port 2 of PH1-sLD8
Masahiro Yamada [Fri, 29 May 2015 08:30:09 +0000 (17:30 +0900)]
ARM: UniPhier: fix pin mux setting for USB port 2 of PH1-sLD8

The register value should be 1, not 4.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: update DDR PHY register map for PH1-Pro5
Masahiro Yamada [Fri, 29 May 2015 08:30:08 +0000 (17:30 +0900)]
ARM: UniPhier: update DDR PHY register map for PH1-Pro5

PH1-Pro5 includes a newer version of DDR PHY IP.  Some registers
have been added to the reserved areas.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: enable CONFIG_NET_RANDOM_ETHADDR
Masahiro Yamada [Fri, 29 May 2015 08:30:07 +0000 (17:30 +0900)]
ARM: UniPhier: enable CONFIG_NET_RANDOM_ETHADDR

Since commit 92ac52082140 (net: Remove all references to
CONFIG_ETHADDR and friends), the ethernet device on UniPhier boards
is not working because of the incorrect (all-zero) MAC address.

Enable CONFIG_NET_RANDOM_ETHADDR to generate the random one.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: set MACH_PH1_PRO4 as default SoC
Masahiro Yamada [Fri, 29 May 2015 08:30:06 +0000 (17:30 +0900)]
ARM: UniPhier: set MACH_PH1_PRO4 as default SoC

One disadvantage of commit a26cd04920dc (arch: Make board selection
choices optional) is that Kconfig could create such an insane
.config file that no board is selected.

As PH1-Pro4 is the main stream of UniPhier SoC family, rip off the
"optional" again in favor of PH1-Pro4 as the default SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: move CONFIG_SYS_TEXT_BASE to Kconfig
Masahiro Yamada [Fri, 29 May 2015 08:30:05 +0000 (17:30 +0900)]
ARM: UniPhier: move CONFIG_SYS_TEXT_BASE to Kconfig

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: remove meaningless CONFIG_SPL_BUILD ifdefs
Masahiro Yamada [Fri, 29 May 2015 08:30:04 +0000 (17:30 +0900)]
ARM: UniPhier: remove meaningless CONFIG_SPL_BUILD ifdefs

This file is only built for SPL.  These ifdef conditionals are
unnecessary because UniPhier platform now supports UART on SPL.
Show appropriate messages on error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: remove unnecessary cache coherency code
Masahiro Yamada [Fri, 29 May 2015 08:30:03 +0000 (17:30 +0900)]
ARM: UniPhier: remove unnecessary cache coherency code

Cache coherency for SMP is cared by Linux.  In U-Boot, the secondary
CPU(s) are just sleeping.  Nothing in memory is shared with the
primary CPU.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: use 32 bit register access for debug UART setting
Masahiro Yamada [Fri, 29 May 2015 08:30:02 +0000 (17:30 +0900)]
ARM: UniPhier: use 32 bit register access for debug UART setting

For the same reason as commit d0c47b3ef7c5 (serial: UniPhier: use
32 bit register access), use "str" instead of "strb" for the LCR
register setting.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: update the vendor name of UniPhier in Kconfig
Masahiro Yamada [Fri, 29 May 2015 08:30:01 +0000 (17:30 +0900)]
ARM: UniPhier: update the vendor name of UniPhier in Kconfig

The business for UniPhier Soc family has been transferred from
Panasonic Corporation to Socionext Inc.

Update the SoC select menu in Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: UniPhier: replace <asm/io.h> with <linux/io.h>
Masahiro Yamada [Fri, 29 May 2015 08:30:00 +0000 (17:30 +0900)]
ARM: UniPhier: replace <asm/io.h> with <linux/io.h>

In the Linux coding style, it is recommended to include <linux/io.h>
rather than <asm/io.h>.  Follow this trend.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: sunxi: Enable PSCI for sun8i
Chen-Yu Tsai [Thu, 28 May 2015 13:25:34 +0000 (21:25 +0800)]
ARM: sunxi: Enable PSCI for sun8i

sun8i uses the same PSCI backend as sun6i, without power clamps.
Since there is no secure SRAM, the backend is placed at the end
of DRAM.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agoARM: sunxi: Share sun6i PSCI backend with sun8i
Chen-Yu Tsai [Thu, 28 May 2015 13:25:33 +0000 (21:25 +0800)]
ARM: sunxi: Share sun6i PSCI backend with sun8i

sun8i can share the PSCI backend with sun6i. Only difference
is sun8i does not have CPU power clamp controls.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agoARM: sunxi: Enable PSCI for sun6i
Chen-Yu Tsai [Thu, 28 May 2015 13:25:32 +0000 (21:25 +0800)]
ARM: sunxi: Enable PSCI for sun6i

Now that we have a PSCI backend for sun6i, enable it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agoARM: sunxi: Add sun6i specific PSCI implementation
Chen-Yu Tsai [Thu, 28 May 2015 13:25:31 +0000 (21:25 +0800)]
ARM: sunxi: Add sun6i specific PSCI implementation

This adds PSCI support for sun6i. So far it only supports
the PWR_ON method.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agoARM: sunxi: Make PSCI code sun7i specific
Chen-Yu Tsai [Thu, 28 May 2015 13:25:30 +0000 (21:25 +0800)]
ARM: sunxi: Make PSCI code sun7i specific

The PSCI code only works for sun7i. Rename it with _sun7i suffix,
and build only if building for sun7i.

This paves the way for adding PSCI support for other platforms.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agoARM: sunxi: Document registers in PSCI code
Chen-Yu Tsai [Thu, 28 May 2015 13:25:29 +0000 (21:25 +0800)]
ARM: sunxi: Document registers in PSCI code

The PSCI CPU_ON code accesses quite a few registers. Document
their names to make it easier to cross reference.

Also explain "lock cpu" and "unlock cpu" as enabling/disabling
debug access.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agosunxi/nand: Add support to the SPL for loading u-boot from internal NAND memory
Daniel Kochmański [Tue, 26 May 2015 15:00:42 +0000 (17:00 +0200)]
sunxi/nand: Add support to the SPL for loading u-boot from internal NAND memory

This commit adds support to the sunxi SPL to load u-boot from the internal
NAND. Note this only adds support to access the boot partitions to load
u-boot, full NAND support to load the kernel, etc. from the nand data
partition will come later.

Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agosunxi: Match sun4i, sun6i, sun9i CCI definitions for NAND and DMA
Roy Spliet [Tue, 26 May 2015 15:00:41 +0000 (17:00 +0200)]
sunxi: Match sun4i, sun6i, sun9i CCI definitions for NAND and DMA

Make sure definitions for NAND clock and DMA gate bits are the same
across boards.

Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agosunxi: Add DMA definitions
Roy Spliet [Tue, 26 May 2015 15:00:40 +0000 (17:00 +0200)]
sunxi: Add DMA definitions

Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agosunxi/nand: change BLOCK_SIZE in mksunxiboot to match NAND block size
Daniel Kochmański [Tue, 26 May 2015 15:00:39 +0000 (17:00 +0200)]
sunxi/nand: change BLOCK_SIZE in mksunxiboot to match NAND block size

This change is necessary to calculate correct checksum for NAND
boot. Works both for MMC and NAND. Without it BROM rejects boot image
as invalid (bad checksum). (Changes block size from 0x200 to 0x2000).

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agosun9i: Add Merrii_A80_Optimus board / defconfig file
Hans de Goede [Tue, 13 Jan 2015 22:24:05 +0000 (23:24 +0100)]
sun9i: Add Merrii_A80_Optimus board / defconfig file

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosun9i: Basic sun9i (A80) support
Hans de Goede [Tue, 13 Jan 2015 18:25:06 +0000 (19:25 +0100)]
sun9i: Basic sun9i (A80) support

Add initial sun9i (A80) support, only uart + mmc are supported for now.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: Update sunxi-common.h to deal with different A1-SRAM base addr on sun9i
Hans de Goede [Wed, 20 May 2015 13:27:16 +0000 (15:27 +0200)]
sunxi: Update sunxi-common.h to deal with different A1-SRAM base addr on sun9i

The A1 SRAM Base differs between sun9i and the others, update sunxi-common.h
to deal with this, so that we do not set the initial stack pointer to point
to the BROM.

This avoids the need for the weird undocumented register write I previously
took from the allwiner u-boot sources and which needed #ifdef-ery in start.S
as it needed to be done really early on.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: Update sunxi-common.h to deal with different DRAM base addr on sun9i
Hans de Goede [Tue, 19 May 2015 20:12:31 +0000 (22:12 +0200)]
sunxi: Update sunxi-common.h to deal with different DRAM base addr on sun9i

The DRAM Base differs between sun9i and the others, update sunxi-common.h to
deal with this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: Remove support for building "old-fashioned" fel binaries
Hans de Goede [Tue, 19 May 2015 19:44:44 +0000 (21:44 +0200)]
sunxi: Remove support for building "old-fashioned" fel binaries

The latest versions of the fel tool support loading normal u-boot builds
directly, and this is now the preferred way to use the fel boot method.

This commit removes support for the old deprecated standalone fel builds.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agosunxi: Use axp221 sid on a33
Hans de Goede [Tue, 19 May 2015 21:34:00 +0000 (23:34 +0200)]
sunxi: Use axp221 sid on a33

Unlike the A31 and the A23 the A33 actually has a SID inside the SoC again,
but sid[3] is 0 (at least on some SoCs), so it is better to use the axp221
sid.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
6 years agousb: kbd: Fix key repeat not always working
Hans de Goede [Tue, 19 May 2015 20:51:03 +0000 (22:51 +0200)]
usb: kbd: Fix key repeat not always working

The usb-kbd key repeat code assumes that reports get repeated every 40 ms,
this is never true when using CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP, and
does not always works for CONFIG_SYS_USB_EVENT_POLL and
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE since not all usb keyboards honor
the usb_set_idle() command.

For CONFIG_SYS_USB_EVENT_POLL we must use usb_set_idle() since we do a
blocking wait for the hid report, so if we do not tell the keyboard to send
a hid report every 40ms even if nothing changes then we will block u-boot
for 1s (the default u-boot usb interrupt packet timeout). Note that in this
case on keyboards which do not support usb_set_idle() we loose and we actually
get 1s latencies on other u-boot activities.

For the other poll-methods this commit stops using usb_set_idle() and instead
repeats the last received hid-report every 40 ms as long as no new hid-report
is received. This fixes key-repeat not working at all with
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP and fixes it not working with
keyboards which do not implement usb_set_idle() when using
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agousb: dwc2: Add support for v3 snpsid value
Peter Griffin [Tue, 12 May 2015 13:38:27 +0000 (14:38 +0100)]
usb: dwc2: Add support for v3 snpsid value

This has been tested to the extent that I can enumerate
a asix usb networking adapter and boot a kernel over usb
on the 96boards hikey u-boot port I'm currently doing.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
6 years agoci_udc: Update the ci_udc driver to support bulk transfers
Siva Durga Prasad Paladugu [Wed, 29 Apr 2015 05:12:10 +0000 (10:42 +0530)]
ci_udc: Update the ci_udc driver to support bulk transfers

Update the ci_udc driver to support bulk transfer
and also added capability of having multiple dtds
if requested data is more than 16K.
These changes are tested for both the DFU and lthor.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
6 years agousb: Remove unused variable in usb_setup_descriptor()
Hans de Goede [Sun, 19 Apr 2015 09:33:21 +0000 (11:33 +0200)]
usb: Remove unused variable in usb_setup_descriptor()

The compiler did not catch this as it was marked __maybe_unused.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
6 years agocosmetic: change Author/MAINTAINER Name from Petermaier to Schmelzer
Hannes Schmelzer [Thu, 28 May 2015 13:41:12 +0000 (15:41 +0200)]
cosmetic: change Author/MAINTAINER Name from Petermaier to Schmelzer

Since i've been married, i also have a new surname.
Mr. Petermaier moved to Mr. Schmelzer.

In this patch i update all files in which my (old) name is present.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
6 years agoam33xx, spl, siemens: enable debug uart output again
Heiko Schocher [Thu, 28 May 2015 05:27:36 +0000 (07:27 +0200)]
am33xx, spl, siemens: enable debug uart output again

a6b541b090: TI ARMv7: Don't use GD before crt0.S has set it

moves the init of the debug uart at the very end of SPL code.
Enable it for the siemens board earlier, as they print
ddr settings ... all debug output before board_init_r()
is here currently useless. Maybe we must rework this
globally?

Signed-off-by: Heiko Schocher <hs@denx.de>
6 years agonet: Fix a warning added by 76ec988
Joe Hershberger [Thu, 21 May 2015 19:16:13 +0000 (14:16 -0500)]
net: Fix a warning added by 76ec988

arm:  +   lsxhl
w+board/buffalo/lsxl/lsxl.c: In function 'rescue_mode':
w+board/buffalo/lsxl/lsxl.c:230:8: warning: unused variable 'enetaddr' [-Wunused-variable]
       arm:  +   lschlv2
w+board/buffalo/lsxl/lsxl.c: In function 'rescue_mode':
w+board/buffalo/lsxl/lsxl.c:230:8: warning: unused variable 'enetaddr' [-Wunused-variable]

Remove the unused variable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agofsl/sata: Replace sprintf() with snprintf()
Tang Yuantian [Wed, 6 May 2015 03:21:33 +0000 (11:21 +0800)]
fsl/sata: Replace sprintf() with snprintf()

Function 'sprintf' does not check buffer boundaries but outputs
to the buffer of fixed size which could potentially cause buffer
overflow. Use a safer function to replace it.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
6 years agogpio: stm32: add stm32f1 support
Matt Porter [Tue, 5 May 2015 19:00:25 +0000 (15:00 -0400)]
gpio: stm32: add stm32f1 support

Add support for the STM32F1 family to the STM32 gpio driver.

Signed-off-by: Matt Porter <mporter@konsulko.com>
6 years agoARMv7M: add STM32F1 support
Matt Porter [Tue, 5 May 2015 19:00:24 +0000 (15:00 -0400)]
ARMv7M: add STM32F1 support

Add ARMv7M STM32F1 support including clocks, timer, gpio, and flash.

Signed-off-by: Matt Porter <mporter@konsulko.com>
6 years agocommon/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()
Matt Porter [Tue, 5 May 2015 19:00:23 +0000 (15:00 -0400)]
common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec()

On ARM v7M, the processor will return to ARM mode when executing
a blx instruction with bit 0 of the address == 0. Always set it
to 1 to stay in thumb mode.

Signed-off-by: Matt Porter <mporter@konsulko.com>
6 years agoimage: fix build when CONFIG_NR_DRAM_BANKS is disabled on ARM
Matt Porter [Tue, 5 May 2015 19:00:22 +0000 (15:00 -0400)]
image: fix build when CONFIG_NR_DRAM_BANKS is disabled on ARM

common/image.c currently implicitly depends on CONFIG_NR_DRAM_BANKS
when CONFIG_ARM is enabled. Make this requirement explicit.

Signed-off-by: Matt Porter <mporter@konsulko.com>
6 years agoARM: bcm283x: Switch to generic timer
Marek Vasut [Mon, 4 May 2015 20:54:37 +0000 (22:54 +0200)]
ARM: bcm283x: Switch to generic timer

Switch to generic timer implementation from lib/time.c .
This also fixes a signed overflow which was in __udelay()
implementation.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tyler Baker <tyler.baker@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
6 years agoARM: bcm283x: Reorder timer.h
Marek Vasut [Mon, 4 May 2015 20:54:35 +0000 (22:54 +0200)]
ARM: bcm283x: Reorder timer.h

Reorder the timer.h file so it can be included from board config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tyler Baker <tyler.baker@linaro.org>
6 years agoARM: bcm283x: Repair wdog.h
Marek Vasut [Mon, 4 May 2015 20:54:34 +0000 (22:54 +0200)]
ARM: bcm283x: Repair wdog.h

Trivially fix the include check in wdog.h.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tyler Baker <tyler.baker@linaro.org>
6 years agovexpress64: use uncompressed kernel by default
Linus Walleij [Wed, 27 May 2015 07:45:39 +0000 (09:45 +0200)]
vexpress64: use uncompressed kernel by default

The foundation model (FVP) emulator nominally boots using
a clean, uncompressed kernel and the "booti" command. Augment
the default U-Boot script to do this.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agokbuild: define DO_DEPS_ONLY for u-boot.cfg to fix build error
Masahiro Yamada [Tue, 26 May 2015 03:51:25 +0000 (12:51 +0900)]
kbuild: define DO_DEPS_ONLY for u-boot.cfg to fix build error

Since 741e58e0fc8e (Create a .cfg file containing the CONFIG options
used to build), all the Blackfin boards fail to build if the parallel
(-j) option is passed.

  $ make -s bf506f-ezkit_defconfig
  #
  # configuration written to .config
  #
  $ make -j8 CROSS_COMPILE=bfin-elf-
  scripts/kconfig/conf --silentoldconfig Kconfig
    CHK     include/config.h
    UPD     include/config.h
    GEN     include/autoconf.mk
    GEN     include/autoconf.mk.dep
    CHK     include/config/uboot.release
    CHK     include/generated/timestamp_autogenerated.h
    UPD     include/generated/timestamp_autogenerated.h
    CFG     u-boot.cfg
  include/asm-offsets.h:3:43: fatal error:
  generated/generic-asm-offsets.h: No such file or directory
  compilation terminated.
  make: *** [u-boot.cfg] Error 1

When parsing header files for defined CONFIG options, DO_DEPS_ONLY
must be defined to exclude generated headers that might not have
been available yet.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomeminfo cmd: Enable printing >=4GiB SDRAM sizes
Andrew Bradford [Fri, 22 May 2015 12:30:14 +0000 (08:30 -0400)]
meminfo cmd: Enable printing >=4GiB SDRAM sizes

gd->ram_size is stored as phys_size_t type which can be bigger than an
unsigned long on some architectures.  When using unsigned long type,
SDRAM of 4GiB or larger will not print the correct size, but using
phys_size_t will.

Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
6 years agospl: spl_mmc: Error and count distinction
Paul Kocialkowski [Fri, 22 May 2015 10:45:35 +0000 (12:45 +0200)]
spl: spl_mmc: Error and count distinction

This introduces a distinction between return codes that are read bytes counts
and errors. Read bytes counts are erroneous when null (no data was read) while
errors are erroneous when non-null.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Tim Harvey <tharvey@gateworks.com>