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11 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Stefano Babic [Sat, 23 Feb 2013 09:13:40 +0000 (10:13 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

11 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 21 Feb 2013 20:30:47 +0000 (21:30 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

11 years agoMerge 'u-boot-microblaze/mainline/arm' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 21 Feb 2013 15:43:19 +0000 (16:43 +0100)]
Merge 'u-boot-microblaze/mainline/arm' into 'u-boot-arm/master'

This pulls the three following ZYNQ commits into ARM master:

7dca54f8: xilinx: zynq: Enable DCC and create new zynq_dcc board
59c651f4: arm: zynq: Add SLCR support with system reset
00ed3458: arm: zynq: Add lowlevel initialization to C

11 years agoam335x evm: Add am335x_evm_spiboot target
Tom Rini [Fri, 8 Feb 2013 11:20:15 +0000 (11:20 +0000)]
am335x evm: Add am335x_evm_spiboot target

This target will move the environment into SPI flash and documents
the expected layout.  We correct the SPL define for where U-Boot is
and remove an unused define.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agodoc/SPL/README.am335x-network: Document using ethernet (and USB) SPL
Ilya Yanok [Fri, 8 Feb 2013 11:20:14 +0000 (11:20 +0000)]
doc/SPL/README.am335x-network: Document using ethernet (and USB) SPL

Added README file with the description of required options and host
configuration to use network SPL with am335x targets.  Briefly discuss
how to use this configuration to program empty boards.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam335x_evm: Add NET environment variables
Chase Maupin [Fri, 8 Feb 2013 11:20:13 +0000 (11:20 +0000)]
am335x_evm: Add NET environment variables

* Add environment variables to support network booting

Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam335x_evm: Add SPI environment variables
Chase Maupin [Fri, 8 Feb 2013 11:20:12 +0000 (11:20 +0000)]
am335x_evm: Add SPI environment variables

* Added variables to support SPI booting
* Note that the first 512KiB are reserved for 4 copies of SPL.

Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam335x_evm: Add NAND environment variables
Chase Maupin [Fri, 8 Feb 2013 11:20:11 +0000 (11:20 +0000)]
am335x_evm: Add NAND environment variables

* Added support to the default environment variables for NAND
  boot.
* Add nandboot to the default bootcmd.

Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoomap3: mvblx: pass FPGA version to the kernel
Michael Jones [Thu, 7 Feb 2013 23:53:37 +0000 (23:53 +0000)]
omap3: mvblx: pass FPGA version to the kernel

Extract FPGA version from the .rbf and pass this info to the kernel.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
11 years agoomap3: mvblx: select fpgafilename according to orientation
Michael Jones [Thu, 7 Feb 2013 23:53:36 +0000 (23:53 +0000)]
omap3: mvblx: select fpgafilename according to orientation

Rather than load the FPGA file from the FAT partition, look
at entry in system EEPROM to decide which file to retrieve directly
from the EXT3 partition.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
11 years agoomap3: mvblx: change console to ttyO0 and make silent by default.
Howard Gray [Thu, 7 Feb 2013 23:53:35 +0000 (23:53 +0000)]
omap3: mvblx: change console to ttyO0 and make silent by default.

Also, change bootdelay to 0 but allow pressing 'S' to stop at U-Boot prompt.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Signed-off-by: Howard Gray <howard.gray@matrix-vision.de>
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
11 years agoOMAP3: igep00x0: Add new IGEP COM PROTON.
Enric Balletbo i Serra [Thu, 7 Feb 2013 00:40:06 +0000 (00:40 +0000)]
OMAP3: igep00x0: Add new IGEP COM PROTON.

The IGEP COM PROTON is a new ultra compact module design with an
on-board ethernet controller.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
11 years agoOMAP3: igep00x0: add missing include mach-types.h
Enric Balletbo i Serra [Thu, 7 Feb 2013 00:40:05 +0000 (00:40 +0000)]
OMAP3: igep00x0: add missing include mach-types.h

Current '#if' directives (used in igep00x0.h config file) comparing MACH_TYPE
values in igep00x0.h doesn't work as expected. The comparision between
CONFIG_MACH_TYPE and MACH_TYPE_IGEP0020 is always true independent of the IGEP
machine configured.

For example, following directive

 if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
    define something
 endif

Is always evaluated true although we configure u-boot for MACH_TYPE_IGEP0030.

The build doesn't shows any error so looks that both defines had always the same
value. Including the mach-types.h file sets properly the value of
MACH_TYPE_IGEPxxxx.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
11 years agoOMAP3: igep00x0: use official board names.
Enric Balletbo i Serra [Thu, 7 Feb 2013 00:40:04 +0000 (00:40 +0000)]
OMAP3: igep00x0: use official board names.

This trivial patch only changes current boards names for the official
names.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
11 years agoam335x_evm: enable support for booting via USB
Ilya Yanok [Tue, 5 Feb 2013 11:36:26 +0000 (11:36 +0000)]
am335x_evm: enable support for booting via USB

This adds necessary config options and a new build target,
am335x_evm_usbspl, to enable usb booting and fixes board_eth_init()
function to take into account that we may have USB ether support in SPL
now.  This uses the same MAC for both cpsw and USB, in order to match
ROM behavior.

The usbspl build target does not contain UART SPL, CPSW SPL or extra
environment settings, so that we may fit within our binary size
constraint.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam33xx: support for booting via usbeth
Ilya Yanok [Tue, 5 Feb 2013 11:36:25 +0000 (11:36 +0000)]
am33xx: support for booting via usbeth

This patch adds BOOT_DEVICE define for USB booting and fixes
spl_board_init function to call arch_misc_init (this is the place there
musb is initialized).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
11 years agospl: support for booting via usbeth
Ilya Yanok [Tue, 5 Feb 2013 11:36:24 +0000 (11:36 +0000)]
spl: support for booting via usbeth

In case of usbeth booting just call net_load_image("usb_ether").
This patch also adds CONFIG_SPL_USBETH_SUPPORT and
CONFIG_SPL_MUSB_NEW_SUPPORT config options to enable linking of SPL
against USB gagdet support and new MUSB driver resp.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
11 years agoam33xx: pcm051: Remove wp pin mux for sd-card
Lars Poeschel [Mon, 4 Feb 2013 23:13:58 +0000 (23:13 +0000)]
am33xx: pcm051: Remove wp pin mux for sd-card

The pcm051 does not have the wp pin connected to the sd-card socket.
Therefore remove the pinmux for the pin. The was a carry-over from
the am335x evm code.

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
11 years agobeagle: expansion boards: add LSR COM6L adapter
robertcnelson@gmail.com [Mon, 4 Feb 2013 06:03:30 +0000 (06:03 +0000)]
beagle: expansion boards: add LSR COM6L adapter

http://www.lsr.com/wireless-products/com6l

The eeprom on this expansion board requires 16bit addressing.

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
11 years agobeagle: expansion boards: retry i2c_read with 16bit addressing
robertcnelson@gmail.com [Mon, 4 Feb 2013 06:03:10 +0000 (06:03 +0000)]
beagle: expansion boards: retry i2c_read with 16bit addressing

Some expansion boards now ship with at24 eeproms that need to communicate
via 16bit addressing.

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
11 years agoda8xx: Add the missing pinmux for da830 to the gpio driver
Tomas Novotny [Fri, 1 Feb 2013 06:46:00 +0000 (06:46 +0000)]
da8xx: Add the missing pinmux for da830 to the gpio driver

The pinmux was generated from linux/arch/arm/mach-davinci/da830.c as of
kernel version 3.7.5. If the driver is used for the da850, then SoC
variant must be specified by CONFIG_SOC_DA850.

Signed-off-by: Tomas Novotny <tomas@novotny.cz>
Cc: Tom Rini <trini@ti.com>
11 years agoda8xx: ea20: Add the configuration define for the exact SoC variant
Tomas Novotny [Fri, 1 Feb 2013 06:44:06 +0000 (06:44 +0000)]
da8xx: ea20: Add the configuration define for the exact SoC variant

Signed-off-by: Tomas Novotny <tomas@novotny.cz>
Cc: Tom Rini <trini@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
11 years agoMerge branch 'fixes' of git://git.denx.de/u-boot-mips
Tom Rini [Fri, 15 Feb 2013 17:23:42 +0000 (12:23 -0500)]
Merge branch 'fixes' of git://git.denx.de/u-boot-mips

11 years agoMIPS: board.c: remove manual relocation of env_name_spec
Daniel Schwierzeck [Fri, 15 Feb 2013 16:53:34 +0000 (17:53 +0100)]
MIPS: board.c: remove manual relocation of env_name_spec

Remove the manual relocation of env_name_spec. This has been missed
in the previous patch series for introducing dynamic relocation
on MIPS.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agox86: Remove unused real mode code
Simon Glass [Thu, 14 Feb 2013 17:38:30 +0000 (17:38 +0000)]
x86: Remove unused real mode code

This code is pretty old and we want to support only 32-bit systems now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agox86: Rename CONFIG_NO_X86_RESET_VECTOR to CONFIG_X86_RESET_VECTOR
Simon Glass [Thu, 14 Feb 2013 04:18:54 +0000 (04:18 +0000)]
x86: Rename CONFIG_NO_X86_RESET_VECTOR to CONFIG_X86_RESET_VECTOR

Invert the polarity of this option to simplify the Makefile logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Gabe Black <gabeblack@chromium.org>
11 years agox86: Remove unneeded cruft from main Makefile
Simon Glass [Thu, 14 Feb 2013 04:18:53 +0000 (04:18 +0000)]
x86: Remove unneeded cruft from main Makefile

These lines are dealt with in the x86 Makefile and link script, so punt
them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Gabe Black <gabeblack@chromium.org>
11 years agox86: Remove sc520 cpu
Simon Glass [Thu, 14 Feb 2013 04:18:52 +0000 (04:18 +0000)]
x86: Remove sc520 cpu

This x86 CPU variant is no longer required as the boards that use it have
been removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agox86: Remove eNET boards
Simon Glass [Thu, 14 Feb 2013 04:18:51 +0000 (04:18 +0000)]
x86: Remove eNET boards

These are no longer used and should be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agoMerge branch 'next' of git://git.denx.de/u-boot-mips
Tom Rini [Wed, 13 Feb 2013 00:03:59 +0000 (19:03 -0500)]
Merge branch 'next' of git://git.denx.de/u-boot-mips

11 years agoMIPS: add dynamic relocation support
Gabor Juhos [Tue, 12 Feb 2013 21:22:13 +0000 (22:22 +0100)]
MIPS: add dynamic relocation support

The code handles relocation entries with the
following relocation types only:
  mips32: R_MIPS_REL32
  mips64: R_MIPS_REL+R_MIPS_64
  xburst: R_MIPS_REL32

Other relocation entries are skipped without
processing. The code must be extended if other
relocation types must be supported.

Add -pie to LDFLAGS_FINAL to generate the .rel.dyn
fixup table, which will be applied to the relocated
image before transferring control to it.

The CONFIG_NEEDS_MANUAL_RELOC is not needed
after the patch, so remove that as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: u-boot.lds: add relocation specific sections
Gabor Juhos [Tue, 12 Feb 2013 21:22:13 +0000 (22:22 +0100)]
MIPS: u-boot.lds: add relocation specific sections

This section contain the table needed for dynamic
relocation. Also provide symbols for the relocation
code to access the table.

Discard all sections which are not needed in the final
ELF binary and U-Boot image. Section .dynsym cannot be
discarded or GNU ld crashes otherwise. This section
will be stripped by GNU objcpy in a later patch.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: start.S: use symbol __image_copy_end for U-Boot image relocation
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:13 +0000 (22:22 +0100)]
MIPS: start.S: use symbol __image_copy_end for U-Boot image relocation

Use the newly introduced symbol __image_copy_end as end address for
relocation of U-Boot image. This is needed for dynamic relocation added
in later patches. This patch obsoletes the symbols uboot_end and
uboot_end_data which are removed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: start.S: optimize BSS initialization
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:13 +0000 (22:22 +0100)]
MIPS: start.S: optimize BSS initialization

Get the start and end address for clearing BSS from the newly
introduced symbols __bss_start and __bss_end. After GOT is
relocated, those symbols are already pointing to the correct
addresses.

Also optimize the loop by moving the address incrementation
to the delay slot to avoid the initial sub instruction.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: board.c: switch to new symbols __bss_end and __image_copy_end
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:12 +0000 (22:22 +0100)]
MIPS: board.c: switch to new symbols __bss_end and __image_copy_end

Use the newly introduced symbols __image_copy_end and __bss_end
for setting up the memory area for the relocated U-Boot.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: u-boot.lds: introduce symbol __image_copy_end
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:12 +0000 (22:22 +0100)]
MIPS: u-boot.lds: introduce symbol __image_copy_end

This symbol is used in later patches as end address
for relocation of the U-Boot image into RAM.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: u-boot.lds: merge all BSS sections and introduce symbols __bss_[start|end]
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:12 +0000 (22:22 +0100)]
MIPS: u-boot.lds: merge all BSS sections and introduce symbols __bss_[start|end]

These symbols are used in later patches for as addresses for
clearing the BSS area in the relocated U-Boot image.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: compute num_got_entries from .got section's size
Gabor Juhos [Tue, 12 Feb 2013 21:22:12 +0000 (22:22 +0100)]
MIPS: compute num_got_entries from .got section's size

The '__got_start' and '__got_end' symbols are used
only in the linker script to compute the value of
the 'num_got_entries' symbol.

Remove the symbols and use the SIZEOF(.got) command
to get the size of the .got section.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: start.S: unify and simplify reset vector handling
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:12 +0000 (22:22 +0100)]
MIPS: start.S: unify and simplify reset vector handling

Adopt reset vector handling from Yamon.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: start.S: remove obsolete 64 bit handling in setup_c0_status
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:12 +0000 (22:22 +0100)]
MIPS: start.S: remove obsolete 64 bit handling in setup_c0_status

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: xburst: fix broken access to global_data
Daniel Schwierzeck [Tue, 12 Feb 2013 21:22:12 +0000 (22:22 +0100)]
MIPS: xburst: fix broken access to global_data

Fix access to global_data which is broken since commits:

commit 035cbe99cd2fd4adf9d7fd95aeebb5f814e37eb9
Author: Simon Glass <sjg@chromium.org>
Date:   Thu Dec 13 20:49:08 2012 +0000

    mips: Move per_clk and dev_clk to arch_global_data

    Move these field into arch_global_data and tidy up. The other
    CONFIG_JZSOC fields are used by various architectures, so just remove
    the #ifdef bracketing for these.

Signed-off-by: Simon Glass <sjg@chromium.org>
commit 582601da2f90b1850aa19f7820b1623c79b3dac6
Author: Simon Glass <sjg@chromium.org>
Date:   Thu Dec 13 20:48:35 2012 +0000

    arm: Move lastinc to arch_global_data

    Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
commit 66ee69234795c0596f84b25f06b7fbc2e8ed214c
Author: Simon Glass <sjg@chromium.org>
Date:   Thu Dec 13 20:48:34 2012 +0000

    arm: Move tbl to arch_global_data

    Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
11 years agoam335x_evm: Fix CPSW ethernet on GP EVM and EVM-SK
Tom Rini [Tue, 12 Feb 2013 19:59:23 +0000 (14:59 -0500)]
am335x_evm: Fix CPSW ethernet on GP EVM and EVM-SK

In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay
for RGMII mode not supported).  This in turn however requires that we
set the tx clock delay feature in the PHY itself.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoi.MX6Q: mx6qsabre*: Configure to allow CONFIG_SYS_ALT_MEMTEST
Eric Nelson [Fri, 1 Feb 2013 08:08:45 +0000 (08:08 +0000)]
i.MX6Q: mx6qsabre*: Configure to allow CONFIG_SYS_ALT_MEMTEST

In order to use the more thorough memory test, the macro
CONFIG_SYS_MEMTEST_SCRATCH must be defined with a usable
address.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
11 years agomx23evk: Turn on caches
Fabio Estevam [Mon, 28 Jan 2013 01:41:01 +0000 (01:41 +0000)]
mx23evk: Turn on caches

It is safe to turn on data and instruction caches for mx23.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agomx23evk: Remove CONFIG_SYS_BAUDRATE_TABLE
Fabio Estevam [Mon, 28 Jan 2013 01:41:00 +0000 (01:41 +0000)]
mx23evk: Remove CONFIG_SYS_BAUDRATE_TABLE

The baudrate is already defined by CONFIG_BAUDRATE and there is no need
to keep CONFIG_SYS_BAUDRATE_TABLE.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agobuild: imx: Fix 'u-boot.imx' build without full OBJTREE reference
Otavio Salvador [Mon, 11 Feb 2013 04:33:51 +0000 (04:33 +0000)]
build: imx: Fix 'u-boot.imx' build without full OBJTREE reference

When calling 'make u-boot.imx' the build were failing as it were
expecting the full path for the file; this regression has been
included by commit 71a988a (imximage.cfg: run files through C
preprocessor).

The direct references for u-boot.imx were replaced by $(obj) as
config.mk handles the proper setting of it making it set to $(OBJTREE)
when required.

The build has been test using:

 - ./MAKEALL -s mx5 -s mx6
 - make u-boot.imx
 - make O=/tmp/build

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Tue, 12 Feb 2013 15:18:31 +0000 (10:18 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

11 years agomx6: Disable Power Down Bit of watchdog
Fabio Estevam [Thu, 7 Feb 2013 06:45:23 +0000 (06:45 +0000)]
mx6: Disable Power Down Bit of watchdog

On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted
and it is not able to reach the Linux prompt.

Comparing the watchdog behaviour on a revB versus revC board:

- On a mx6qsabresd revB:

U-Boot > reset
resetting ...

U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46)

CPU:   Freescale i.MX6Q rev1.1 at 792 MHz
Reset cause: WDOG
...

- On a mx6qsabresd revC:

U-Boot > reset
resetting ...

U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46)

CPU:   Freescale i.MX6Q rev1.1 at 792 MHz
Reset cause: POR

So due to revC POR/watchdog circuitry whenever a watchdog occurs, it causes a POR.

Clearing the PDE - Power Down Enable bit of WMCR registers fixes the problem and
is also safe for all mx6 boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
11 years agoimx: mx6q DDR3 init: Benefit from available CL = 7
Benoît Thébaudeau [Wed, 30 Jan 2013 11:19:18 +0000 (11:19 +0000)]
imx: mx6q DDR3 init: Benefit from available CL = 7

All the users of mx6q_4x_mt41j128.cfg (DDR3-1333H Micron MT41J128M16HA-15E or SK
hynix H5TQ2G63BFR-H9C for i.MX6Q SABRE Lite, and DDR3-1600K Micron
MT41K128M16JT-125:K for i.MX6 SABRE SD) support the optional down binning to
DDR3-1066F (CL = 7, CWL = 6), which is possible at 532 MHz, so use it.

In these conditions:
  tRCD(min) = 13.125 ns
  tRP(min) = 13.125 ns
  tRC(min) = max(tRAS(min, DDR3-1333H), tRAS(min, DDR3-1600K)) + tRP(min)
  tRAS(min, DDR3-1333H) = 36 ns
  tRAS(min, DDR3-1600K) = 35 ns

MMDC1_MDCFG0.tCL should be set to 7 nCK, encoded as 0x4 in the bit-field
MMDC1_MDCFG0[3:0].

MR0.CL should be set as in MMDC1_MDCFG0.tCL, i.e. to 7 nCK, which is encoded
as 0x6 in MRS.LMR.MR0.{A6:A4, A2} and MMDC1_MDSCR[22:20, 18].

MMDC1_MDCFG1.tCWL should be set to 6 nCK, encoded as 0x4 in the bit-field
MMDC1_MDCFG1[2:0].

MMDC1_MDCFG1.tRCD should be set to 13.125 ns, which is 7 nCK at 532 MHz, encoded
as 0x6 in the bit-field MMDC1_MDCFG1[31:29].

MMDC1_MDCFG1.tRP should be set to 13.125 ns, which is 7 nCK at 532 MHz, encoded
as 0x6 in the bit-field MMDC1_MDCFG1[28:26].

MMDC1_MDCFG1.tRC should be set to 49.125 ns, which is 27 nCK at 532 MHz, encoded
as 0x1A in the bit-field MMDC1_MDCFG1[25:21].

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
11 years agoimx: mx6q DDR3 init: Fix MR0.PPD
Benoît Thébaudeau [Wed, 30 Jan 2013 11:19:17 +0000 (11:19 +0000)]
imx: mx6q DDR3 init: Fix MR0.PPD

MR0.PPD should be set as in MMDCx_MDPDC.SLOW_PD, i.e. to fast-exit mode, which
is encoded as 1 in MRS.LMR.MR0.A12 and MMDCx_MDSCR[28].

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
11 years agoimx: mx6q DDR3 init: Fix RST_to_CKE
Benoît Thébaudeau [Wed, 30 Jan 2013 11:19:16 +0000 (11:19 +0000)]
imx: mx6q DDR3 init: Fix RST_to_CKE

MMDC1_MDOR.RST_to_CKE should be set to 500 Âµs according to the JEDEC
specification for DDR3. With a cycle of 15.258 Âµs, this gives 33 cycles encoded
as 0x23 for the bit-field MMDC1_MDOR[5:0].

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
11 years agoimx: mx6q DDR3 init: Fix SDE_to_RST
Benoît Thébaudeau [Wed, 30 Jan 2013 11:19:15 +0000 (11:19 +0000)]
imx: mx6q DDR3 init: Fix SDE_to_RST

MMDC1_MDOR.SDE_to_RST should be set to 200 Âµs according to the JEDEC
specification for DDR3. With a cycle of 15.258 Âµs, this gives 14 cycles encoded
as 0x10 for the bit-field MMDC1_MDOR[13:8].

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
11 years agoimx: mx6q DDR3 init: Fix tXPR
Benoît Thébaudeau [Wed, 30 Jan 2013 11:19:14 +0000 (11:19 +0000)]
imx: mx6q DDR3 init: Fix tXPR

MMDC1_MDOR.tXPR should be set as specified for the JEDEC DDR3 timing tXPR.

For all DDR3 speed bins:
  tXPR(min) = max(5 nCK, tRFC(min) + 10 ns)
  tRFC(2 Gb) = 160 ns

All the users of mx6q_4x_mt41j128.cfg have a 2-Gb density (Micron
MT41J128M16HA-15E or SK hynix H5TQ2G63BFR-H9C for i.MX6Q SABRE Lite, and Micron
MT41K128M16JT-125:K for i.MX6 SABRE SD).

Hence, MMDC1_MDOR.tXPR should be set to max(5 nCK, 170 ns), which is 170 ns
and 91 nCK at 532 MHz, encoded as 0x5A in the bit-field MMDC1_MDOR[23:16].

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
11 years agoimx: mx6q DDR3 init: Fix tMRD
Benoît Thébaudeau [Wed, 30 Jan 2013 11:19:13 +0000 (11:19 +0000)]
imx: mx6q DDR3 init: Fix tMRD

MMDC1_MDCFG1.tMRD should be set to max(tMRD, tMOD) for DDR3.

For all DDR3 speed bins:
  tMRD(min) = 4 nCK
  tMOD(min) = max(12 nCK, 15 ns)

Hence, MMDC1_MDCFG1.tMRD should be set to max(12 nCK, 15 ns), which is 12 nCK
at 532 MHz, encoded as 0xB in the bit-field MMDC1_MDCFG1[8:5].

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
11 years agoarm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the README
Lucas Stach [Tue, 22 Jan 2013 00:15:49 +0000 (00:15 +0000)]
arm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the README

No one expects to end up in a delayed environment if
CONFIG_DELAY_ENVIRONMENT isn't defined.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
11 years agoTegra114: Add/enable Dalmore build (T114 reference board)
Tom Warren [Mon, 28 Jan 2013 13:32:13 +0000 (13:32 +0000)]
Tegra114: Add/enable Dalmore build (T114 reference board)

This build is stripped down. It boots to the command prompt.
GPIO is the only peripheral supported. Others TBD.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra114: Add generic Tegra114 build support
Tom Warren [Mon, 28 Jan 2013 13:32:12 +0000 (13:32 +0000)]
Tegra114: Add generic Tegra114 build support

This patch adds basic Tegra114 (T114) build support - no specific
board is targeted.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra114: Dalmore: Add DT files
Tom Warren [Mon, 28 Jan 2013 13:32:11 +0000 (13:32 +0000)]
Tegra114: Dalmore: Add DT files

These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra114: Add common CPU (shared) files
Tom Warren [Mon, 28 Jan 2013 13:32:10 +0000 (13:32 +0000)]
Tegra114: Add common CPU (shared) files

These files are used by both SPL and main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra114: Add CPU (armv7) files
Tom Warren [Mon, 28 Jan 2013 13:32:09 +0000 (13:32 +0000)]
Tegra114: Add CPU (armv7) files

These files are for code that runs on the CPU (A15) on T114 boards.
At this time, there is no A15-specific code here.
As T114-specific run-time code is added, it'll go here.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra114: Add AVP (arm720t) files
Tom Warren [Mon, 28 Jan 2013 13:32:08 +0000 (13:32 +0000)]
Tegra114: Add AVP (arm720t) files

This provides SPL support for T114 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra114: Add arch-tegra114 include files
Tom Warren [Mon, 28 Jan 2013 13:32:07 +0000 (13:32 +0000)]
Tegra114: Add arch-tegra114 include files

Common Tegra files are in arch-tegra, shared between T20/T30/T114.
Tegra114-specific headers are in arch-tegra114. Note that some of
these will be filled in as more T114 support is added (drivers,
WB/LP0 support, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra: cardhu: config: enable SPI
Allen Martin [Tue, 29 Jan 2013 13:51:29 +0000 (13:51 +0000)]
tegra: cardhu: config: enable SPI

Turn on SPI in cardhu config file

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: add SPI SLINK driver
Allen Martin [Tue, 29 Jan 2013 13:51:28 +0000 (13:51 +0000)]
tegra: add SPI SLINK driver

Add driver for tegra SPI "SLINK" style driver.  This controller is
similar to the tegra20 SPI "SFLASH" controller.  The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices.  In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH.  Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.

This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings.  Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.

To enable this driver, use CONFIG_TEGRA_SLINK

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: add addresses of SPI SLINK controllers
Allen Martin [Tue, 29 Jan 2013 13:51:27 +0000 (13:51 +0000)]
tegra: add addresses of SPI SLINK controllers

Add I/O addresses of SPI SLINK controllers 1-6

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra30: fdt: add SPI SLINK nodes
Allen Martin [Tue, 29 Jan 2013 13:51:26 +0000 (13:51 +0000)]
tegra30: fdt: add SPI SLINK nodes

Add tegra30 SPI SLINK nodes to fdt.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra30: add SBC1 to periph id mapping table
Allen Martin [Tue, 29 Jan 2013 13:51:25 +0000 (13:51 +0000)]
tegra30: add SBC1 to periph id mapping table

SBC1 is SPI controller 1 on tegra30

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: spi: add fdt support to tegra SPI SFLASH driver
Allen Martin [Tue, 29 Jan 2013 13:51:24 +0000 (13:51 +0000)]
tegra: spi: add fdt support to tegra SPI SFLASH driver

Add support for configuring tegra SPI driver from devicetree.
Support is keyed off CONFIG_OF_CONTROL.  Add entry in seaboard dts
file for spi controller to describe seaboard spi.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra20: fdt: add SPI SFLASH node
Allen Martin [Tue, 29 Jan 2013 13:51:23 +0000 (13:51 +0000)]
tegra20: fdt: add SPI SFLASH node

Add node for tegra20 SPI SFLASH controller to fdt.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: don't hard-code LCD into default TEGRA_DEVICE_SETTINGS
Stephen Warren [Tue, 22 Jan 2013 06:20:07 +0000 (06:20 +0000)]
tegra: don't hard-code LCD into default TEGRA_DEVICE_SETTINGS

Only add "lcd" into TEGRA_DEVICE_SETTINGS if CONFIG_VIDEO_TEGRA.
Otherwise, "lcd" is meaningless.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: rename FUNCMUX_UART2_UARTB
Stephen Warren [Tue, 22 Jan 2013 06:20:08 +0000 (06:20 +0000)]
tegra: rename FUNCMUX_UART2_UARTB

FUNCMUX_ defines should be named after the pin groups they affect, not
after the module they're muxing onto those pin groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra: Move common clock code to arch/arm/cpu/tegra-common/clock.c
Tom Warren [Wed, 23 Jan 2013 21:01:01 +0000 (14:01 -0700)]
Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.c

This 'commonizes' much of the clock/pll code. SoC-dependent code
and tables are left in arch/cpu/tegraXXX-common/clock.c

Some T30 tables needed whitespace fixes due to checkpatch complaints.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry
Tom Warren [Fri, 18 Jan 2013 20:36:26 +0000 (13:36 -0700)]
Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: fdt: add back missing host1x node
Allen Martin [Fri, 25 Jan 2013 08:46:47 +0000 (08:46 +0000)]
tegra: fdt: add back missing host1x node

Add back host1x node to seaboard dts file.  This got dropped during
the tegra fdt sort.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoClean up libfdt.h includes
Gerald Van Baren [Fri, 8 Feb 2013 00:49:54 +0000 (19:49 -0500)]
Clean up libfdt.h includes

The libfdt.h file is the definition file for libfdt.  It is unnecessary
to include other fdt header files (the necessary ones are pulled in
by libfdt.h).

Signed-off-by: Gerald Van Baren <gvb@unssw.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefan Roese <sr@denx.de>
11 years agocommon/fdt_support.c: sparse fixes
Kim Phillips [Wed, 16 Jan 2013 14:00:11 +0000 (14:00 +0000)]
common/fdt_support.c: sparse fixes

trivial:

fdt_support.c:89:64: warning: Using plain integer as NULL pointer
fdt_support.c:325:65: warning: Using plain integer as NULL pointer
fdt_support.c:352:65: warning: Using plain integer as NULL pointer

For the following bad constant expression, We hardcode the max. number of
memory banks to four for the foreseeable future, and add an error with
instructions on what to do once it's exceeded:

fdt_support.c:397:22: error: bad constant expression

For the rest below, sparse found a couple of wrong endian conversions
in of_bus_default_translate() and fdt_get_base_address(), but
otherwise the rest is mostly annotation fixes:

fdt_support.c:64:24: warning: cast to restricted __be32
fdt_support.c:192:21: warning: incorrect type in assignment (different base types)
fdt_support.c:192:21:    expected unsigned int [unsigned] [usertype] tmp
fdt_support.c:192:21:    got restricted __be32 [usertype] <noident>
fdt_support.c:201:21: warning: incorrect type in assignment (different base types)
fdt_support.c:201:21:    expected unsigned int [unsigned] [addressable] [usertype] tmp
fdt_support.c:201:21:    got restricted __be32 [usertype] <noident>
fdt_support.c:304:13: warning: incorrect type in assignment (different base types)
fdt_support.c:304:13:    expected unsigned int [unsigned] [usertype] val
fdt_support.c:304:13:    got restricted __be32 [usertype] <noident>
fdt_support.c:333:13: warning: incorrect type in assignment (different base types)
fdt_support.c:333:13:    expected unsigned int [unsigned] [usertype] val
fdt_support.c:333:13:    got restricted __be32 [usertype] <noident>
fdt_support.c:359:13: warning: incorrect type in assignment (different base types)
fdt_support.c:359:13:    expected unsigned int [unsigned] [usertype] val
fdt_support.c:359:13:    got restricted __be32 [usertype] <noident>
fdt_support.c:373:21: warning: cast to restricted __be32
fdt_support.c:963:48: warning: incorrect type in argument 1 (different base types)
fdt_support.c:963:48:    expected restricted __be32 const [usertype] *p
fdt_support.c:963:48:    got unsigned int [usertype] *<noident>
fdt_support.c:971:48: warning: incorrect type in argument 1 (different base types)
fdt_support.c:971:48:    expected restricted __be32 const [usertype] *p
fdt_support.c:971:48:    got unsigned int [usertype] *<noident>
fdt_support.c:984:29: warning: incorrect type in argument 1 (different base types)
fdt_support.c:984:29:    expected restricted __be32 const [usertype] *cell
fdt_support.c:984:29:    got unsigned int [usertype] *addr
fdt_support.c:996:32: warning: incorrect type in argument 1 (different base types)
fdt_support.c:996:32:    expected restricted __be32 const [usertype] *cell
fdt_support.c:996:32:    got unsigned int [usertype] *addr
fdt_support.c:1041:41: warning: incorrect type in argument 1 (different base types)
fdt_support.c:1041:41:    expected restricted __be32 const [usertype] *cell
fdt_support.c:1041:41:    got unsigned int [usertype] *addr
fdt_support.c:1053:41: warning: incorrect type in argument 2 (different base types)
fdt_support.c:1053:41:    expected restricted __be32 const [usertype] *range
fdt_support.c:1053:41:    got unsigned int const [usertype] *[assigned] ranges
fdt_support.c:1064:53: warning: incorrect type in argument 2 (different base types)
fdt_support.c:1064:53:    expected restricted __be32 const [usertype] *addr
fdt_support.c:1064:53:    got unsigned int [usertype] *addr
fdt_support.c:1110:50: warning: incorrect type in argument 2 (different base types)
fdt_support.c:1110:50:    expected restricted __be32 const [usertype] *addr
fdt_support.c:1110:50:    got unsigned int *<noident>
fdt_support.c:1121:49: warning: incorrect type in argument 1 (different base types)
fdt_support.c:1121:49:    expected restricted __be32 const [usertype] *cell
fdt_support.c:1121:49:    got unsigned int *<noident>
fdt_support.c:1147:60: warning: incorrect type in argument 2 (different base types)
fdt_support.c:1147:60:    expected restricted __be32 const [usertype] *addr
fdt_support.c:1147:60:    got unsigned int *<noident>
fdt_support.c:1081:5: warning: symbol '__of_translate_address' was not declared. Should it be static?
fdt_support.c:1154:5: error: symbol 'fdt_translate_address' redeclared with different type (originally declared at include/fdt_support.h:95) - incompatible argument 3 (different base types)
fdt_support.c: In function 'fdt_node_offset_by_compat_reg':
fdt_support.c:1173:17: warning: initialization discards 'const' qualifier from pointer target type [enabled by default]

See also linux kernel commit 0131d897 "of/address: use proper
endianess in get_flags".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Jerry Van Baren <gvb.uboot@gmail.com>
11 years agolibfdt: update from upstream dtc commit 142419e
Kim Phillips [Wed, 16 Jan 2013 13:59:50 +0000 (13:59 +0000)]
libfdt: update from upstream dtc commit 142419e

commit 142419e "dtc/libfdt: sparse fixes", for u-boot's libfdt copy.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Jerry Van Baren <gvb.uboot@gmail.com>
11 years agolibfdt: update fdt.h from upstream dtc
Kim Phillips [Wed, 16 Jan 2013 13:59:43 +0000 (13:59 +0000)]
libfdt: update fdt.h from upstream dtc

upstream dtc commit feafcd972cb744750a65728440c99526e6199a6d
"dtc/libfdt: introduce fdt types for annotation by endian checkers".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Jerry Van Baren <gvb.uboot@gmail.com>
11 years agolibfdt_env.h: add fdt type definitions
Kim Phillips [Wed, 16 Jan 2013 13:59:34 +0000 (13:59 +0000)]
libfdt_env.h: add fdt type definitions

fdt types are big endian.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Jerry Van Baren <gvb.uboot@gmail.com>
11 years agotreewide: include libfdt_env.h before fdt.h
Kim Phillips [Wed, 16 Jan 2013 13:59:04 +0000 (13:59 +0000)]
treewide: include libfdt_env.h before fdt.h

and, if including libfdt.h which includes libfdt_env.h in
the correct order, don't include fdt.h before libfdt.h.

this is needed to get the fdt type definitions set from
the project environment before fdt.h uses them.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Jerry Van Baren <gvb.uboot@gmail.com>
11 years agofdt: fix dts preprocessor options
Allen Martin [Tue, 8 Jan 2013 16:07:54 +0000 (16:07 +0000)]
fdt: fix dts preprocessor options

Using "-ansi" preprocessor option will cause dts lines that begin with
'#' to choke the preprocessor.  Change to "-x assembler-with-cpp"
instead which is what the kernel uses to preprocess dts files.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoam33xx: Drop gpio0_7_pin_mux from phytec pcm051
Tom Rini [Mon, 4 Feb 2013 17:21:39 +0000 (12:21 -0500)]
am33xx: Drop gpio0_7_pin_mux from phytec pcm051

This mux is not currently used and appears to be a carry-over from the
am335x evm code.

Acked-by: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoOMAP3: igep00x0: fix a build warning on IGEP boards
Javier Martinez Canillas [Sat, 26 Jan 2013 12:18:32 +0000 (13:18 +0100)]
OMAP3: igep00x0: fix a build warning on IGEP boards

commit b689cd5 OMAP3: use a single board file for IGEP devices

introduced the following build warning:

igep00x0.h:168:24: warning: backslash-newline at end of file [enabled
by default]

This patch fixes the issue.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
11 years agoAM335X: Set fdt_high for AM335X devices to enable booting with Device Tree
hvaibhav@ti.com [Tue, 18 Sep 2012 09:26:05 +0000 (09:26 +0000)]
AM335X: Set fdt_high for AM335X devices to enable booting with Device Tree

For AM335X boards, such as the EVM and Bone Linux kernel fails to
locate the device tree blob on boot. The reason being is that
u-boot is copying the DT blob to the upper part of RAM when booting
the kernel and the kernel is unable to access the blob.
By setting the fdt_high variable to 0xffffffff (to prevent the copy)
the kernel is able to locate the DT blob and boot.

This patch is tested on BeagleBone platform.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Tom Rini <trini@ti.com>
11 years agoAdd DDR3 support for AM335x-EVM (Version 1.5A)
Jeff Lance [Mon, 14 Jan 2013 05:32:20 +0000 (05:32 +0000)]
Add DDR3 support for AM335x-EVM (Version 1.5A)

AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the
DDR3 chip.

[Hebbar Gururaja <gururaja.hebbar@ti.com>]
- Resolve merge conflict while rebasing. File structure is
  changed in the mainline. So re-arrange the code accordingly.
- Update commit message to reflect the DDR3 part number

Signed-off-by: Jeff Lance <j-lance1@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
11 years agoam335x: display msg when reading MAC from efuse
Lars Poeschel [Fri, 11 Jan 2013 00:53:32 +0000 (00:53 +0000)]
am335x: display msg when reading MAC from efuse

When ethaddr is not set in environment the MAC address is read
from efuse. The message was only printed in debug case, but this
message could be of interest for the ordinary user, so printf it.

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
11 years agopcm051: Add support for Phytec phyCORE-AM335x
Lars Poeschel [Fri, 11 Jan 2013 00:53:31 +0000 (00:53 +0000)]
pcm051: Add support for Phytec phyCORE-AM335x

The board is named pcm051 and has this hardware:
SOC: TI AM3359
DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB
ETH 1: LAN8710AI
SPI-Flash: W25Q64BVSSIG
RTC: RV-4162-C7
I2C-EEPROM: CAT32WC32
NAND: MT29F4G08_VFPGA63
PMIC: TPS65910A3
LCD

Supported:
UART 1
MMC/SD
ETH 1
USB
I2C
SPI

Not yet supported:
NAND
RTC
LCD

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
[trini: Add #define CONFIG_PHY_ADDR 0 to config]
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam33xx: add a pulldown macro to pinmux config
Lars Poeschel [Fri, 11 Jan 2013 00:53:30 +0000 (00:53 +0000)]
am33xx: add a pulldown macro to pinmux config

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
11 years agoomap4: allow the use of a plain text env file instead boot scripts
Javier Martinez Canillas [Mon, 7 Jan 2013 03:51:20 +0000 (03:51 +0000)]
omap4: allow the use of a plain text env file instead boot scripts

For production systems it is better to use script images since
they are protected by checksums and carry valuable information like
name and timestamp. Also, you can't validate the content passed to
env import.

But for development, it is easier to use the env import command and
plain text files instead of script-images.

Since both OMAP4 supported boards (Panda and TI SDP4430) are used
primarily for development, this patch allows U-Boot to load env var
from a text file in case that an boot.scr script-image is not present.

The variable uenvcmd (if existent) will be executed (using run) after
uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence
will be started.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Nishanth Menon <nm@ti.com>
11 years agoOMAP3: igep00x0: add boot status GPIO LED
Javier Martinez Canillas [Thu, 27 Dec 2012 03:36:01 +0000 (03:36 +0000)]
OMAP3: igep00x0: add boot status GPIO LED

This patch adds an GPIO LED boot status for IGEP boards.

The GPIO LED used is the red LED0 while the Linux kernel
uses the green LED0 as the boot status.

By using different GPIO LEDs, the user can know in which
step of the boot process the board currently is.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
11 years agoOMAP3: use a single board file for IGEP devices
Javier Martinez Canillas [Thu, 27 Dec 2012 01:35:56 +0000 (01:35 +0000)]
OMAP3: use a single board file for IGEP devices

Even when the IGEPv2 board and the IGEP Computer-on-Module
are different from a form factor point of view, they are
very similar in the fact that share many components and how
they are wired.

So, it is possible (and better) to have a single board file
for both devices and just use the CONFIG_MACH_TYPE to make
a differentiation between each board when needed.

This change avoids code duplication by removing 298 lines of
code and makes future maintenance easier.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
11 years agoarm: zynq: Add lowlevel initialization to C
Michal Simek [Mon, 4 Feb 2013 11:42:25 +0000 (12:42 +0100)]
arm: zynq: Add lowlevel initialization to C

Do lowlevel initialization directly in C. Zynq do not
require to do it in asm.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agoarm: zynq: Add SLCR support with system reset
Michal Simek [Mon, 4 Feb 2013 11:38:59 +0000 (12:38 +0100)]
arm: zynq: Add SLCR support with system reset

The patch provides slcr base address initialization support
and a support to reset the cpu through slcr driver,
hence removed the reset_cpu() from board.c.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agoxilinx: zynq: Enable DCC and create new zynq_dcc board
Michal Simek [Mon, 4 Feb 2013 14:23:17 +0000 (15:23 +0100)]
xilinx: zynq: Enable DCC and create new zynq_dcc board

Enable DCC driver for arm zynq platform to be compiled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agosf: stmicro: Add support for N25Q256A
Jagannadha Sutradharudu Teki [Tue, 29 Jan 2013 11:43:38 +0000 (17:13 +0530)]
sf: stmicro: Add support for N25Q256A

Add support for Numonyx N25Q256A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agosf: stmicro: Add support for N25Q32A
Jagannadha Sutradharudu Teki [Tue, 29 Jan 2013 11:43:37 +0000 (17:13 +0530)]
sf: stmicro: Add support for N25Q32A

Add support for Numonyx N25Q32A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agosf: stmicro: Add support for N25Q32
Jagannadha Sutradharudu Teki [Tue, 29 Jan 2013 11:43:36 +0000 (17:13 +0530)]
sf: stmicro: Add support for N25Q32

Add support for Numonyx N25Q32 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agosf: stmicro: Add support for N25Q64A
Jagannadha Sutradharudu Teki [Wed, 23 Jan 2013 12:51:45 +0000 (18:21 +0530)]
sf: stmicro: Add support for N25Q64A

Add support for Numonyx N25Q64A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agosf: winbond: Add W25Q64W
Jagannadha Sutradharudu Teki [Wed, 23 Jan 2013 12:29:29 +0000 (13:29 +0100)]
sf: winbond: Add W25Q64W

Add support for Winbond's W25Q64W SPI flash.
This device is used on xilinx zynq emulation platform.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agosf: spansion: Correct the first byte of idcode1 for S25FL256S part
Jagannadha Sutradharudu Teki [Fri, 14 Sep 2012 15:16:11 +0000 (20:46 +0530)]
sf: spansion: Correct the first byte of idcode1 for S25FL256S part

This patch corrected the first byte of idcode1 for S25FL256S SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>