karo-tx-uboot.git
7 years agocros_ec: spi: Add support for EC protocol version 3
Randall Spangler [Thu, 27 Feb 2014 20:26:10 +0000 (13:26 -0700)]
cros_ec: spi: Add support for EC protocol version 3

Protocol version 3 will be attempted first; if the EC doesn't support
it, u-boot will fall back to the old protocol version (2).

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Add base support for protocol v3
Simon Glass [Thu, 27 Feb 2014 20:26:09 +0000 (13:26 -0700)]
cros_ec: Add base support for protocol v3

Protocol v2 was shipped with snow, link and spring. Protocol v3 is for
pit and is targetted at SPI operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Clean up multiple EC protocol support
Randall Spangler [Thu, 27 Feb 2014 20:26:08 +0000 (13:26 -0700)]
cros_ec: Clean up multiple EC protocol support

Version 1 protocols (without command version) were already no longer
supported in cros_ec.c.  This removes some dead code from the
cros_ec_i2c driver.

Version 2 protcols (with command version) are now called
protocol_version=2, instead of cmd_version_is_supported=1.

A subsequent change will introduce protocol version 3 for SPI.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Sync up with latest Chrome OS EC version
Simon Glass [Thu, 27 Feb 2014 20:26:07 +0000 (13:26 -0700)]
cros_ec: Sync up with latest Chrome OS EC version

The EC messages have been expanded and some parts have been renamed.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Move #ifdef to permit flash region access
Simon Glass [Thu, 27 Feb 2014 20:26:06 +0000 (13:26 -0700)]
cros_ec: Move #ifdef to permit flash region access

Flash region access is not tied to having commands, so adjust the #ifdef
to reflect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Support systems with no EC interrupt
Simon Glass [Thu, 27 Feb 2014 20:26:05 +0000 (13:26 -0700)]
cros_ec: Support systems with no EC interrupt

Some systems do not have an EC interrupt. Rather than assuming that the
interrupt is always present, and hanging forever waiting for more input,
handle the missing interrupt. This works by reading key scans only until
we get an identical one. This means the EC keyscan FIFO is empty.

Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Drop old EC version support from EC driver
Vadim Bendebury [Thu, 27 Feb 2014 20:26:04 +0000 (13:26 -0700)]
cros_ec: Drop old EC version support from EC driver

There is no need to support old style EC moving forward. Ultimately we
should get rid of the check_version() API. For now just return error
in case the EC does not seem to support the new API.

Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Tested-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Add a function for decoding the Chrome OS EC flashmap
Simon Glass [Thu, 27 Feb 2014 20:26:03 +0000 (13:26 -0700)]
cros_ec: Add a function for decoding the Chrome OS EC flashmap

In order to talk to the EC properly we need to be able to understand the
layout of its internal flash memory. This permits emulation of the EC
for sandbox, and also software update in a system with a real EC.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Move EC interface into common library
Vadim Bendebury [Thu, 27 Feb 2014 20:26:02 +0000 (13:26 -0700)]
cros_ec: Move EC interface into common library

Add a common library for obtaining access to the Chrome OS EC. This is
used by boards which need to talk to the EC.

Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Tested-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Add a function for reading a flash map entry
Simon Glass [Thu, 27 Feb 2014 20:26:01 +0000 (13:26 -0700)]
cros_ec: Add a function for reading a flash map entry

A flash map describes the layout of flash memory in terms of offsets and
sizes for each region. Add a function to read a flash map entry from the
device tree.

Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Add an enum for the number of flash regions
Simon Glass [Thu, 27 Feb 2014 20:26:00 +0000 (13:26 -0700)]
cros_ec: Add an enum for the number of flash regions

Add an enum for the number of flash regions so we can keep track of all
the possible regions.

Reviewed-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agosandbox: dts: Add display and keyboard to sandbox
Simon Glass [Thu, 27 Feb 2014 20:25:59 +0000 (13:25 -0700)]
sandbox: dts: Add display and keyboard to sandbox

Add an LCD display and keyboard to the sandbox device tree so that these
features can be used.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agosandbox: Use os functions to read host device tree
Simon Glass [Thu, 27 Feb 2014 20:25:58 +0000 (13:25 -0700)]
sandbox: Use os functions to read host device tree

At present we use U-Boot's filesystem layer to read the sandbox device tree,
but this is problematic since it relies on a temporary feauture added
there. Since we plan to implement proper block layer support for sandbox,
change this code to use the os layer functions instead. Also use the new
fdt_create_empty_tree() instead of our own code.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agosandbox: Increase memory size to 32MB
Simon Glass [Thu, 27 Feb 2014 20:25:56 +0000 (13:25 -0700)]
sandbox: Increase memory size to 32MB

The current 4MB size is a little small for some tests, so increase it.

Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoUse a const pointer for map_to_sysmem()
Simon Glass [Thu, 27 Feb 2014 20:25:55 +0000 (13:25 -0700)]
Use a const pointer for map_to_sysmem()

This function does not actually change the pointer contents, so use const
so that functions which have a const pointer do not need to cast.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agomtd: spi: Fix page size for S25FL032P,S25FL064P
Marek Vasut [Fri, 21 Feb 2014 17:13:26 +0000 (18:13 +0100)]
mtd: spi: Fix page size for S25FL032P,S25FL064P

The commit 6af8dc3ebccb3b1e4b2e479315e49545e7f53150 broke support for
S25FL032P and S25FL064P by carelessly removing the code handling special
page size for these two SPI NOR flashes and unifying the code under the
assumption that Extended JEDEC ID of 0x4d00 always implies 512b page size.

Add special case handling for these two SPI NOR flashes.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
7 years agospi: atmel_dataflash: Simplify AT91F_SpiEnable implementation
Axel Lin [Fri, 21 Feb 2014 00:55:47 +0000 (08:55 +0800)]
spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation

Refactor the code a bit to make it better in readability.
Remove the comments because now the intention of the code is pretty clear.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
7 years agosf: ops: Squash the malloc+memset combo
Jagannadha Sutradharudu Teki [Tue, 4 Feb 2014 16:06:13 +0000 (21:36 +0530)]
sf: ops: Squash the malloc+memset combo

Squash the malloc()+memset() combo in favor of calloc().

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Marek Vasut <marex@denx.de>
7 years agosf: Squash the malloc+memset combo
Marek Vasut [Wed, 15 Jan 2014 14:17:54 +0000 (15:17 +0100)]
sf: Squash the malloc+memset combo

Squash the malloc()+memset() combo in favor of calloc().

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
7 years agosf: Add S25FL128S_256K IDs
Marek Vasut [Wed, 15 Jan 2014 14:32:09 +0000 (15:32 +0100)]
sf: Add S25FL128S_256K IDs

Add IDs for this new chip.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
7 years agosf: Fix entries for S25FL256S_256K and S25FL512S_256K
Marek Vasut [Wed, 15 Jan 2014 14:29:43 +0000 (15:29 +0100)]
sf: Fix entries for S25FL256S_256K and S25FL512S_256K

Both of these chips have 256kB big sectors, thus the _256K suffix,
compared to their _64K counterparts, which have 64kB sectors. Also,
they have four times less sectors than their _64K counterparts.

Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
7 years agosh: ecovec: correct romImage address in comment
Baruch Siach [Mon, 10 Mar 2014 13:09:34 +0000 (15:09 +0200)]
sh: ecovec: correct romImage address in comment

romImage is set by CONFIG_ECOVEC_ROMIMAGE_ADDR to 0xA0040000.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
7 years agosh: fix PFC registers definition for SH772{2, 3, 4}
Baruch Siach [Mon, 10 Mar 2014 13:05:33 +0000 (15:05 +0200)]
sh: fix PFC registers definition for SH772{2, 3, 4}

Add missing port X data register, and fix the offset of ports Y and Z.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
7 years agokbuild: delete *.pyc files by "make distclean"
Masahiro Yamada [Wed, 12 Mar 2014 11:36:45 +0000 (20:36 +0900)]
kbuild: delete *.pyc files by "make distclean"

The tools "buildman" and "patman" are written in Python.
When we run them, "*.pyc" files are created under
tools/buildman, tools/patman directories.

They should be cleaned up by "make distclean".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agokbuild: delete SPLTREE and TPLTREE
Masahiro Yamada [Tue, 11 Mar 2014 02:05:22 +0000 (11:05 +0900)]
kbuild: delete SPLTREE and TPLTREE

These variable are no longer used.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokbuild: rename OBJTREE to objtree
Masahiro Yamada [Tue, 11 Mar 2014 02:05:21 +0000 (11:05 +0900)]
kbuild: rename OBJTREE to objtree

Prior to Kbuild, $(OBJTREE) was used for pointing to the
top of build directory with absolute path.

In Kbuild style, $(objtree) is used instead.
This commit renames OBJTREE to objtree and delete the
defition of OBJTREE.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokbuild: rename SRCTREE to srctree
Masahiro Yamada [Tue, 11 Mar 2014 02:05:20 +0000 (11:05 +0900)]
kbuild: rename SRCTREE to srctree

Prior to Kbuild, $(TOPDIR) or $(SRCTREE) was used for
pointing to the top of source directory.
(No difference between the two.)

In Kbuild style, $(srctree) is used for instead.
This commit renames SRCTREE to srctree and deletes the
defition of SRCTREE.

Note that SRCTREE in scripts/kernel-doc, scripts/docproc.c,
doc/DocBook/Makefile should be keep.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokbuild: rename TOPDIR to stctree
Masahiro Yamada [Tue, 11 Mar 2014 02:05:19 +0000 (11:05 +0900)]
kbuild: rename TOPDIR to stctree

Prior to Kbuild, $(TOPDIR) or $(SRCTREE) was used for
pointing to the top of source directory.
(No difference between the two.)

In Kbuild style, $(srctree) is used instead.
This commit renames TOPDIR to srctree and delete the
defition of TOPDIR.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokbuild: use $(KBUILD_SRC) to check out-of-tree build
Masahiro Yamada [Tue, 11 Mar 2014 02:05:18 +0000 (11:05 +0900)]
kbuild: use $(KBUILD_SRC) to check out-of-tree build

Non-empty $(KBUILD_SRC) means out-of-tree build.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIG
Masahiro Yamada [Tue, 11 Mar 2014 02:05:17 +0000 (11:05 +0900)]
kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIG

Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG
and push it into the top Makefile.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Simon Guinot <simon.guinot@sequanux.org>
Cc: Dave Purdy <david.c.purdy@gmail.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Cc: Luka Perkov <luka@openwrt.org>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Jason Cooper <u-boot@lakedaemon.net>
Cc: Siddarth Gore <gores@marvell.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Eric Cooper <ecc@cmu.edu>
Cc: Suriyan Ramasami <suriyan.r@gmail.com>
7 years agofreescale: pblimage: refactor CONFIG_SYS_FSL_PBL_{PBI, RCW}
Masahiro Yamada [Tue, 11 Mar 2014 02:05:16 +0000 (11:05 +0900)]
freescale: pblimage: refactor CONFIG_SYS_FSL_PBL_{PBI, RCW}

Pull out "$(SRCTREE)/" from CONFIG_SYS_FSL_PBL_PBI
and CONFIG_SYS_FSL_PBL_RCW and push it into the top Makefile.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
7 years agokbuild: delete redundant LDSCRIPT definition
Masahiro Yamada [Tue, 11 Mar 2014 02:05:15 +0000 (11:05 +0900)]
kbuild: delete redundant LDSCRIPT definition

$(SRCTREE)/$(CPUDIR)/u-boot.lds is our default location
of arch-specific linker script.

Remove redundant definitions in
arch/{arc,microblaze,openrisc}/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Acked-by: Michal Simek <monstr@monstr.eu>
7 years agox86: specify CONFIG_USE_PRIVATE_LIBGCC more simply
Masahiro Yamada [Tue, 11 Mar 2014 02:05:14 +0000 (11:05 +0900)]
x86: specify CONFIG_USE_PRIVATE_LIBGCC more simply

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
7 years agokbuild, x86: use a short log for arch/x86/lib/libgcc.a
Masahiro Yamada [Tue, 11 Mar 2014 02:05:13 +0000 (11:05 +0900)]
kbuild, x86: use a short log for arch/x86/lib/libgcc.a

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
7 years agokbuild: use short logs for some board specific make rules
Masahiro Yamada [Tue, 11 Mar 2014 02:05:12 +0000 (11:05 +0900)]
kbuild: use short logs for some board specific make rules

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: David Updegraff <dave@cray.com>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
7 years agokbuild,mxs: use short logs for MXS images
Masahiro Yamada [Tue, 11 Mar 2014 02:05:11 +0000 (11:05 +0900)]
kbuild,mxs: use short logs for MXS images

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Acked-by: Marek Vasut <marex@denx.de>
7 years agousb: net: update README.usb to list all USB ethernet options
Gerhard Sittig [Sat, 8 Mar 2014 18:46:18 +0000 (19:46 +0100)]
usb: net: update README.usb to list all USB ethernet options

- extend the discussion of USB network related config options such that
  all available adapter drivers are listed, and that the 'usb' command
  for the interactive prompt and scripting becomes available
- suggest to *not* put individual IP configuration parameters into the
  exectuable, but instead to put them into external environment or fetch
  them from network

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
7 years agoat91: enable USB ethernet for taskit stamp9g20
Gerhard Sittig [Sat, 8 Mar 2014 18:46:17 +0000 (19:46 +0100)]
at91: enable USB ethernet for taskit stamp9g20

enabling CONFIG_MACB makes other locations in the stamp config file
enable network related commands (actually prevents disabling them)

enable USB ethernet support by activating generic support as well as
Asix and Moschip ethernet adapters

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Acked-by: Andreas Bießman <andreas.devel@googlemail.com>
7 years agotegra: imx: omap: enable Moschip USB ethernet support for several boards
Gerhard Sittig [Sat, 8 Mar 2014 18:46:16 +0000 (19:46 +0100)]
tegra: imx: omap: enable Moschip USB ethernet support for several boards

enable support for the Moschip USB ethernet adapter for those boards
which previously had support for "all other" USB ethernet adapters
(that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk,
mx53loco, nitrogen6x, omap3_beagle

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
7 years agotegra: omap: alpha-sort USB ethernet items for Asix and SMSC
Gerhard Sittig [Sat, 8 Mar 2014 18:46:15 +0000 (19:46 +0100)]
tegra: omap: alpha-sort USB ethernet items for Asix and SMSC

adjust the harmony and omap3_beagle board configs to make
their CONFIG_USB_ETHER_* items appear in alphabetical order

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
7 years agousb: net: introduce support for Moschip USB ethernet
Gerhard Sittig [Sat, 8 Mar 2014 18:46:14 +0000 (19:46 +0100)]
usb: net: introduce support for Moschip USB ethernet

introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832)
USB 2.0 Ethernet Devices

see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at
http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=109;74;109

the driver was implemented based on the U-Boot Asix driver with
additional information gathered from the Moschip Linux driver,
development was done on "Delock 61147" and "Logilink UA0025C" dongles

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
7 years agousb: net: don't ifdef routine declarations in usb_ether.h
Gerhard Sittig [Sat, 8 Mar 2014 18:46:13 +0000 (19:46 +0100)]
usb: net: don't ifdef routine declarations in usb_ether.h

while compilation of implemented routines and references from calling
sites may be optional, declarations in header files should not be

unconditionally declare the Asix and SMSC related public USB ethernet
driver routines in the usb_ether.h header file

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
7 years agofw_env: correct writes to devices with small erase blocks
Dustin Byford [Fri, 7 Mar 2014 04:48:23 +0000 (20:48 -0800)]
fw_env: correct writes to devices with small erase blocks

Some NOR flash devices have a small erase block size.  For example, the
Micron N25Q512 can erase in 4K blocks.  These devices expose a bug in
fw_env.c where flash_write_buf() incorrectly calculates bytes written
and attempts to write past the environment sectors.  Luckily, a range
check prevents any real damage, but this does cause fw_setenv to fail
with an error.

This change corrects the write length calculation.

The bug was introduced with commit 56086921 from 2008 and only affects
configurations where the erase block size is smaller than the total
environment data size.

Signed-off-by: Dustin Byford <dustin@cumulusnetworks.com>
7 years agofw_env: calculate default number of env sectors
Dustin Byford [Fri, 7 Mar 2014 04:48:22 +0000 (20:48 -0800)]
fw_env: calculate default number of env sectors

The assumed number of environment sectors (always 1) leads to an
incorrect top_of_range calculation in fw.env.c when a flash device has
an erase block size smaller than the environment data size (number of
environment sectors > 1).

This change updates the default number of environment sectors to at
least cover the size of the environment.

Also corrected a false statement about the number of sectors column in
fw_env.config.

Signed-off-by: Dustin Byford <dustin@cumulusnetworks.com>
7 years agoboards.cfg: Run the reformatter script
Tom Rini [Tue, 11 Mar 2014 12:26:49 +0000 (08:26 -0400)]
boards.cfg: Run the reformatter script

Some recent changes got parts of the file out of order again, correct.

Signed-off-by: Tom Rini <trini@ti.com>
7 years agoboards.cfg: move boards with invalid emails to Orphan
Masahiro Yamada [Tue, 11 Mar 2014 03:19:12 +0000 (12:19 +0900)]
boards.cfg: move boards with invalid emails to Orphan

When I cc board maintainers, some of them result in
bounce mails.

It turned out the following do not work any more:
  Yuli Barcohen <yuli@arabellasw.com>
  Travis Sawyer <travis.sawyer@sandburst.com>
  Yusdi Santoso <yusdi_santoso@adaptec.com>
  David Updegraff <dave@cray.com>
  Sangmoon Kim <dogoil@etinsys.com>
  Anton Vorontsov <avorontsov@ru.mvista.com>
  Blackfin Team <u-boot-devel@blackfin.uclinux.org>
  Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
  Andre Schwarz <andre.schwarz@matrix-vision.de>

For the blackfin boards where Sonic Zhang is also listed
as a maintainer, dead addresses should be simply dropped.

For all of the others, the status should be changed to "Orphan".

We have adopted the definition of "Orphan" as:
board is not actively maintained any more but still builds, and any
address associated with it is that of the last known maintainer(s)

Even though the emails do not work any more, they carry information.
We want to keep them.

Besides, Orphan boards have been collected at the bottom of boards.cfg.
(This is done when we run "tools/reformat.py")

Add separators to distinguish them from those which
were moved to Orphan 6 months ago.
I believe it will be helpful in future to find which boards are
old enough to be removed from the code base.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
7 years agoPrepare v2014.04-rc2 v2014.04-rc2
Tom Rini [Mon, 10 Mar 2014 21:21:06 +0000 (17:21 -0400)]
Prepare v2014.04-rc2

Signed-off-by: Tom Rini <trini@ti.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Mon, 10 Mar 2014 18:22:54 +0000 (14:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Mon, 10 Mar 2014 18:06:51 +0000 (14:06 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

7 years agousb: create common header virtual root hub descriptors
Stephen Warren [Fri, 14 Feb 2014 04:15:18 +0000 (21:15 -0700)]
usb: create common header virtual root hub descriptors

Many USB host controller drivers contain almost identical copies of the
same virtual root hub descriptors. Put these into a common file to avoid
duplication.

Note that there were some very minor differences between the descriptors
in the various files, such as:

- USB 1.0 vs. USB 1.1
- Manufacturer/Device ID
- Max packet size
- String content

I assume these aren't relevant.

Cc: Thomas Lange <thomas@corelatus.se>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Eric Millbrandt <emillbrandt@coldhaus.com>
Cc: Pierre Aubert <p.aubert@staubli.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Rodolfo Giometti <giometti@linux.it>
Cc: Zhang Wei <wei.zhang@freescale.com>
Cc: Mateusz Zalega <m.zalega@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Markus Klotzbuecher <mk@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: C Nauman <cnauman@diagraph.com>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Thomas Abraham <t-abraham@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Andrew Murray <amurray@embedded-bits.co.uk>
Cc: Matej Frančeškin <matej.franceskin@comtrade.com>
Cc: Cliff Cai <cliff.cai@analog.com>
Cc: Bryan Wu <cooloney@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
7 years agousb: ehci: fully align interrupt QHs/QTDs
Stephen Warren [Thu, 6 Feb 2014 20:13:06 +0000 (13:13 -0700)]
usb: ehci: fully align interrupt QHs/QTDs

These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to USB_DMA_MINALIGN. This is important on systems
where cache lines are >32 bytes.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agoush: ehci: initialize altnext pointers in QH
Stephen Warren [Fri, 7 Feb 2014 16:53:50 +0000 (09:53 -0700)]
ush: ehci: initialize altnext pointers in QH

Section 4.10.2 "Advance Queue" of ehci-specification-for-usb.pdf
specifies how an EHCI controller loads a new QTD for processing if the
QH is not already marked as active. It states:

=====
If the field Bytes to Transfer is not zero and the T-bit in the Alternate
Next qTD Pointer is set to zero, then the host controller uses the
Alternate Next qTD Pointer. Otherwise, the host controller uses the Next
qTD Pointer. If Next qTD Pointer’s T-bit is set to a one, then the host
controller exits this state and uses the horizontal pointer to the next
schedule data structure.
=====

Hence, we must ensure that the alternate next QTD pointer's T-bit
(TERMINATE) is set, so the EHCI controller knows to use the next QTD
pointer.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years ago.gitignore: ignore include/config/*
Masahiro Yamada [Mon, 10 Mar 2014 01:47:19 +0000 (10:47 +0900)]
.gitignore: ignore include/config/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokbuild: fix a bug of make rule of version_autogenerated.h
Masahiro Yamada [Mon, 10 Mar 2014 01:42:27 +0000 (10:42 +0900)]
kbuild: fix a bug of make rule of version_autogenerated.h

include/generated/version_autogenerated.h was not correctly
generated on the parallel build (with -j option).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reported-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agocfb_console: align fields in gzipped .bmp files
Eric Nelson [Sat, 8 Mar 2014 14:55:52 +0000 (07:55 -0700)]
cfb_console: align fields in gzipped .bmp files

.bmp files contain 32-bit integers aligned at offsets of +2, +6,
et cetera within the bmp_header structure (see include/bmp_layout.h).

Support for gzip-compressed .bmp files is present in the cfb_console
display subsystem by uncompressing them prior to use.

This patch forces the in-memory header to be aligned properly
for these compressed images by extracting them to a 2-byte
offset in the memory returned by malloc. Since malloc will always
return a 4-byte aligned value, this forces the .bmp header
fields to be naturally aligned on 4-byte addresses.

Refer to these files for more details:
doc/README.displaying-bmps

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
7 years agoahci: wait longer for link.
Ian Campbell [Fri, 7 Mar 2014 01:20:58 +0000 (01:20 +0000)]
ahci: wait longer for link.

I have observed timeouts on a cubietruck.

The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait,
although googling around it seems like tens of ms rather than single
digits is more common. I don't think there is any harm in waiting a bit
longer.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
7 years agohighbank: use scsi_init hook
Ian Campbell [Fri, 7 Mar 2014 01:20:57 +0000 (01:20 +0000)]
highbank: use scsi_init hook

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Rob Herring <robh@kernel.org>
7 years agoahci-plat: Provide a weak scsi_init hook
Ian Campbell [Fri, 7 Mar 2014 01:20:56 +0000 (01:20 +0000)]
ahci-plat: Provide a weak scsi_init hook

This allow the platform to register the platform ahci device.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
7 years agom68k: Remove M5271EVB and idmr board support
Masahiro Yamada [Fri, 21 Feb 2014 00:55:16 +0000 (09:55 +0900)]
m68k: Remove M5271EVB and idmr board support

CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 1000000 and idmr.h defines it as (50000000 / 64).

When compiling these two boards, a warning message is displayed:

  time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
  and should not be defined by platforms" [-Wcpp]

There are no board maintainers for them so this commit just
deletes them.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Jason Jin <Jason.jin@freescale.com>
7 years agoarm: atmel: sama5d3: add nand spl boot support
Bo Shen [Mon, 3 Mar 2014 06:47:17 +0000 (14:47 +0800)]
arm: atmel: sama5d3: add nand spl boot support

Add NAND SPL boot support with hardware PMECC.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agomtd: nand: atmel: prepare for nand spl boot support
Bo Shen [Mon, 3 Mar 2014 06:47:16 +0000 (14:47 +0800)]
mtd: nand: atmel: prepare for nand spl boot support

Prepare for nand spl boot support. It supports nand software ECC and
hardware PMECC.
This patch is take <drivers/mtd/nand/nand_spl_simple.c> as reference.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoarm: atmel: sama5d3: add spi spl boot support
Bo Shen [Mon, 3 Mar 2014 06:47:15 +0000 (14:47 +0800)]
arm: atmel: sama5d3: add spi spl boot support

Add SPI SPL boot support for sama5d3xek board.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoARM: atmel: add sama5d3 Xplained board support
Bo Shen [Sun, 9 Feb 2014 07:52:39 +0000 (15:52 +0800)]
ARM: atmel: add sama5d3 Xplained board support

Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
Now it supports boot from NAND flash and SD/MMC card.
Features support:
  - NAND flash
  - SD/MMC card
  - Two USB hosts
  - Ethernet (one GMAC, one EMAC)

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[reorder boards.cfg]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoat91 gpio: fix typo in compatibility macro
Andreas Henriksson [Thu, 30 Jan 2014 18:20:07 +0000 (19:20 +0100)]
at91 gpio: fix typo in compatibility macro

It's called _pio_ in the version that was added to git.
Apparently it got renamed without updating the macros before it was
applied, c.f.
http://u-boot.10912.n7.nabble.com/U-Boot-PATCH-3-9-V3-add-a-new-AT91-GPIO-driver-td75922.html

Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoat91sam9263ek: add mmc support
Andreas Henriksson [Mon, 27 Jan 2014 18:18:59 +0000 (19:18 +0100)]
at91sam9263ek: add mmc support

Add support for using the Atmel MCI driver on at91sam9263ek.
This change is modeled after the existing at91sam9260ek support.

Please note that this hooks up slot1 (MCI1) for SD. Not both.

Tested with at91bootstrap and u-boot on dataflash in slot 0
and fat-formatted 8GB SDHC in slot 1 on first revision
at91sam9263ek (which must use dataflash in slot0 to boot).

CONFIG_ATMEL_MCI_PORTB not tested.

Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se>
[remove empty line]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Sat, 8 Mar 2014 01:54:22 +0000 (20:54 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

7 years agopowerpc/t104xrdb: Update DDR initialization related settings
Priyanka Jain [Wed, 26 Feb 2014 04:08:37 +0000 (09:38 +0530)]
powerpc/t104xrdb: Update DDR initialization related settings

Update following DDR related settings for T1040RDB, T1042RDB_PI
-Correct number of chip selects to two as t1040 supports
 two Chip selects.
-Update board_specific_parameters udimm structure with settings
 derived via calibration.
-Update ddr_raw_timing sructure corresponding to DIMM.
-Set ODT to off. Typically on FSL board, ODT is set to 75 ohm,
 but on T104xRDB, on setting this , DDR instability is observed.
 Board-level debugging is in progress.

Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/t1040qds: Add Video - HDMI support
Priyanka Jain [Wed, 26 Feb 2014 10:41:53 +0000 (16:11 +0530)]
powerpc/t1040qds: Add Video - HDMI support

T1040 has internal display interface unit (DIU) for driving video.
T1040QDS supports video mode via
-LCD using TI enconder
-HDMI type interface via HDMI encoder

Chrontel, CH7301C encoder which is I2C programmable is used as
HDMI connector on T1040QDS.
This patch add support to
-enable Video interface for T1040QDS
-route qixis multiplexing to enable DIU-HDMI interface on board
-program DIU pixel clock gerenartor for T1040
-program HDMI encoder via I2C on board

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040
Priyanka Jain [Thu, 30 Jan 2014 10:09:58 +0000 (15:39 +0530)]
powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040

T1040 SoC has SCFG (Supplement Configuration) Block which provides
chip specific configuration and status support. The base address of
SCFG block in T1040 is 0xfc000.
SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register)
at offset 0x28.

Add definition of
-SCFG block
-SCFG_PIXCLKCR register
-Bits definition of SCFG_PIXCLK register

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/t2080rdb: Add T2080PCIe-RDB board support
Shengzhou Liu [Wed, 5 Mar 2014 07:04:48 +0000 (15:04 +0800)]
powerpc/t2080rdb: Add T2080PCIe-RDB board support

T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
It works in two mode: standalone mode and PCIe endpoint mode.

T2080PCIe-RDB Feature Overview
------------------------------
Processor:
 - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
DDR Memory:
 - Single memory controller capable of supporting DDR3 and DDR3-LP devices
 - 72bit 4GB DDR3-LP SODIMM in slot
Ethernet interfaces:
 - Two 10M/100M/1G RGMII ports on-board
 - Two 10Gbps SFP+ ports on-board
 - Two 10Gbps Base-T ports on-board
Accelerator:
 - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
SerDes 16 lanes configuration:
 - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
 - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
 - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
 - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
 - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
 - SerDes-2 Lane G-H: to SATA1 & SATA2
IFC/Local Bus:
 - NOR:  128MB 16-bit NOR flash
 - NAND: 512MB 8-bit NAND flash
 - CPLD: for system controlling with programable header on-board
eSPI:
 - 64MB N25Q512 SPI flash
USB:
 - Two USB2.0 ports with internal PHY (both Type-A)
PCIe:
 - One PCIe x4 gold-finger
 - One PCIe x4 connector
 - One PCIe x2 end-point device (C293 Crypto co-processor)
SATA:
 - Two SATA 2.0 ports on-board
SDHC:
 - support a TF-card on-board
I2C:
 - Four I2C controllers.
UART:
 - Dual 4-pins UART serial ports

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/t208xqds: fixup for t208xqds
Shengzhou Liu [Thu, 6 Mar 2014 07:07:39 +0000 (15:07 +0800)]
powerpc/t208xqds: fixup for t208xqds

Change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0.
Fix EMI2 for t2080qds, which was caused by adding t2081qds.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agobootstage: powerpc: support fdt stash and reporting
Mela Custodio [Wed, 19 Feb 2014 15:16:57 +0000 (00:16 +0900)]
bootstage: powerpc: support fdt stash and reporting

This implements stashing of bootstage timing data to FDT and automatic
timing reporting. To enable define CONFIG_BOOTSTAGE_FDT and
CONFIG_BOOTSTAGE_REPORT respectively.

Signed-off-by: Rommel G Custodio <sessyargc+u-boot@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/usb: Workaround for erratum-A006261
Suresh Gupta [Wed, 26 Feb 2014 08:59:12 +0000 (14:29 +0530)]
powerpc/usb: Workaround for erratum-A006261

USB spec says that the minimum disconnect threshold should be
over 525 mV. However, internal USB PHY threshold value is below
this specified value. Due to this some devices disconnect at
run-time. Hence, phy settings are tweaked to increased disconnect
threshold to be above 525mV by using this workaround.

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agopowerpc/b4860: Add workaround for errata A006384 and A006475
Shaveta Leekha [Wed, 26 Feb 2014 10:38:22 +0000 (16:08 +0530)]
powerpc/b4860: Add workaround for errata A006384 and A006475

SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384)
and at cold temperatures(A006475), workaround recalibrate the
PLLs with some SerDes configuration

Both these errata are only applicable for b4 rev1.
So, make workaround for these errata conditional,
depending upon soc version.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agoB4860qds: Set SerDes2 refclk2 at to 156.25MHz for XFI to work
Shaveta Leekha [Wed, 26 Feb 2014 10:37:51 +0000 (16:07 +0530)]
B4860qds: Set SerDes2 refclk2 at to 156.25MHz for XFI to work

Change setting of SerDes2 refclk2 to have the default value as it is
coming on board that is 156.25MHz, for XFI to work.
Also change PLL_NUM variable to the one defined in config_mpc85xx.h
for B4860 and B4420.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agoB4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks re-configuration
Shaveta Leekha [Wed, 26 Feb 2014 10:37:37 +0000 (16:07 +0530)]
B4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks re-configuration

B4860 has two PLL per SerDes whereas B4420 has one PLL per SerDes,
add their defines in arch/powerpc/include/asm/config_mpc85xx.h

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years ago85xx/b4860: Alternate serdes protocols for B4860/B4420
poonam aggrwal [Mon, 17 Feb 2014 03:08:58 +0000 (08:38 +0530)]
85xx/b4860: Alternate serdes protocols for B4860/B4420

On B4860 and B4420, some serdes protocols can be used with LC VCO as
well as Ring VCO options.

Addded Alternate options with LC VCO for such protocols.
For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO.

The alternate option has the same functionality as the original option;
the only difference being LC VCO rather than Ring VCO.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agoboard/b4860qds: Add support to make PCIe SATA work on B4860QDS
Shaveta Leekha [Wed, 26 Feb 2014 10:36:56 +0000 (16:06 +0530)]
board/b4860qds: Add support to make PCIe SATA work on B4860QDS

1) SerDes2 Refclks have been set properly to make
     PCIe SATA to work as it work on SerDes refclk of 100MHz
  2) Mask the SerDes's device reset request before changing
     the Refclks for SerDes1 and SerDes2 for PLL locks to
     happen properly, device reset request bit unmasked
     after SerDes refclks configuration

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agoboard/b4860qds: Add support to make Aurora work on B4860QDS
Shaveta Leekha [Wed, 26 Feb 2014 10:36:30 +0000 (16:06 +0530)]
board/b4860qds: Add support to make Aurora work on B4860QDS

1) Add new SerDes1 protocols having Aurora in them
2) Add VSC cross point connections for Aurora to work with
   CPRI and SGMIIs
3) Configure VSC crossbar switch to connect SerDes1
   lanes to aurora on board, by checking SerDes1 protocols
4) SerDes1 Refclks have been set properly to make
   Aurora, CPRI and SGMIIs to work together properly

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
7 years agokbuild: move "checkgcc4" to PowerPC archprepare
Masahiro Yamada [Wed, 5 Mar 2014 08:49:23 +0000 (17:49 +0900)]
kbuild: move "checkgcc4" to PowerPC archprepare

"checkgcc4" is used only for PowerPC.
Move it to arch/powerpc/config.mk.

To make sure gcc is new enough before beginning build,
run "checkgcc4" during "archprepare".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokbuild: move "checkthumb" to ARM archprepare
Masahiro Yamada [Wed, 5 Mar 2014 08:49:22 +0000 (17:49 +0900)]
kbuild: move "checkthumb" to ARM archprepare

"checkthumb" makes sense only for ARM architecture.
Move it to arch/arm/config.mk.

To make sure gcc supports THUMB mode before beginning build,
run "checkthumb" during "archprepare".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agopowerpc: mpc8260: consolidate CONFIG_MPC8260 and CONFIG_8260
Masahiro Yamada [Wed, 5 Mar 2014 08:40:10 +0000 (17:40 +0900)]
powerpc: mpc8260: consolidate CONFIG_MPC8260 and CONFIG_8260

Before this commit, CONFIG_MPC8260 and CONFIG_8260
were used mixed-up.

All boards with mpc8260 cpu defined both of them:
  - CONFIG_MPC8260 was defined in board config headers
      and include/common.h
  - CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk

We do not need to have both of them.
This commit keeps only CONFIG_MPC8260.

This commit does:
 - Delete CONFIG_8260 and CONFIG_MPC8260 definition
   in config headers and include/common.h
 - Rename CONFIG_8260 to CONFIG_MPC8260
    in arch/powerpc/cpu/mpc8260/config.mk.
 - Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
7 years agomips: move CONFIG_MIPS{32, 64} definition to config.mk
Masahiro Yamada [Wed, 5 Mar 2014 08:25:37 +0000 (17:25 +0900)]
mips: move CONFIG_MIPS{32, 64} definition to config.mk

All mips32 boards define CONFIG_MIPS32 in config headers
except malta boards which define it in boards.cfg.
We can consolidate them by defining it in
arch/mips/cpu/mips32/config.mk.

CONFIG_MIPS64 definition can be moved to
arch/mips/cpu/mips64/config.mk as well.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
7 years agokbuild: improve Kbuild speed
Masahiro Yamada [Wed, 5 Mar 2014 07:59:40 +0000 (16:59 +0900)]
kbuild: improve Kbuild speed

Kbuild brought about many advantages for us but a significant
performance regression was reported by Simon Glass.

After some discussions and analysis, it turned out
its main cause is in $(call cc-option,...).

Historically, U-Boot parses all config.mk
(arch/*/config.mk and board/*/config.mk)
every time descending into subdirectories.
That means cc-options are evaluated over and over again.

$(call cc-option,...) is useful but costly.
So we want to evaluate them only in ./Makefile
and spl/Makefile and export compiler flags.

This commit changes the build system as follows:

  - Modify scripts/Makefile.build to not include config.mk
    Instead, add $(PLATFORM_CPPFLAGS) to asflags-y, ccflags-y,
    cppflags-y.

  - Export many variables
    Going forward, Kbuild will not parse config.mk files
    when it descends into subdirectories.
    If we want to set variables in config.mk and use them
    in subdirectories, they must be exported.

    This is the list of variables to get exported:
      PLATFORM_CPPFLAGS
      CPUDIR
      BOARDDIR
      OBJCOPYFLAGS
      LDFLAGS
      LDFLAGS_FINAL
        (used in nand_spl/board/*/*/Makefile)
      CONFIG_STANDALONE_LOAD_ADDR
        (used in examples/standalone/Makefile)
      SYM_PREFIX
        (used in examples/standalone/Makefile)
      RELFLAGS
        (used in examples/standalone/Makefile)

  - Delete CPPFLAGS
    This variable has been replaced with PLATFORM_CPPFLAGS

  - Copy gcclibdir from example/standalone/Makefile
    to arch/sparc/config.mk
    The reference in CONFIG_STANDALONE_LOAD_ADDR must be
    resolved before it is exported.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reported-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> [on Sandbox]
Tested-by: Stephen Warren <swarren@nvidia.com> [on Tegra]
7 years agoconfig.mk: specify the exact path to standalone linker script
Masahiro Yamada [Wed, 5 Mar 2014 07:59:39 +0000 (16:59 +0900)]
config.mk: specify the exact path to standalone linker script

We want to change the build system to include config.mk
only from ./Makefile and spl/Makefile.
We must prepare for that in this commit.

$(src) is a moving target and not handy for our purpose.
We must replace it with a fixed path.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agokbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCC
Masahiro Yamada [Wed, 5 Mar 2014 07:59:38 +0000 (16:59 +0900)]
kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCC

Before this commit, USE_PRIVATE_LIBGCC was defined in
arch-specific config.mk and referenced in
arch/$(ARCH)/lib/Makefile.

We are not happy about parsing config.mk again and again.
We have to keep the same behavior with a different way.

By adding "CONFIG_" prefix, this macro appears
in include/autoconf.mk, include/spl-autoconf.mk.
(And treating USE_PRIVATE_LIBGCC as CONFIG macro
is reasonable enough.)

Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes"
in arch/arm/cpu/arm720t/tegra*/config.mk,
whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk.

It means Tegra enables PRIVATE_LIBGCC only for SPL.
We can describe the same behavior by adding

  #ifdef CONFIG_SPL_BUILD
  # define CONFIG_USE_PRIVATE_LIBGCC
  #endif

to include/configs/tegra-common.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agokbuild, blackfin: Add CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED
Masahiro Yamada [Wed, 5 Mar 2014 07:59:37 +0000 (16:59 +0900)]
kbuild, blackfin: Add CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED

Many (but not all) of Blackfin boards give -O2 option
to compile under lib/ directory.
That means lib/ should be speed-optimized,
whereas other parts should be size-optimized.

We want to keep the same behavior,
but do not want to parse board/*/config.mk again and again.
We've got no choice but to invent a new method.

CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED, if it is enabled,
gives -O2 flag only for building under lib/ directory.

Dirty codes which I had marked as "FIX ME"
in board/${BOARD}/config.mk have been deleted.
Instead, CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED has been
defined in include/configs/${BOARD}.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
7 years agocmd_nvedit: Make 'env import -c' require size parameter
Tom Rini [Tue, 4 Mar 2014 20:52:35 +0000 (15:52 -0500)]
cmd_nvedit: Make 'env import -c' require size parameter

When importing a checksummed area we need to be told how big the area in
question is so that we know that will match the size of the area which
the checksum is generated against.

Reported-by: Pierre AUBERT <p.aubert@staubli.com>
Signed-off-by: Tom Rini <trini@ti.com>
7 years agoCosmetic: Typo fixes
Vasili Galka [Tue, 4 Mar 2014 15:24:09 +0000 (17:24 +0200)]
Cosmetic: Typo fixes

Signed-off-by: Vasili Galka <vasili@visionmap.com>
7 years agoppc4xx: Remove 4xx NAND booting support
Stefan Roese [Tue, 4 Mar 2014 14:34:35 +0000 (15:34 +0100)]
ppc4xx: Remove 4xx NAND booting support

As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.

This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
7 years agonet/phy: Correct AR8021 phy_mask
Haijun.Zhang [Tue, 4 Mar 2014 07:56:12 +0000 (15:56 +0800)]
net/phy: Correct AR8021 phy_mask

There was wrong phy_mask for AR8021 device,
so the AR8021 can't be probed correctly.
Changed it from 0x4fffff to 0x4ffff0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
7 years agoxilinx: delete meaningless .gitignore files
Masahiro Yamada [Tue, 4 Mar 2014 02:36:51 +0000 (11:36 +0900)]
xilinx: delete meaningless .gitignore files

config.tmp is never generated

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
7 years agounit-test: make "test -e" test independent of $CWD
Stephen Warren [Sun, 2 Mar 2014 05:18:00 +0000 (22:18 -0700)]
unit-test: make "test -e" test independent of $CWD

The unit-test for hush's "test -e" currently relies upon being run in
the U-Boot build directory, because it tests for the existence of a file
that exists in that directory.

Fix this by explicitly creating the file we use for the existence test,
and deleting it afterwards so that multiple successive unit-test
invocations succeed. This required adding an os.c function to erase
files.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
7 years agohush: fix some quoted variable expansion issues
Stephen Warren [Sun, 2 Mar 2014 05:16:10 +0000 (22:16 -0700)]
hush: fix some quoted variable expansion issues

The following shell command fails:

if test -z "$x"; then echo "zero"; else echo "non-zero"; fi

(assuming $x does not exist, it prints "non-zero" rather than "zero").

... since "$x" expands to nothing, and the argument is completely
dropped, causing too few to be passed to -z, causing cmd_test() to
error out early.

This is because when variable expansions are processed by make_string(),
the expanded results are concatenated back into a new string. However,
no quoting is applied when doing so, so any empty variables simply don't
generate any parameter when the combined string is parsed again.

Fix this by explicitly replacing quoting any argument that was originally
quoted when re-generating a string from the already-parsed argument list.

This also fixes loss of whitespace in commands such as:

setenv space " "
setenv var " 1${space}${space} 2 "
echo ">>${var}<<"

Reported-by: Russell King <linux@arm.linux.org.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
7 years agounit-test: clean up evironment after Hush tests
Stephen Warren [Fri, 28 Feb 2014 05:01:28 +0000 (22:01 -0700)]
unit-test: clean up evironment after Hush tests

Delete the temporary variables that are used to save unit-test results
from the environment after running the test. This prevents polluting
the environment, or growing it too much.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agonet: asix: don't pad odd-length TX packets
Stephen Warren [Thu, 27 Feb 2014 20:27:02 +0000 (13:27 -0700)]
net: asix: don't pad odd-length TX packets

For Ethernet/USB RX packets, the ASIX HW pads odd-sized packets so that
they have an even size. Currently, asix_recv() does remove this padding,
and asic_send() adds equivalent padding in the TX path. However, the HW
does not appear to need this packing for TX packets in practical testing
with "ASIX Elec. Corp. AX88x72A 000001" Vendor: 0x0b95 Product 0x7720
Version 0.1. The Linux kernel does no such padding for the TX path.

Remove the padding from the TX path:

* For consistency with the Linux kernel.
* NVIDIA has a Tegra simulator which validates that the length of USB
  packets sent to an ASIX device matches the packet length value inside
  the packet data. Having U-Boot and the kernel do the same thing when
  creating the TX packets simplifies the simulator's validation.

Cc: Lucas Stach <dev@lynxeye.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Gerhard Sittig <gsi@denx.de>
7 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 7 Mar 2014 13:32:42 +0000 (14:32 +0100)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

7 years agoOMAP3: igep00x0: Enable required clocks for GPIO that are used.
Enric Balletbo i Serra [Sat, 25 Jan 2014 21:52:22 +0000 (22:52 +0100)]
OMAP3: igep00x0: Enable required clocks for GPIO that are used.

Enable required clocks for GPIO to fix a boot issue introduced by commit
f33b9bd3984fb11e1d8566a866adc5957b1e1c9d (arm: omap3: Enable clocks for
peripherals only if they are used).

Without this patch the u-boot freezes after the following messages

  OMAP36XX/37XX-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 1 Ghz
  IGEPv2 + LPDDR/NAND
  I2C:   ready
  DRAM:  512 MiB
  NAND:  512 MiB
  MMC:   OMAP SD/MMC: 0

Diving into the issue, the sequence that produces the u-boot freezes is

  setup_net_chip
   |--> gpio_direction_out
         |--> _set_gpio_dataout
               |--> __raw_writel

To avoid this we just need enable the clocks for GPIOs that are used, but it
would be interesting implement a mechanism to protect these situations and
make sure that the clock is enabled when we request a GPIO.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
7 years agoboard/BuR/common: fix phy addresses
Hannes Petermaier [Thu, 6 Mar 2014 06:03:24 +0000 (07:03 +0100)]
board/BuR/common: fix phy addresses

B&R boards are using Phy Addresses 'one' and 'two', prior this was
defined through #define PHYADDR 1 within a header file.
Now this is addresses are given with device-driver structure.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
7 years agoARM: tegra: implement bootcmd_pxe
Stephen Warren [Wed, 5 Feb 2014 16:24:59 +0000 (09:24 -0700)]
ARM: tegra: implement bootcmd_pxe

This retrieves a PXE config file over the network, and executes it. This
allows an extlinux config file  to be retrieved over the network and
executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>