karo-tx-uboot.git
8 years agomx6: Revert "mx6: soc: Disable VDDPU regulator"
Fabio Estevam [Thu, 16 Jan 2014 12:57:29 +0000 (10:57 -0200)]
mx6: Revert "mx6: soc: Disable VDDPU regulator"

Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang
for people using FSL kernel 3.0.35 and 3.10, so revert it for now.

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Reported-by: Pierre Aubert <p.aubert@staubli.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: Add initial support for the Hummingboard solo
Fabio Estevam [Fri, 3 Jan 2014 17:55:58 +0000 (15:55 -0200)]
mx6: Add initial support for the Hummingboard solo

SolidRun has designed the Hummingboard board based on mx6q/dl/solo.

Add the initial support for the mx6 solo variant.

More information about this hardware can be found at:
http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware

(Carrier-One was the previous name of Hummingboard).

Based on the work from Jon Nettleton <jon.nettleton@gmail.com>.

Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()
Fabio Estevam [Fri, 3 Jan 2014 17:55:57 +0000 (15:55 -0200)]
mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()

Provide an argument to enable_fec_anatop_clock() to specify the clock frequency
that will be generated.

No changes are made to mx6slevk, which uses the default 50MHz fec clock.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agomx6slevk: Include "mx6_common.h"
Fabio Estevam [Thu, 9 Jan 2014 10:57:12 +0000 (08:57 -0200)]
mx6slevk: Include "mx6_common.h"

Include "mx6_common.h" so that some ARM errata are applied and also the
vddsoc regulator can be changed.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agoimx6: make use of lldiv(..)
Christian Gmeiner [Wed, 8 Jan 2014 07:24:25 +0000 (08:24 +0100)]
imx6: make use of lldiv(..)

Commit 762a88ccf8540948fbf8c31b40a29d1e0684a25b introduces
a 64-bit division without using the lldiv() function,
which pulls in previously unused libgcc stuff.

Signed-off-by: Måns Rullgård <mans@mansr.com>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agowandboard: Set default environment to use zImage
John Weber [Mon, 6 Jan 2014 15:27:22 +0000 (13:27 -0200)]
wandboard: Set default environment to use zImage

Change the default environment to use zImage instead of uImage, this
requires changes to the default environment to load a file named
zImage instead of uImage, and to use the 'bootz' command instead of
'bootm' when booting the kernel.

The zImage works for FSL Linux's kernel fork versions 3.0.35, 3.10.9,
and 3.10.17; this also works fine for mainline kernels.

Signed-off-by: John Weber <rjohnweber@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx6sabresd: Add eMMC specific environment to allow U-Boot update
Otavio Salvador [Mon, 6 Jan 2014 15:27:20 +0000 (13:27 -0200)]
mx6sabresd: Add eMMC specific environment to allow U-Boot update

A new 'update_emmc_firmware' target is added to allow for easy U-Boot
update in the eMMC as it has secury boot partition and this needs
specific handling on how to program the specific partition.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx6slevk: Return from cpu_eth_init() directly
Fabio Estevam [Sat, 4 Jan 2014 19:36:33 +0000 (17:36 -0200)]
mx6slevk: Return from cpu_eth_init() directly

There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.

In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6sabresd: Return from cpu_eth_init() directly
Fabio Estevam [Sat, 4 Jan 2014 19:36:32 +0000 (17:36 -0200)]
mx6sabresd: Return from cpu_eth_init() directly

There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.

In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6qsabreauto: Return from cpu_eth_init() directly
Fabio Estevam [Sat, 4 Jan 2014 19:36:31 +0000 (17:36 -0200)]
mx6qsabreauto: Return from cpu_eth_init() directly

There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.

In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6qarm2: Remove unneeded error message when cpu_eth_init() fails
Fabio Estevam [Sat, 4 Jan 2014 19:36:30 +0000 (17:36 -0200)]
mx6qarm2: Remove unneeded error message when cpu_eth_init() fails

There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agotitanium: Return from cpu_eth_init() directly
Fabio Estevam [Sat, 4 Jan 2014 19:36:29 +0000 (17:36 -0200)]
titanium: Return from cpu_eth_init() directly

There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.

In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
8 years agowandboard: Return from cpu_eth_init() directly
Fabio Estevam [Sat, 4 Jan 2014 19:36:28 +0000 (17:36 -0200)]
wandboard: Return from cpu_eth_init() directly

There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.

In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 6 Jan 2014 08:32:42 +0000 (09:32 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

8 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 6 Jan 2014 07:49:58 +0000 (08:49 +0100)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Conflicts:
include/micrel.h

The conflict above was trivial, caused by four lines being
added in both branches with different whitepace.

8 years agoarm: mx5: Add fuse supply enable in fsl_iim
Sergey Alyoshin [Tue, 17 Dec 2013 19:24:54 +0000 (23:24 +0400)]
arm: mx5: Add fuse supply enable in fsl_iim

Enable fuse supply before fuse programming and disable after.

Signed-off-by: Sergey Alyoshin <alyoshin.s@gmail.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
8 years agoARM: mx6: Allow enablement of FEC Anatop based clock for all MX6
Otavio Salvador [Mon, 16 Dec 2013 22:44:05 +0000 (20:44 -0200)]
ARM: mx6: Allow enablement of FEC Anatop based clock for all MX6

The enable_fec_anatop_clock method should be available for all MX6
variant as it is not MX6 SoloLite specific. This moves the code out of
the #ifdef/#endif and we make it conditional to CONFIG_FEC_MXC
instead.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agoARM: mx6: Change the FDT loading address to avoid overlaping
Otavio Salvador [Mon, 16 Dec 2013 22:44:04 +0000 (20:44 -0200)]
ARM: mx6: Change the FDT loading address to avoid overlaping

This patch fixes allow for the DeviceTree and initrd relocation fixing
the boot of FSL 3.10.9-1.0.0-alpha kernel.

This changes following boards:

 - mx6sabreauto
 - mx6sabresd
 - wandboard
 - udoo
 - nitrogen6x
 - cgtqmx6eval

The reasoning, as explained by Hui Liu, is:

,----
| The FDT blob will be placed at DDR physical addr: 0x11000000. When Linux kernel
| Boot up, it will decompress the compressed kernel image and place the decompressed
| kernel image at the low end of the DDR memory and start running from it. If the
| decompressed kernel image is bigger for example than 16M, it may over written the
| fdt blob which u-boot loaded to the DDR memory @0x11000000 with fdt_addr=0x11000000
|
| To expand the fdt_addr from 0x11000000 to 0x18000000, which can avoid the override
| Since we will not likely have one kernel image larger than 128MB.
`----

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agomx28evk: Extend environment to easy write of NAND system
Otavio Salvador [Mon, 16 Dec 2013 22:44:03 +0000 (20:44 -0200)]
mx28evk: Extend environment to easy write of NAND system

This adds following new targets:

 - update_nand_kernel
 - update_nand_fdt
 - update_nand_filesystem

and to avoid confusion, the 'update_nand_full' has been renamed to
'update_nand_firmware_full'.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
8 years agomx28evk: Add 'nandboot' environment command
Otavio Salvador [Mon, 16 Dec 2013 22:44:02 +0000 (20:44 -0200)]
mx28evk: Add 'nandboot' environment command

This reads the kernel, ftd and boot into ubifs filesystem. While on
that, the SD firmware filename definition has been moved next to the
other SD related commands.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx28evk: Use 512k for fdt partition to align it
Otavio Salvador [Mon, 16 Dec 2013 22:44:01 +0000 (20:44 -0200)]
mx28evk: Use 512k for fdt partition to align it

Using 512k for fdt partition allow it to be aligned with the other
small partitions and 512k erase block size.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agoimx: Easy enabling of SION per-pin using MUX_MODE_SION helper macro
Otavio Salvador [Mon, 16 Dec 2013 22:44:00 +0000 (20:44 -0200)]
imx: Easy enabling of SION per-pin using MUX_MODE_SION helper macro

The macro allows easy setting in per-pin, as for example:

,----
| imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_MODE_SION);
`----

The IOMUX_CONFIG_SION allows for reading PAD value from PSR register.

The following quote from the datasheet:

,----
| ...
| 28.4.2.2 GPIO Write Mode
| The programming sequence for driving output signals should be as follows:
| 1. Configure IOMUX to select GPIO mode (Via IOMUXC), also enable SION if need
| to read loopback pad value through PSR
| 2. Configure GPIO direction register to output (GPIO_GDIR[GDIR] set to 1b).
| 3. Write value to data register (GPIO_DR).
| ...
`----

This fixes the gpio_get_value to properly work when a GPIO is set for
output and has no conflicts.

Thanks for Benoît Thébaudeau <benoit.thebaudeau@advansee.com>, Fabio
Estevam <fabio.estevam@freescale.com> and Eric Bénard
<eric@eukrea.com> for helping to properly trace this down.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agomx6: soc: Disable VDDPU regulator
Fabio Estevam [Thu, 26 Dec 2013 16:51:35 +0000 (14:51 -0200)]
mx6: soc: Disable VDDPU regulator

As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator
in order to save power.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: soc: Add the required LDO ramp up delay
Fabio Estevam [Thu, 26 Dec 2013 16:51:34 +0000 (14:51 -0200)]
mx6: soc: Add the required LDO ramp up delay

When changing LDO voltages we need to wait for the required amount of time
for the voltage to settle.

Also, as the timer is still not available when arch_cpu_init() is called, we
need to call it later at board_postclk_init() phase.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: soc: Introduce set_ldo_voltage()
Fabio Estevam [Thu, 26 Dec 2013 16:51:33 +0000 (14:51 -0200)]
mx6: soc: Introduce set_ldo_voltage()

Introduce set_ldo_voltage() so that all three LDO regulators can be configured.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: soc: Set the VDDSOC at 1.175 V
Fabio Estevam [Thu, 26 Dec 2013 16:51:32 +0000 (14:51 -0200)]
mx6: soc: Set the VDDSOC at 1.175 V

mx6 datasheet specifies that the minimum VDDSOC at 792 MHz is 1.15 V.
Add a 25 mV margin and set it to 1.175V.

This also matches the VDDSOC voltages for 792MHz operation that the kernel configures:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/cpu_op-mx6.c?h=imx_3.0.35_4.1.0

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: soc: Clear the LDO ramp values up prior to setting the LDO voltages
Fabio Estevam [Thu, 26 Dec 2013 16:51:31 +0000 (14:51 -0200)]
mx6: soc: Clear the LDO ramp values up prior to setting the LDO voltages

Since ROM may modify the LDO ramp up time according to fuse setting,
it is safer to reset the ramp up field to its default value of 00:

00: 64 cycles of 24MHz clock;
01: 128 cycles of 24MHz clock;
02: 256 cycles of 24MHz clock;
03: 512 cycles of 24MHz clock;

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: soc: Staticize set_vddsoc()
Fabio Estevam [Thu, 26 Dec 2013 16:51:30 +0000 (14:51 -0200)]
mx6: soc: Staticize set_vddsoc()

set_vddsoc() is not used anywhere else, so make it static.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6sabre_common.h: Add CONFIG_CMD_FUSE support
Fabio Estevam [Mon, 23 Dec 2013 15:07:18 +0000 (13:07 -0200)]
mx6sabre_common.h: Add CONFIG_CMD_FUSE support

Add CONFIG_CMD_FUSE option, so that the fuse API can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
8 years agodoc: README.fuse: Add an example on how to use the fuse API on mx6q
Fabio Estevam [Mon, 23 Dec 2013 15:07:17 +0000 (13:07 -0200)]
doc: README.fuse: Add an example on how to use the fuse API on mx6q

When using the fuse API in U-boot user must calculate the 'bank' and 'word'
values.

Provide a real example on how to calculate such values for the mx6q.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
8 years agoboard:trats2: fix default partitions and mmc env
Piotr Wilczek [Mon, 30 Dec 2013 08:40:40 +0000 (09:40 +0100)]
board:trats2: fix default partitions and mmc env

This patch add uuid disk to defualt partions necessary to
restore gpt partitions and fixes mmcdev environmental variable.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoboard:trats1:trats2: fix adapter number
Piotr Wilczek [Wed, 18 Dec 2013 14:43:37 +0000 (15:43 +0100)]
board:trats1:trats2: fix adapter number

This fix is necessary after increased by one the number
of adapters in s3c24x0 driver.

Tested on Trats and Trats2.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoSPL: EXYNOS: Prepare for variable size SPL support
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:27 +0000 (09:44 +0530)]
SPL: EXYNOS: Prepare for variable size SPL support

When variable size SPL is used, the BL1 expects the SPL to be
encapsulated differently: instead of putting the checksum at a fixed
offset in the SPL blob, prepend the blob with a header including the
size and the checksum.

The enhancements include
- adding a command line option, '--vs' to indicate the need for the
variable size encapsulation
- padding the fixed size encapsulated blob with 0xff instead of random
memory contents
- do not silently truncate the input file, report error instead
- no need to explicitly closing files/freeing memory, this all happens
on exit; removing cleanups it makes code clearer
- profuse commenting
- modify Makefile to allow enabling the new feature per board

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoConfig: Add initial config for SMDK5420
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:26 +0000 (09:44 +0530)]
Config: Add initial config for SMDK5420

Adding initial config for SMDK5420 to build and boot U-Boot
over Exynos based SMDK5420.

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoDTS: Add dts support for SMDK5420
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:25 +0000 (09:44 +0530)]
DTS: Add dts support for SMDK5420

This patch adds dts support for SMDK5420.
exynos5.dtsi created is a common file which has the nodes common
to both 5420 and 5250.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos5420: Add base patch for SMDK5420
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:24 +0000 (09:44 +0530)]
Exynos5420: Add base patch for SMDK5420

Adding the base patch for Exynos based SMDK5420.
This shall enable compilation and basic boot support for
SMDK5420.

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos5420: Add support for 5420 in pinmux and gpio
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:23 +0000 (09:44 +0530)]
Exynos5420: Add support for 5420 in pinmux and gpio

Adds code in pinmux and gpio framework to support Exynos5420.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos5420: Add DDR3 initialization for 5420
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:22 +0000 (09:44 +0530)]
Exynos5420: Add DDR3 initialization for 5420

This patch intends to add DDR3 initialization code for Exynos5420.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos5420: Add clock initialization for 5420
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:21 +0000 (09:44 +0530)]
Exynos5420: Add clock initialization for 5420

This patch adds code for clock initialization and clock settings
of various IP's and controllers, required for Exynos5420

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS5420: Add dmc and phy_control register structure
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:20 +0000 (09:44 +0530)]
EXYNOS5420: Add dmc and phy_control register structure

Add dmc and phy_control register structure for 5420.

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS5420: Add power register structure.
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:19 +0000 (09:44 +0530)]
EXYNOS5420: Add power register structure.

Add structure for power register for Exynos5420

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoExynos5420: Add base addresses for 5420
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:18 +0000 (09:44 +0530)]
Exynos5420: Add base addresses for 5420

Adds base addresses of various IPs and controllers required for
Exynos5420.

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoEXYNOS5: Create a common board file
Rajeshwari Birje [Thu, 26 Dec 2013 04:14:17 +0000 (09:44 +0530)]
EXYNOS5: Create a common board file

Create a common board.c file for all functions which are common across
all EXYNOS5 platforms.

exynos_init function is provided for platform specific code.

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoMX6: fix sata compilation for i.MX6
Stefano Babic [Thu, 19 Dec 2013 10:04:33 +0000 (11:04 +0100)]
MX6: fix sata compilation for i.MX6

Commit 164d98466103a46b7c881149e92ec2a28a6375be breaks
board with SATA support, because sata is not compiled.

Signed-off-by: Stefano Babic <sbabic@denx.de>
8 years agoARM: AM43xx: Add Maintainer
Lokesh Vutla [Tue, 10 Dec 2013 09:32:24 +0000 (15:02 +0530)]
ARM: AM43xx: Add Maintainer

Adding Maintainer for AM43xx.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: GP_EVM: Add support for DDR3
Lokesh Vutla [Tue, 10 Dec 2013 09:32:23 +0000 (15:02 +0530)]
ARM: AM43xx: GP_EVM: Add support for DDR3

GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH).
Adding details for the same.
Below is the brief description of DDR3 init sequence(SW leveling):
-> Enable VTT regulator
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program leveling registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: EPOS_EVM: Add support for LPDDR2
Lokesh Vutla [Tue, 10 Dec 2013 09:32:22 +0000 (15:02 +0530)]
ARM: AM43xx: EPOS_EVM: Add support for LPDDR2

AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
Adding LPDDR2 init sequence and register details for the same.
Below is the brief description of LPDDR2 init sequence:
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register
-> Wait till initialization is complete and the configure MR registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM33xx+: Update ioregs to pass different values
Lokesh Vutla [Tue, 10 Dec 2013 09:32:21 +0000 (15:02 +0530)]
ARM: AM33xx+: Update ioregs to pass different values

Currently same value is programmed for all ioregs. This is not
the case for all SoC's like AM4372. So adding a structure for ioregs
and updating in all board files. And also return from config_cmd_ctrl()
and config_ddr_data() functions if data is not passed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Fixup dxr2, cm_t335, adapt pcm051 rev3]
Signed-off-by: Tom Rini <trini@ti.com>
8 years agoARM: AM43xx: clocks: Update DPLL details
Lokesh Vutla [Tue, 10 Dec 2013 09:32:20 +0000 (15:02 +0530)]
ARM: AM43xx: clocks: Update DPLL details

Updating the Multiplier and Dividers value for all DPLLs.
Safest OPP is read from DEV ATTRIBUTE register. Accoring to the value
returned the MPU DPLL is locked.
At different OPPs follwoing are the MPU locked frequencies.
OPP50 300MHz
OPP100 600MHz
OPP120 720MHz
OPPTB 800MHz
OPPNT 1000MHz
According to the latest DM following is the OPP table dependencies:
VDD_CORE  VDD_MPU
OPP50 OPP50
OPP50  OPP100
OPP100 OPP50
OPP100 OPP100
OPP100 OPP120
So at different OPPs of MPU it is safest to lock CORE at OPP_NOM.
Following are the DPLL locking frequencies at OPP NOM:
Core locks at 1000MHz
Per locks at 960MHz
LPDDR2 locks at 266MHz
DDR3 locks at 400MHz

Touching AM33xx files also to get DPLL values specific to board but no
functionality difference.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: mux: Update mux data
Lokesh Vutla [Tue, 10 Dec 2013 09:32:19 +0000 (15:02 +0530)]
ARM: AM43xx: mux: Update mux data

Updating the mux data for UART, adding data for i2c0 and mmc.
And also updating pad_signals structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: Update Current Booting devices list
Lokesh Vutla [Tue, 10 Dec 2013 09:32:18 +0000 (15:02 +0530)]
ARM: AM43xx: Update Current Booting devices list

Current Booting devices list is different from that of AM33xx.
Updating the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: Select clk source for Timer2
Lokesh Vutla [Tue, 10 Dec 2013 09:32:17 +0000 (15:02 +0530)]
ARM: AM43xx: Select clk source for Timer2

Selecting the Master osc clk as Timer2 clock source.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43XX: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support
Sekhar Nori [Tue, 10 Dec 2013 09:32:16 +0000 (15:02 +0530)]
ARM: AM43XX: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support

CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and
CONFIG_BOARD_LATE_INIT is already set. Adding support to detect the
board. These variables are used by findfdt.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43XX: board: add support for reading onboard EEPROM
Sekhar Nori [Tue, 10 Dec 2013 09:32:15 +0000 (15:02 +0530)]
ARM: AM43XX: board: add support for reading onboard EEPROM

Add support for reading onboard EEPROM to enable
board detection.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: Add extra ENV settings
Lokesh Vutla [Tue, 10 Dec 2013 09:32:14 +0000 (15:02 +0530)]
ARM: AM43xx: Add extra ENV settings

Add Extra env settings.
This is derived from am335x Extra ENV settings.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: Add L2 Support
Lokesh Vutla [Tue, 10 Dec 2013 09:32:13 +0000 (15:02 +0530)]
ARM: AM43xx: Add L2 Support

AM4372 uses PL310 L2 Cache. Enable the configs for the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: Adapt to ti_armv7_common.h config file
Lokesh Vutla [Tue, 10 Dec 2013 09:32:12 +0000 (15:02 +0530)]
ARM: AM43xx: Adapt to ti_armv7_common.h config file

Use ti_armv7_common.h config file to inclde the common
configs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: AM43xx: Update the base addresses of modules
Lokesh Vutla [Tue, 10 Dec 2013 09:32:11 +0000 (15:02 +0530)]
ARM: AM43xx: Update the base addresses of modules

PRCM, timer base addresses and offsets are different from
AM33xx. Updating the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoarm: omap3: Fix beagleboard SPL boot hangup (GPIO clocks not enabled)
Stefan Roese [Tue, 17 Dec 2013 13:14:06 +0000 (14:14 +0100)]
arm: omap3: Fix beagleboard SPL boot hangup (GPIO clocks not enabled)

Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on Beagleboard. Since some gpio input's are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
8 years agoMerge remote-tracking branch 'u-boot-pxa/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 18 Dec 2013 21:19:02 +0000 (22:19 +0100)]
Merge remote-tracking branch 'u-boot-pxa/master' into 'u-boot-arm/master'

8 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 18 Dec 2013 20:45:34 +0000 (21:45 +0100)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

8 years agoARM: pxa: Fix CONFIG_SYS_HZ on PXA
Marek Vasut [Mon, 4 Nov 2013 19:50:21 +0000 (20:50 +0100)]
ARM: pxa: Fix CONFIG_SYS_HZ on PXA

The PXA incorrectly uses CONFIG_SYS_HZ, which should be 1000 across
U-Boot. Fix this.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
8 years agoarm: tegra: Fix the CPU complex reset masks
Alban Bedel [Wed, 20 Nov 2013 16:42:46 +0000 (17:42 +0100)]
arm: tegra: Fix the CPU complex reset masks

The CPU complex reset masks are not matching with the datasheet for
the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20
and T30 the register consist of groups of 4 bits, with one bit for
each CPU core. On T20 the 2 high bits of each group are always stubbed
as there is only 2 cores.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swrren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: Add the Tamonten™ NG Evaluation Carrier board
Alban Bedel [Thu, 14 Nov 2013 09:58:30 +0000 (10:58 +0100)]
ARM: tegra: Add the Tamonten™ NG Evaluation Carrier board

Add support for the new Tamonten™ NG platform from Avionic Design.
Currently only I2C, MMC, USB and ethernet have been tested.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoi2c: tegra: Add the fifth bus on SoC with more than 4 buses
Alban Bedel [Wed, 13 Nov 2013 16:27:19 +0000 (17:27 +0100)]
i2c: tegra: Add the fifth bus on SoC with more than 4 buses

Create the i2c adapter object for the fifth bus on SoC with more than
4 buses. This allow using all the bus available on T30.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: support SKU b1 of Tegra30
Alban Bedel [Wed, 13 Nov 2013 16:27:18 +0000 (17:27 +0100)]
ARM: tegra: support SKU b1 of Tegra30

Add the Tegra30 SKU b1 and treat it like other Tegra30 chips.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: Julian Scheel <julian.scheel@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"
Jim Lin [Wed, 6 Nov 2013 06:03:44 +0000 (14:03 +0800)]
ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"

Fix the timeout issue after running "bootp" command in u-boot
console. For example you see "EHCI timed out on TD- token=0x...".
TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10
after a controller reset and before RUN bit is set
(per technical reference manual).

Signed-off-by: Jim Lin <jilin@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agotegra: allow build to succeed with SPL disabled
Vidya Sagar [Thu, 31 Oct 2013 09:21:38 +0000 (14:51 +0530)]
tegra: allow build to succeed with SPL disabled

u-boot-dtb-tegra.bin and u-boot-nodtb-tegra.bin binaries
are generated only if the SPL build is enabled as they have
dependency on SPL build

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoChange maintainer for Avionic Design boards
Thierry Reding [Mon, 23 Sep 2013 09:52:41 +0000 (11:52 +0200)]
Change maintainer for Avionic Design boards

I no longer work for Avionic Design and don't have access to hardware,
so I'll pass on maintainership to Alban.

Acked-by: Alban Bedel <alban.bedel@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoTegra114: Do not program CPCON field for PLLX
Thierry Reding [Tue, 1 Oct 2013 15:04:45 +0000 (17:04 +0200)]
Tegra114: Do not program CPCON field for PLLX

PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoTegra114: Fix PLLX M, N, P init settings
Jimmy Zhang [Mon, 23 Sep 2013 20:07:49 +0000 (22:07 +0200)]
Tegra114: Fix PLLX M, N, P init settings

The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoarm: pxa: init ethaddr for LP-8x4x using DT
Sergei Ianovich [Tue, 17 Dec 2013 01:03:44 +0000 (05:03 +0400)]
arm: pxa: init ethaddr for LP-8x4x using DT

When DT define aliases for etherner0 and ethernet1, U-Boot
automatically patched MAC addresses using ethaddr and eth1addr
environment variables respectively.

Custom initialization is no longer needed.

Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
8 years agoarm: pxa: update LP-8x4x to boot DT kernel
Sergei Ianovich [Tue, 17 Dec 2013 01:03:43 +0000 (05:03 +0400)]
arm: pxa: update LP-8x4x to boot DT kernel

DT kernel requires CONFIG_OF_LIBFDT. 'bootm' needs to know DT location.
In addition, fix kernel console device and enable U-Boot long help.

Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
8 years agoarm: pxa: fix 2nd flash chip address on LP-8x4x
Sergei Ianovich [Tue, 17 Dec 2013 01:03:42 +0000 (05:03 +0400)]
arm: pxa: fix 2nd flash chip address on LP-8x4x

Initial configuration has worng address of the second chip.
There is an alias for the 1st chip at 0x02000000 in earlier
verions of LP-8x4x, so the boot normally.

However, new LP-8x4xs have a bigger 1st flash chip, and hang on
boot without this patch.

Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
8 years agoarm: pxa: fix LP-8x4x USB support
Sergei Ianovich [Wed, 18 Dec 2013 16:19:20 +0000 (20:19 +0400)]
arm: pxa: fix LP-8x4x USB support

Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
8 years agoMerge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 18 Dec 2013 16:51:28 +0000 (17:51 +0100)]
Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'

8 years agoARM: pxa: prevent PXA270 occasional reboot freezes
Sergei Ianovich [Tue, 17 Dec 2013 01:03:40 +0000 (05:03 +0400)]
ARM: pxa: prevent PXA270 occasional reboot freezes

Erratum 71 of PXA270M Processor Family Specification Update
(April 19, 2010) explains that watchdog reset time is just
8us insead of 10ms in EMTS.

If SDRAM is not reset, it causes memory bus congestion and
the device hangs.

We put SDRAM in selfresh mode before watchdog reset, removing
potential freezes.

Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
8 years agoarm: koelsch: Add support reset function
Nobuhiro Iwamatsu [Thu, 10 Oct 2013 01:48:20 +0000 (10:48 +0900)]
arm: koelsch: Add support reset function

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: koelsch: Add support I2C
Nobuhiro Iwamatsu [Wed, 11 Sep 2013 06:04:33 +0000 (15:04 +0900)]
arm: koelsch: Add support I2C

This supports sh_i2c on koelsch board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: koelsch: Add support Ethernet
Nobuhiro Iwamatsu [Sun, 20 Oct 2013 11:37:17 +0000 (20:37 +0900)]
arm: koelsch: Add support Ethernet

The koelsch board has one sh-ether device.
This supports sh-ether.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
8 years agoarm: lager: Add support reset function
Nobuhiro Iwamatsu [Thu, 10 Oct 2013 00:13:41 +0000 (09:13 +0900)]
arm: lager: Add support reset function

The lager board uses I2C for reset.

ned-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

8 years agoarm: lager: Add support I2C
Nobuhiro Iwamatsu [Mon, 30 Sep 2013 01:08:40 +0000 (10:08 +0900)]
arm: lager: Add support I2C

The lager board has I2C for rcar.
This supports I2C for rcar on lager board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: lager: Add support Ethernet
Nobuhiro Iwamatsu [Sun, 20 Oct 2013 11:28:24 +0000 (20:28 +0900)]
arm: lager: Add support Ethernet

The lager board has one sh-ether device.
This supports sh-ether.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: rmobile: Update README.rmobile
Nobuhiro Iwamatsu [Tue, 10 Dec 2013 05:52:20 +0000 (14:52 +0900)]
arm: rmobile: Update README.rmobile

Add infomation of Lager and Koelsh board, and R-Car.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
8 years agoimx6: fix random hang when download by usb
Frank Li [Wed, 13 Nov 2013 16:58:46 +0000 (00:58 +0800)]
imx6: fix random hang when download by usb

ROM did not invalidate L1 cache when download by usb
Need invalidate L1 cache before enable cache

Signed-off-by: Huang yongcai <b20788@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
8 years agoARM: mxs: tools: Fix errno handling in strtoul() invocation
Marek Vasut [Wed, 4 Dec 2013 13:27:40 +0000 (14:27 +0100)]
ARM: mxs: tools: Fix errno handling in strtoul() invocation

According to NOTE in strtoul(3), the errno must be zeroed before strtoul()
is called. Zero the errno. The NOTE reads as such:

  Since strtoul() can legitimately return 0 or ULONG_MAX (ULLONG_MAX for
  strtoull()) on both success and failure, the calling program should set
  errno  to  0  before the call, and then determine if an error occurred
  by checking whether errno has a nonzero value after the call.

This issue was detected on Fedora 19 with glibc 2.17 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
8 years agomx6sabresd: Fix LVDS width and color format
Fabio Estevam [Wed, 4 Dec 2013 03:08:17 +0000 (01:08 -0200)]
mx6sabresd: Fix LVDS width and color format

mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.

Suggested-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6sabresd: Allow probing HSYNC, VSYNC and DISP_CLK signals
Fabio Estevam [Wed, 4 Dec 2013 03:08:16 +0000 (01:08 -0200)]
mx6sabresd: Allow probing HSYNC, VSYNC and DISP_CLK signals

HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.

Configure them as active pins.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agomx6: clock: Fix the calculation of PLL_ENET frequency
Fabio Estevam [Tue, 3 Dec 2013 20:26:13 +0000 (18:26 -0200)]
mx6: clock: Fix the calculation of PLL_ENET frequency

According to the mx6 quad reference manual, the DIV_SELECT field of register
CCM_ANALOG_PLL_ENETn has the following meaning:

"Controls the frequency of the ethernet reference clock.
- 00 - 25MHz
- 01 - 50MHz
- 10 - 100MHz
- 11 - 125MHz"

Current logic does not handle the 25MHz case correctly, so fix it.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agoARM: mx53: video: Add IPUv3 LCD support for M53EVK
Marek Vasut [Mon, 2 Dec 2013 16:01:42 +0000 (17:01 +0100)]
ARM: mx53: video: Add IPUv3 LCD support for M53EVK

This patch adds support for the AMPIRE 800x480 LCD panel that is available
for M53EVK.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoMX6 SabreSD: Use readl() to read the CCM_CCGR3 register
Liu Ying [Fri, 29 Nov 2013 14:38:39 +0000 (22:38 +0800)]
MX6 SabreSD: Use readl() to read the CCM_CCGR3 register

Align with the context to use readl() to read the CCM_CCGR3
register with memory barrier instead of __raw_readl().

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
8 years agoARM: mx6: Update non-Freescale boards to include CPU errata.
Eric Nelson [Wed, 27 Nov 2013 00:40:30 +0000 (17:40 -0700)]
ARM: mx6: Update non-Freescale boards to include CPU errata.

The CPU errata expressed in include/configs/mx6_common.h apply
to all i.MX6DQ and i.MX6DLS parts.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
8 years agoconfigs: imx: Remove CONFIG_SYS_SPD_BUS_NUM option
Fabio Estevam [Wed, 20 Nov 2013 22:38:10 +0000 (20:38 -0200)]
configs: imx: Remove CONFIG_SYS_SPD_BUS_NUM option

According to the README:

"- CONFIG_SYS_SPD_BUS_NUM
If SPD EEPROM is on an I2C bus other than the first
one, specify here. Note that the value must resolve
to something your driver can deal with."

There is no SPD EEPROM on the imx boards, so ged rid of this option.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agoudoo: Add SATA support on uDoo Board.
Giuseppe Pagano [Thu, 28 Nov 2013 11:32:49 +0000 (12:32 +0100)]
udoo: Add SATA support on uDoo Board.

Add SATA support on uDoo Board.

Signed-off-by: Giuseppe Pagano <giuseppe.pagano@seco.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
8 years agonitrogen6x: Move setup_sata to common part
Giuseppe Pagano [Thu, 28 Nov 2013 11:32:48 +0000 (12:32 +0100)]
nitrogen6x: Move setup_sata to common part

Move setup_sata function definition from platform file nitrogen6x.c
to arch/arm/imx-common/sata.c to avoid code duplication.

Signed-off-by: Giuseppe Pagano <giuseppe.pagano@seco.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
8 years agoarm: atmel: at91sam9x5: move CONFIG_SYS_NO_FLASH to proper position
Bo Shen [Tue, 10 Dec 2013 08:14:02 +0000 (16:14 +0800)]
arm: atmel: at91sam9x5: move CONFIG_SYS_NO_FLASH to proper position

In config_cmd_default.h, it will use CONFIG_SYS_NO_FLASH to decide
whether include CONFIG_CMD_FLASH and CONFIG_CMD_IMLS. So, move the
CONFIG_SYS_NO_FLASH to proper position, then we don't need to undef
these two commands.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: atmel: at91sam9x5: cleanup unneeded undef
Bo Shen [Tue, 10 Dec 2013 08:14:01 +0000 (16:14 +0800)]
arm: atmel: at91sam9x5: cleanup unneeded undef

remove unneeded #undef for at91sam9x5ek board.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: atmel: at91sam9x5: cleanup cs configure for spi
Bo Shen [Tue, 17 Dec 2013 09:34:43 +0000 (17:34 +0800)]
arm: atmel: at91sam9x5: cleanup cs configure for spi

As the cs for spi is worked in gpio mode, so no need to configure
it as peripheral and then configure to gpio. Configure it to gpio
directly.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoi.MX6 (DQ/DLS): use macros for mux and pad declarations
Eric Nelson [Wed, 13 Nov 2013 23:36:19 +0000 (16:36 -0700)]
i.MX6 (DQ/DLS): use macros for mux and pad declarations

This allows the use of either or both declarations from
the files mx6q_pins.h and mx6dl_pins.h.

All board files should include <asm/arch/mx6-pins.h>
with one of the following defined in boards.cfg
    MX6Q   - for boards targeting i.MX6Q or i.MX6D
    MX6DL  - for boards targeting i.MX6DL
    MX6S   - for boards targeting i.MX6S
    MX6QDL - for boards that support any of the above with
             run-time detection

Pad declarations will be MX6_PAD_x for single-variant boards
and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both
processor classes.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
8 years agoimx: Explicitly pass the I2C bus number in pmic_init()
Fabio Estevam [Wed, 20 Nov 2013 23:17:36 +0000 (21:17 -0200)]
imx: Explicitly pass the I2C bus number in pmic_init()

The pmic_init() function has the I2C or SPI bus number that is connected to the
PMIC.

Instead of passing I2C_PMIC, explicitly pass the I2C bus number via I2C_x
definition.

The motivation for doing this is to avoid people just doing a copy and paste
of I2C_PMIC into their board file when another I2C bus is actually used to
interface to their PMIC.

This also makes more obvious which is the I2C bus connected to the PMIC, without
having to search in the source code for the meaning of the 'I2C_PMIC' number.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>