Łukasz Majewski [Fri, 21 Nov 2014 08:22:43 +0000 (09:22 +0100)]
fix: tools: kwbimage.c: Initialize headersz to suppress warning
When building with my toolchain (4.8.2):
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013.12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12-sanitized/bin/arm-v7a-linux-gnueabi-
I see following WARNING:
tools/kwbimage.c: In function "kwbimage_set_header":
tools/kwbimage.c:803:8: warning: "headersz" may be used uninitialized in this function [-Wmaybe-uninitialized]
memcpy(ptr, image, headersz);
^
This fix aims to suppress it.
Alexey Brodkin [Mon, 29 Dec 2014 12:42:57 +0000 (15:42 +0300)]
arc: introduce "mdbtrick" target
MetaWare debugger (MDB) is still used as a primary tool for interaction
with target via JTAG. Moreover some very advanced features are not yet
implemented in GDB for ARC (and not sure if they will be implemnted
sometime soon given complexity and rare need for those features for
common user).
So if we're talking about development process when U-Boot is loaded in
target memory not by low-level boot-loader but manually through JTAG
chances are high developer uses MDB for it.
But MDB doesn't support PIE (position-independent executable) - it will
refuse to even start - that means no chance to load elf contents on
target.
Then the only way to load U-Boot in MDB is to fake it by:
1. Reset PIE flag in ELF header
This is simpe - on attempt to open elf MDB checks header and if it
doesn't match its expectation refuces to use provided elf.
2. Strip all debug information from elf
If (1) is done then MDB will open elf but on parsing of elf's debug
info it will refuse to process due to debug info it cannot understand
(symbols with PIE relocation).
Even though it could be done manually (I got it documented quite a while
ago here http://www.denx.de/wiki/U-Boot/ARCNotes) having this automated
way is very convenient. User may build U-Boot that will be loaded on
target via MDB saying "make mdbtrick".
Then if we now apply the manipulation MDB will happily start and will
load all required sections into the target.
Indeed there will be no source-level debug info available. But still MDB
will do its work on showing disassembly, global symbols, registers,
accessing low-level debug facilities etc.
As a summary - this is a pretty dirty hack but it simplifies life a lot
for us ARc developers.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de>
Masahiro Yamada [Fri, 26 Dec 2014 13:20:58 +0000 (22:20 +0900)]
mtd: nand: do not scan BBT after scrub
Currently, "nand scrub" runs chip->scan_bbt at the end of
nand_erase_opts() even if NAND_SKIP_BBTSCAN flag is set.
It violates the intention of NAND_SKIP_BBTSCAN.
Move NAND_SKIP_BBTSCAN flag check to nand_block_checkbad() so that
chip->scan_bbt() is never run if NAND_SKIP_BBTSCAN is set.
Also, unset NAND_BBT_SCANNED flag instead of running chip->scan_bbt()
right after scrub. We can be lazier here because the BBT is scanned
at the next call of nand_block_checkbad().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com>
Its git-log claimed that it reinstated the change as by commit fb49454b1b6c ("nand: reinstate lazy bad block scanning"), but it moved
"chip->options |= NAND_BBT_SCANNED" below "chip->scan_bbt(mtd);".
It causes recursion if scan_bbt does not find a flash based BBT
and tries to write one, and the attempt to erase the BBT area
causes a bad block check.
Reinstate commit ff49ea8977b5 (NAND: Mark the BBT as scanned prior to
calling scan_bbt.).
Stefan Agner [Thu, 8 Jan 2015 17:18:25 +0000 (18:18 +0100)]
arm: vf610: fix boot from SD-card
Boot from SD-card (and probably also from NAND) was broken since
commit d6d07a9bec ("arm: vf610: add NAND support for vf610twr").
It looks like the increased size of U-Boot lead to a situation
where the boot ROM overwrote its own stack/heap while loading
U-Boot from the SD-card to the SRAM. However, U-Boot worked fine
when loaded through USB serial loader directly into SRAM. It
looks like loading from SD-card uses other stack/heap location
then the serial loader (or maybe no stack or heap at all).
This fix moves U-Boot to gfxRAM, which is 512kB in size and is not
used by the boot ROM nor the SD-card loader of it.
Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Stefan Agner [Thu, 18 Dec 2014 17:10:33 +0000 (18:10 +0100)]
arm: build arch memset/memcpy in Thumb2 mode
Resynchronize memcpy/memset with kernel 3.17 and build them in
Thumb2 mode (unified syntax). Those assembler files can be built
and linked in ARM mode too, however when calling them from Thumb2
built code, the stack got corrupted and the copy did not succeed
(the exact details have not been traced back). However, the Linux
kernel builds those files in Thumb2 mode. Hence U-Boot should
build them in Thumb2 mode too when CONFIG_SYS_THUMB_BUILD is set.
To build the files without warning, some assembler instructions
had to be replaced with their UAL compliant variant (thanks
Jeroen for this input).
To build the file in Thumb2 mode the implicit-it=always option need
to be set to generate Thumb2 compliant IT instructions where needed.
We add this option to the general AFLAGS when building for Thumb2.
Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Agner <stefan@agner.ch>
Lothar Waßmann [Fri, 9 Jan 2015 11:33:40 +0000 (12:33 +0100)]
karo: introduce variables 'safeboot' and 'wdreset'
The environment variable 'safeboot' will be set when <CTRL-C> is
detected early in the boot process.
'wdreset' is set when the last boot cause was a watchdog reset.
This makes it possible to handle these events from the boot scripts.
Lothar Waßmann [Fri, 9 Jan 2015 11:22:56 +0000 (12:22 +0100)]
net: phy: make autonegotiation configurable
Introduce environment variables to configure the use of
ethernet autonegotiation.
The variable names are derived from the ethernet device name
('FEC' for TX51,TX53,TX6; 'FEC0','FEC1' for TX28; 'cpsw' for TX48)
with the suffix '_aneg' appended.
If the '*_aneg' variable is unset or set to a string starting in
'y','t' or '1' autonegotiation will be enabled and the '*_speed' and
'*_duplex' variables have no meaning.
Otherwise autonegotiation is disabled and the link speed and duplex
settings can be configured with the variables: '*_speed' and
'*_duplex' (with '*' replaced with the prefix described above).
Lothar Waßmann [Fri, 9 Jan 2015 11:19:25 +0000 (12:19 +0100)]
karo: config: prevent conversion of numerical value '1' in header files to 'y' by define2mk.sed
The script 'tools/scripts/define2mk.sed' converts all defines with the
value '1' to 'y' to facilitate conditional compilation in Makefiles.
Prepend a '0x' prefix to values of '1' which should be kept as
numbers.
Lothar Waßmann [Fri, 9 Jan 2015 11:15:47 +0000 (12:15 +0100)]
karo: reset fdtaddr to the original value due to prevent overlap with linux kernel
Moving the FDT to low RAM leaves only 28KiB between the FDT start
address and the standard address to which the linux image is unpacked
during boot. Thus the linux kernel will overwrite portions of the FDT
if this is larger than 28KiB (which is already the case for TX6).
Put the FDT at the original address 16MiB from RAM start to prevent
this.
Lothar Waßmann [Fri, 9 Jan 2015 10:49:50 +0000 (11:49 +0100)]
karo: tx48: explicitly call tx48_phy_init()
The .phy_init callback in the cpsw_platform_data which hooks the
tx48_phy_init() function is not being used by the cpsw driver.
Call the function explicitly to make sure the ethernet phy is properly
initialized.
Also make sure the RESET_OUT pin of the TX48 module is activated
as early as possible.
Lothar Waßmann [Fri, 9 Jan 2015 10:49:53 +0000 (11:49 +0100)]
arm: mx6: update temperature calculation code
There are i.MX6 processors where the calibration values for the hot
points are not programmed. Use the temperature calculation code from
Linux kernel to accomodate this.
Lothar Waßmann [Fri, 9 Jan 2015 10:49:51 +0000 (11:49 +0100)]
karo: tx6: change CONFIG_SYS_TEXT_BASE to accomodate boards with less than 256MiB memory
The default address taken from the original Freescale BSP is beyond
256MiB. Thus modules with less than that amount of memory cannot work.
Change the address to be inside the first memory bank for all sensible
memory sizes.
Lothar Waßmann [Fri, 9 Jan 2015 10:49:51 +0000 (11:49 +0100)]
arm: mx6: fix definition of PLL2 PFD frequencies
i.MX6Q and i.MX6DL have different values for the PLL2 PFD0 and PFD1
frequencies. Furthermore the actual value for the PFD2 frequency is
396MHz rather than 400MHz.
Add a specific relocate_vectors macro that skips the vector relocation, as the
i.MX25 SoC does not provide RAM at the high vectors address (0xFFFF0000), and
(0x00000000) maps to ROM.
This allows mx25 to boot again.
Acked-By: Bill Pringlemeir <bpringlemeir@nbsps.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Peng Fan [Thu, 8 Jan 2015 02:40:21 +0000 (10:40 +0800)]
imx:mx6sxsabresd support qspi AHB read
Add CONFIG_SYS_FSL_QSPI_AHB in header file to enable AHB in driver.
In order to count the time, add CONFIG_CMD_TIME.
Using AHB read can improve the the read speed about 30%.
AHB read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.174 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.174 seconds
IP read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.227 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.227 seconds
Note:
Quad read is not supported in driver, now. In my side, using AHB and Quad read
can achieve about 16MB/s. Anyway, I have plan to reimplement the driver using
DTB and DM, then make the code cleaner and more feature can be added.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Peng Fan [Thu, 8 Jan 2015 02:40:20 +0000 (10:40 +0800)]
qspi:fsl implement AHB read
The QSPI controller in i.MX 6SoloX and Vybrid supports reading data using
IP register and AHB bus.
The original driver only supports reading data from IP interface. The IC
team suggests to use AHB read which is faster then IP read. Using AHB read,
we can directly memcpy, a "missed" access to the buffer will cause the
controller to clear the buffer and use the SEQID stored in bfgencr register
to initiate a read from flash device.
Since AHB bus is 64 bit width, we can not set MCR register using 32bit. In
order to minimize code change, redefine QSPI_MCR_END_CFD_LE to 64bit Little
endian but not 32bit Little endia.
Introduce a new configuration option CONFIG_SYS_FSL_QSPI_AHB. If want to
use AHB read, just define CONFIG_SYS_FSL_QSPI_AHB. If not, just ignore it.
Actually if Vybrid is migrated to use AHB read, this option can be removed and
IP read function can be discared. The reason to introduce this option
is that only i.MX SOC is tested in my side, no Vybrid platform for me.
In spi_setup_slave, the original piece code to set AHB is deleted, since
Vybrid platform does not use this to intiate AHB read. Instead, add
qspi_init_ahb_read function if defined CONFIG_SYS_FSL_QSPI_AHB.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Peng Fan [Tue, 6 Jan 2015 06:12:51 +0000 (14:12 +0800)]
i2c:mxc fix array size of i2c_data
We should not hardcode array size of i2c_data to 3. To CONFIG_FSL_LSCH3,
there are 4 i2c interface, but not 3. So the size of i2c_data array should
be calculated using "ARRAY_SIZE(i2c_bases)".
To avoid compile error, move i2c_bases before sram_data structure which
contains i2c_data array.
Luka Perkov [Wed, 7 Jan 2015 23:32:06 +0000 (23:32 +0000)]
MAINTAINERS: add me as a co-maintainer of KIRKWOOD
Signed-off-by: Luka Perkov <luka.perkov@sartura.hr> CC: Prafulla Wadaskar <prafulla@marvell.com> CC: Wolfgang Denk <wd@denx.de> Acked-by: Stefan Roese <sr@denx.de>
Maxime Ripard [Thu, 8 Jan 2015 11:26:44 +0000 (12:26 +0100)]
gpt: Fix the protective MBR partition size
According to the UEFI Spec (Table 16, section 5.2.3 of the version 2.4 Errata
B), the protective MBR partition record size must be set to the size of the
disk minus one, in LBAs.
However, the current code was setting the size as the total number of LBAs on
the disk, resulting in an off-by-one error.
This confused the AM335x ROM code, and will probably confuse other tools as
well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
scripts: fix binutils-version.sh for 'as' without a package.
Commit 73c25753 fixed the common issue that binutil packages (tool/organization
that packaged or built the bin-utils) are included in brackets and this may
falsely be recognized as a version. However, some tools do not provide a
'package' and previously we add the 'Gnu assembler..' to the version.
Strip out the '(package version text)' and then look for a ##.## string.
Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
Masahiro Yamada [Tue, 6 Jan 2015 05:20:04 +0000 (14:20 +0900)]
ARM: UniPhier: enable output of system bus
For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs,
the output of the system bus is disabled by default.
It must be enabled by software to have access to the system bus.
Masahiro Yamada [Tue, 6 Jan 2015 05:18:57 +0000 (14:18 +0900)]
ARM: UniPhier: fix SRAM size on support card
The max size of available memories on slot0 and slot1 is 32MB because
- EA[25] signal is not output on the save-pin mode which is
used PH1-LD4 or later SoCs.
- EA[25] signal is not connected by the limitation (or bug?) of
the PLD logic of DCC support card.
Peng Fan [Sun, 4 Jan 2015 09:07:14 +0000 (17:07 +0800)]
spi:fsl-quadspi support bank register read write
To support bigger than 16MB size qspi flashes, spi framework uses bank
switch to access higher bank or lower bank.
In this patch, QSPI_CMD_BRRD, QSPI_CMD_BRWR, QSPI_CMD_WREAR, QSPI_CMD_RDEAR
is initialized in LUT register with related pad and length configuration.
qspi_op_pp is originally for page programming, this patch reuses this function
for bank register switch and renamed it with qspi_op_write.
Since bank or EAR register is only 1 byte length, however original qspi_op_pp
or now renamed qspi_op_write only support 4 bytes lenght as the access unit,
this will trigger data abort exception when access EAR or bank register.
This is because upper framework passes a 1 bytes pointer to qspi_op_write,
however qspi_op_write treat it as an int pointer. This patch fixes this for
accessing EAR or bank register.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Axel Lin [Tue, 6 Jan 2015 00:08:25 +0000 (08:08 +0800)]
spi: designware_spi: Fix detecting FIFO depth
Current code tries to find the highest valid fifo depth by checking the value
it wrote to DW_SPI_TXFLTR. There are a few problems in current code:
1) There is an off-by-one in dws->fifo_len setting because it assumes the latest
register write fails so the latest valid value should be fifo - 1.
2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary
to test fifo == 257. In the case fifo is 257, it means the latest valid
setting is fifo = 256. So after the for loop iteration, we should check
fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails.
This patch fixes above issues.
Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
As reported by Robert Nelson, commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
may break MMC RAW boot mode.
This patch fixes the check path to fix MMC Raw boot mode.
Tested raw boot mode and FS boot mode on a pandaboard (rev. A3).
Reported-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@ti.com> Cc: Robert Nelson <robertcnelson@gmail.com> Tested-by: Robert Nelson <robertcnelson@gmail.com>
Sjoerd Simons [Thu, 27 Nov 2014 15:34:08 +0000 (16:34 +0100)]
cros-ec-keyboard: Synchronize DT binding from linux
The ChromeOS EC keyboard is used by various different chromebooks. Peach
pi being the third board in the u-boot tree to use it (snow and peach
pit the other two). Rather then embedding the same big DT node in the
peach-pi DT again, copy the dtsi snippit & bindings documentation from
linux and include it in all 3 boards.
This slightly changes the dt bindings in u-boot:
* google,key-rows becomes keypad,num-rows
* google,key-colums becomes keypad,num-colums
* google,repeat-delay-ms and google,repeat-rate-ms are no longer used
and replaced by hardcoded values (similar to tegra kbc)
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 18 Dec 2014 11:00:26 +0000 (20:00 +0900)]
i2c_eeprom: include <linux/err.h> to fix build error
drivers/misc/i2c_eeprom.c fails to build unless CONFIG_FIT_SIGNATURE
is defined.
CC drivers/misc/i2c_eeprom.o
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:15:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:15:10: note: each undeclared identifier
is reported only once for each function it appears in
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_write':
drivers/misc/i2c_eeprom.c:21:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:22:1: warning: control reaches end of
non-void function [-Wreturn-type]
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:16:1: warning: control reaches end of
non-void function [-Wreturn-type]
make[2]: *** [drivers/misc/i2c_eeprom.o] Error 1
make[1]: *** [drivers/misc] Error 2
make: *** [drivers] Error 2
By the way, Sandbox (enabling CONFIG_FIT_SIGNATURE) is luckily
working depending on it.
Sandbox includes include/asm-generic/errno.h
from include/errno.h
from include/u-boot/rsa-checksum.h
from include/image.h
from include/common.h
from drivers/misc/i2c_eeprom.c
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Sonic Zhang [Wed, 10 Dec 2014 10:20:53 +0000 (18:20 +0800)]
memmove_wd: copy chunk down from big address if parameter to is larger than from
When watchdog is enabled, memmove_wd() always copy chunk up from small address.
This damanges overlapped memory data if destination address is smaller than
source address.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Simon Glass <sjg@chromium.org>
Guido Martínez [Fri, 2 Jan 2015 17:49:10 +0000 (14:49 -0300)]
mtd: nand: omap_gpmc: fix error handling
"err" was an unsigned variable, causing negative error codes to turn
into positive values, which are interpreted as an amount of succesfully
corrected bitflips (and thus not an error).
In particular, this resulted in that if the elm reports uncorrectable
errors (-EBADMSG), the MTD layer (and UBI) falsely succeeded.
Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar> Reviewed-by: Stefan Roese <sr@denx.de>
Peter Howard [Wed, 17 Dec 2014 01:14:36 +0000 (12:14 +1100)]
da850evm: Use generic board and libfdt, fix size for SPI flash
Add defines to use CONFIG_SYS_GENERIC_BOARD and CONFIG_OF_LIBFDT.
Semi-separate to this: the size of the image for the da850evm has
increased to the point that the size in da850evm.h and the offset for
the environment in SPI flash no longer work. They are modified to
account for the larger image size.
Signed-off-by: Peter Howard <phoward@gme.net.au> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
The present fat implementation ignores FAT16 long name
directory entries which aren't placed in a single sector.
This was becouse of the buffer was always filled by the
two sectors, and the loop was made also for two sectors.
If some file long name entries are stored in two sectors,
the we have two cases:
Case 1:
Both of sectors are in the buffer - all required data
for long file name is in the buffer.
- Read OK!
Case 2:
The current directory entry is placed at the end of the
second buffered sector. And the next entries are placed
in a sector which is not buffered yet. Then two next
sectors are buffered and the mentioned entry is ignored.
- Read fail!
This commit fixes this issue by:
- read two sectors after loop on each single is done
- keep the last used sector as a first in the buffer
before the read of two next
The commit doesn't affects the fat32 imlementation,
which works good as previous.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Mikhail Zolotaryov <lebon@lebon.org.ua> Cc: Tom Rini <trini@ti.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Suriyan Ramasami <suriyan.r@gmail.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Tested-by: Simon Glass <sjg@chomium.org>
Nishanth Menon [Thu, 18 Dec 2014 21:28:35 +0000 (15:28 -0600)]
ARM: OMAP4: Panda: rework DMM logic
Part of DMM logic is reuse from commit 47a4bea6af77b01d59a410d09a4c34b2dd14cf50 ("ARM: omap4: Update sdram
setting for panda rev A6") Which broke SDP4430 with ES2.3 (uses old
DDR).
So, to maintain support for newer DDR used in Panda ES rev B3, we
should, in addition to the commit 675cc77a3ae45e8b0ec17128563264d4a509f628 ("ARM:OMAP4+: panda-es: Support
Rev B3 Elpida DDR2 RAM"), DDR timings, also do DMM configuration
specific to Panda.
Tom Rini [Fri, 19 Dec 2014 21:52:55 +0000 (16:52 -0500)]
omap-common/hwinit-common.c: timer_init() doesn't need to touch gd
The gd will be cleared at first so we don't need to set arch.tbl to 0.
In addition, the checks later against lastinc also work fine with an
initial value of 0 here. This also brings us in line with sunxi code
for example.
Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Hua Yanghao [Sun, 21 Dec 2014 20:45:59 +0000 (04:45 +0800)]
cmd_fdt: fix working_fdt is set to wrong value
Instead of setting working_fdt to map_sysmem(addr) (e.g. blob), it should be set
to addr directly as inside set_working_fdt_addr it uses map_sysmem(addr) again.
To test: ./u-boot -d dts/dt.bin , then issue: fdt addr 0x100, fdt print will
then cause an segmentation fault. After this fix fdt print is functional.
projects / karo-tx-uboot.git / log