Jason Hobbs [Tue, 23 Aug 2011 11:06:52 +0000 (11:06 +0000)]
Add isblank
Existing ctype checks are implemented using a 256 byte lookup table,
allowing each character to be in any of 8 character classes. Since there
are 8 existing character classes without the blank class, I implemented
isblank without using the lookup table. Since there are only two blank
characters - tab and space - this is a more reasonable approach than
doubling the size of the lookup table to accommodate one more class.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Jason Jin [Thu, 25 Aug 2011 07:46:43 +0000 (15:46 +0800)]
DM9000:Add a byte swap macro for dm9000 io operation.
commit a45dde2293c816138e53c26eca6fd0322583f9a6 changed the dm9000
direct register access to standard IO. This should work
on the ColdFire platform as there are corresponding macros for
the LE devices. But the hardware settings on some ColdFire boards had
swapped the byte order which make the original macros such as out_le16
cannot work. To avoid changing the common io access code on ColdFire
platform, the DM9000_BYTE_SWAPPED define was added to make the dm9000 use
__raw* IO access on some ColdFire boards.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Helmut Raiger [Wed, 12 Oct 2011 23:16:29 +0000 (23:16 +0000)]
video: Moving mx3fb.c to CONFIG_VIDEO
mx3fb.c was based on CONFIG_LCD and is moved by this patch to
CONFIG_VIDEO, which has greater freedom in selecting videomodes
even at runtime.
This renders the accumulating list of display defines
(CONFIG_DISPLAY_VBEST..., CONFIG_DISPLAY_C057...) obsolete as
these may be setup through env variables:
This commit also fixes the board config files for qong and
imx31_phycore boards as needed. The videomode settings of
previously supported displays are added to CONFIG_EXTRA_ENV_SETTINGS
now. CONFIG_SYS_MALLOC_LEN for imx31_phycore board is increased
to make the frame buffer allocation working with the changed
driver.
Helmut Raiger [Wed, 12 Oct 2011 21:08:30 +0000 (23:08 +0200)]
mx31: make HSP clock for mx3fb driver available
This additionally updates mx31/generic.c by
- replacing __REG() macro accesses with readl() and writel()
- providing macros for PDR0 and PLL bit accesses
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which is
the resolution of the display. The patch switches the driver
to CONFIG_VIDEO and the memory is allocated by the driver itself.
We also need to switch the vision2 board code and config file
in the same commit so that this commit will be bisectable.
Mike Frysinger [Mon, 17 Oct 2011 05:38:58 +0000 (05:38 +0000)]
powerpc: cpm2 boards: update fcc register logic
In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304),
I misread the logic in include/net.h. Some of it was used by NET_MULTI
code as glue between the multi/non-multi worlds for cpm2 boards.
Rather than restore the block of code, push the logic to the board config
headers where it all belongs.
zlib: handle overflow while calculating available stream input size
If compressed data is located in sectors at the end of the flash and
it's offset + input stream size > 0xFFFFFFFF, the uncompressing time
is very long, since processing of the stream is done bytewise (and
not blockwise) due to overflow in inflate_fast() while calculation
and checking for enough input available.
Check for this overflow condition and limit the available stream
input size to the actually max. possible input size. This fixes
the problem.
The issue is easily reproduceable by placing a gziped bitmap in flash,
e.g. at FFF80000, and running 'bmp' commands like 'bmp info FFF80000'
or 'bmp display FFF80000'. The uncompressing can take up to 3 sec.
whereas it should normaly take a fraction of a second. If the
'splashimage' environment variable points to this address, the
booting time also increases significantly.
Mike Frysinger [Thu, 13 Oct 2011 06:54:57 +0000 (06:54 +0000)]
punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used. Punt them all.
MAKEALL didn't report any errors related to this that I could see.
common: fix missing function pointer relocation in fixup_cmdtable()
The command auto-completion does not work on architectures relying
on CONFIG_NEEDS_MANUAL_RELOC like MIPS. Cause is the missing function
pointer fixup for cmd_tbl_t::complete function in fixup_cmdtable().
This patch adds the missing pointer fixup in case of CONFIG_AUTO_COMPLETE
is defined.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
A delay of approximately 250 ms after PCI bus reset in
pci_mpc5xxx_init() is needed to recognize the Coral-PA
controller on the graphic extention board.
pci: move pcidelay code to new location just before PCI bus scan
PCI cards might need some time after reset to respond. On some
boards (mpc5200 or mpc8260 based) the PCI bus reset is deasserted
at pci_init_board() time, so we currently can not use available
"pcidelay" option for waiting before PCI bus scan since this
waiting takes place before calling pci_init_board(). By moving
the pcidelay code to the new location using of the "pcidelay"
option is possible on mpc5200 or mpc8260 based boards, too.
Since pci_hose_scan() could be called multiple times, restrict
the function to wait only during its first call and to ignore
pcidelay for any further call (as pointed out by Matthias).
Wolfgang Denk [Sat, 15 Oct 2011 20:00:01 +0000 (22:00 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt
* 'master' of git://git.denx.de/u-boot-fdt:
powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles
fdt: update fdt_alloc_phandle to use fdt_get_phandle
fdt: check for fdt errors in fdt_create_phandle
fdt: Add a do_fixup_by_path_string() function
Timur Tabi [Tue, 20 Sep 2011 23:24:36 +0000 (18:24 -0500)]
powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles
Function fdt_create_phandle() conveniently creates new phandle properties
using both "linux,phandle" and "phandle", so it should be used by all code
that wants to create a phandle.
The Fman firmware code, which embeds an Fman firmware into the device tree,
was creating the phandle properties manually. Instead, change it to use
fdt_create_phandle().
Timur Tabi [Tue, 20 Sep 2011 23:24:35 +0000 (18:24 -0500)]
fdt: update fdt_alloc_phandle to use fdt_get_phandle
The device tree compiler, dtc, can use "phandle" and/or "linux,phandle"
properties to specify the phandle for any node. By default, it uses
both, but "linux,phandle" is deprecated. One day, we'd like to stop using
"linux,phandle", but U-boot needs to support both properties equally
first.
fdt_alloc_phandle() generates a unique phandle, but it was only checking
the "linux,phandle" properties. Instead, we use fdt_get_phandle(),
which checks both properties automatically. This ensures that we
support dtbs that only use "phandle".
The side-effect is that fdt_alloc_phandle() now takes twice as long, since
it has to check for two properties instead of one in each node that it
searches.
Timur Tabi [Tue, 20 Sep 2011 23:24:34 +0000 (18:24 -0500)]
fdt: check for fdt errors in fdt_create_phandle
fdt_create_phandle() was ignoring errors from fdt_set_phandle(). If an
error occurs, print an error message and return 0, which is an invalid
phandle. We also need to change the return type for fdt_create_phandle()
to indicate that it cannot return an error code.
Chunhe Lan [Wed, 31 Aug 2011 02:36:32 +0000 (10:36 +0800)]
fdt: Add a do_fixup_by_path_string() function
The do_fixup_by_path_string() will set the specified node's property to the
value contained in "status". It would just be an inline wrapper for
do_fixup_by_path() that calls strlen on the argument.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Kumar Gala [Wed, 12 Oct 2011 20:52:08 +0000 (15:52 -0500)]
powerpc/85xx: Drop CONFIG_VIDEO on P1_P2_RDB-PC boards to reduce size
With older compilers (gcc-4.2.x) we run into issues that resulting image
is too large. We can save a bunch of space by removing the video support.
In general video support on these boards is a nice to have since it
requires a PCIe add-on card.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
chenhui zhao [Thu, 13 Oct 2011 05:40:59 +0000 (13:40 +0800)]
powerpc/mpc8548cds: Code cleanup and refactoring
- Rework tlb and law tables.
- PCI2 is not available on MPC8548CDS, so remove it.
- Move the memory map to the board config file.
- Rewrite the board info according to the manual.
- Remove unnecessary macros and redefine some macros to align with other boards.
- Fix some typos.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 28 Sep 2011 14:51:14 +0000 (10:51 -0400)]
powerpc/p3041: fixup portal config info
P3041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
are utilized the proper mapping tables can be setup uniquely
(PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
assignments are tuned around an assumption of at most 5
partitions.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 28 Sep 2011 14:51:13 +0000 (10:51 -0400)]
powerpc/p2041: fixup portal config info
P2041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
are utilized the proper mapping tables can be setup uniquely
(PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
assignments are tuned around an assumption of at most 5
partitions.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 28 Sep 2011 14:51:15 +0000 (10:51 -0400)]
powerpc/p5020: fixup portal config info
P5020 has 10 qman portals, we need to configure all of them:
* As there are only 2 physical cores sdest can only be 0 or 1
* We assign dqrr & frame data LIODNs for all portals so if they
are utilized the proper mapping tables can be setup uniquely
(PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
assignments are tuned around an assumption of at most 5
partitions.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Wed, 12 Oct 2011 20:45:30 +0000 (22:45 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
* 'master' of git://git.denx.de/u-boot-ppc4xx:
ppc4xx: Change DDR2 CL from 4 to 5 for intip
ppc4xx: Improve lm63 pwm on dlvision-10g
ppc4xx: Do not stop booting on any keypress on intip
Wolfgang Denk [Wed, 12 Oct 2011 20:42:28 +0000 (22:42 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
microblaze: Copy bootfile from variables
microblaze: Fix unaligned.h for endians
microblaze: Initialize jumptable and console
microblaze: Support flashes on lower addresses
microblaze: Call common console_init_f initialization function
This Jz4740-based clamshell device does not use NOR flash to boot.
The initial bring-up assumes that U-Boot is directly loaded into SDRAM
using USB boot tool, and starts from 0x80100000.
About USB boot tool
-------------------
Jz4740 is one of the XBurst processors with USB boot functionality
supported. The CPU can boot from a small ROM in the LSI, initialize
CPU and USB module, then wait for USB commands from the USB host.
We can send 8 KB binary data to the CPU cache using USB boot tool.
USB boot tool is available to the public at Ingenic website. Also
there is an alternative Debian package named xburst-tools.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Xiangfu Liu [Wed, 12 Oct 2011 04:24:06 +0000 (12:24 +0800)]
MIPS: Jz4740: Add NAND driver
Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices
nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Holger Brunck [Mon, 10 Oct 2011 11:08:19 +0000 (13:08 +0200)]
UBI: init eba tables before wl when attaching a device
This fixes that u-boot gets stuck when a bitflip was detected
during "ubi part <ubi_device>". If a bitflip was detected UBI tries
to copy the PEB to a different place. This needs that the eba table
are initialized, but this was done after the wear levelling worker
detects the bitflip. So changes the initialisation of these two
tasks in u-boot.
This is a u-boot specific patch and not needed in the linux layer,
because due to commit 1b1f9a9d00447d
UBI: Ensure that "background thread" operations are really executed
we schedule these tasks in place and not as in linux after the inital
task which schedule this new task is finished.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Lars Poeschel [Wed, 12 Oct 2011 09:31:19 +0000 (11:31 +0200)]
ubifs bad superblock bug
This patch fixes an issue when ubifs reads a bad superblock. Later it
tries to free memory, that was not allocated, which freezes u-boot.
This is fixed by looking for a non null pointer before free.
The message I got before u-boot freezes:
UBI: max/mean erase counter: 53/32
UBIFS: mounted UBI device 0, volume 1, name "rootfs"
UBIFS: mounted read-only
UBIFS: file system size: 49140 bytes (50319360 KiB, 0 MiB, 49140 LEBs)
UBIFS: journal size: 49 bytes (6838272 KiB, 0 MiB, 6678 LEBs)
UBIFS: media format: w4/r0 (latest is w4/r0)
UBIFS: default compressor: LZO
UBIFS: reserved for root: 0 bytes (0 KiB)
UBIFS error (pid 0): ubifs_read_node: bad node type (255 but expected 9)
UBIFS error (pid 0): ubifs_read_node: bad node at LEB 330:13104
UBIFS error (pid 0): ubifs_iget: failed to read inode 1, error -22
Error reading superblock on volume 'ubi:rootfs'!
Signed-off-by: Lars Poeschel <larsi@wh2.tu-dresden.de> Cc: Kyungmin Park <kmpark@infradead.org> Signed-off-by: Stefan Roese <sr@denx.de>
In nand_davinci_readecc(), select the correct NANDF<n>ECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.
Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had the correct handling, and allows refactoring to a single
function encapsulating the register read.
Without this fix, writing NAND pages to a chip not wired to CS2 would
result in in the ECC calculation always returning FFFFFF for each
512-byte segment, and reading back a correctly written page (one with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.
Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Xiangfu Liu [Wed, 12 Oct 2011 04:24:06 +0000 (12:24 +0800)]
MIPS: Ingenic XBurst Jz4740 processor support
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.
JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.
On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application. NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.
For more info about Ingenic XBurst Jz4740:
http://en.ingenic.cn/eng/
http://www.linux-mips.org/wiki/Ingenic
This patch introduces XBurst CPU support in U-Boot. It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Xie Xiaobo [Mon, 3 Oct 2011 19:54:21 +0000 (12:54 -0700)]
powerpc/mpc8536ds: Save the env variables to SDcard and SPI flash
MPC8536DS offer booting from SDcard or SPI flash. This patch defined that
u-boot can save the environment variables on SDcard or SPI flash when
booting from the related device. The Env parameter region and linux
kernel region have overlap in SPI-Flash, So change the Env param saving
address.
Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Xie Xiaobo [Mon, 3 Oct 2011 19:18:40 +0000 (12:18 -0700)]
powerpc/mpc8536ds: Invert SDHC_WP pin polarity
MPC8536 Rev 1.0 silicon have NMG_eSDHC118 erratum, so that the SDHC write
protected pin polarity does not follow the SD card standard in MPC8536
Rev 1.0 silicon.
The MPC8536DS board invert the SDHC_WP pin as a workaround. However, this
silicon erratum has been fixed in Rev 1.1, So need invert the SDHC_WP
polarity again when use the MPC8536 Rev1.1 and greater on MPC8536DS board.
Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Xie Xiaobo [Mon, 3 Oct 2011 19:18:39 +0000 (12:18 -0700)]
powerpc/mpc8536ds: Add eSPI support for MPC8536DS
1. The SD_DATA[4:7] signals are shared with the SPI chip selects on 8536DS,
so don't set MPC85xx_PMUXCR_SD_DATA that config eSDHC data bus-width
to 4-bit and enable SPI signals.
2. Add eSPI controller and SPI-FLASH definition.
Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
- Increase the size of malloc space.
- Enable e1000 network card.
- Show pci devices on startup.
- Change the location of env address.
- Use hwconfig to turn off ECC by default.
[Kumar Gala] Fixed white space formating for CONFIG_EXTRA_ENV_SETTINGS
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Tue, 4 Oct 2011 00:10:51 +0000 (19:10 -0500)]
powerpc/mpc86xx: Disable translation for BAT setup
We really shouldn't be overwriting bat registers with translation enabled,
especially when we're executing code using one of them for translating
the current instruction stream. Instead, disable address translation
while doing the final BAT setup.
In order to do this, setup_bats has to move back to asm code, because we
require translation to be enabled to have a stack for C code. The yucky
thing about that is that the assembler doesn't like ULL so we have to
switch to using HIGH/LOW pairs for physical addresses that are > 32 bits
in length.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Tue, 4 Oct 2011 21:44:43 +0000 (16:44 -0500)]
powerpc/85xx: fix null pointer dereference when init the SGMII TBI PHY
Function dtsec_configure_serdes() needs to know where the TBI PHY registers
are in order to configure SGMII for proper SerDes operation.
During SGMII initialzation, fm_eth_init_mac() passing NULL for 'phyregs'
when it called init_dtsec(), because it was believed that phyregs was not
used. In fact, it is used by dtsec_configure_serdes() to configure the TBI
PHY registers.
We also need to define the PHY registers in struct fm_mdio.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
York Sun [Mon, 3 Oct 2011 16:19:53 +0000 (09:19 -0700)]
powerpc/mpc8xxx: Merge entries in DDR speed table
It is not necessary to keep multiple entries for the same setting in DDR
speed tables. Merge them for smaller tables. Also restructure the tables
for smaller size. Cleanup some typedefs.
Enforce strict checking for speed table. If DIMM is running at higher than
known speed, try to use the highest speed setting. If rank is unknown, it
has to panic.
Removed ODT overriding for P2020DS as it is not necessary.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Andy Fleming [Wed, 20 Apr 2011 23:41:17 +0000 (18:41 -0500)]
phylib: Work around bug in Teranetics PHY
The Teranetics PHY does not properly report the link state
for fiber connections. The new PHY code actually checked the link,
and so the FM driver would refuse to talk over a linkless PHY.
But the link may actually be up, so now we always report it as up
for fiber connections on the tn2020.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Timur Tabi [Tue, 6 Sep 2011 14:36:06 +0000 (09:36 -0500)]
powerpc/85xx: CONFIG_ENABLE_36BIT_PHYS does not depend on CONFIG_PHYS_64BIT
The macro CONFIG_ENABLE_36BIT_PHYS is used to indicate that the given SOC is
capable of 36-bit physical addresses, even if such large addresses are not
used. On two boards, this macro was enabled only when building a 36-bit
image.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
York Sun [Fri, 16 Sep 2011 20:21:35 +0000 (13:21 -0700)]
powerpc/8xxx: Add support for interactive DDR programming interface
Interactive DDR debugging provides a user interface to view and modify SPD,
DIMM parameters, board options and DDR controller registers before DDR is
initialized. With this feature, developers can fine-tune DDR for board
bringup and other debugging without frequently having to reprogram the flash.
To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
file and set an environment variable to activate it. Syntax:
setenv ddr_interactive on
After reset, U-boot prompts before initializing DDR controllers
FSL DDR>
The available commands are
print print SPD and intermediate computed data
reset reboot machine
recompute reload SPD and options to default and recompute regs
edit modify spd, parameter, or option
compute recompute registers from current next_step to end
next_step shows current next_step
help this message
go program the memory controller and continue with u-boot
The first command should be "compute", which reads data from DIMM SPDs and
board options, performs the calculation then stops before setting DDR
controller. A user can use "print" and "edit" commands to view and modify
anything. "Go" picks up from current step with any modification and
compltes the calculation then enables the DDR controller to continue u-boot.
"Recompute" does it over from fresh reading.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Wed, 5 Oct 2011 21:11:19 +0000 (23:11 +0200)]
common/usb.c: fix warning: variable ... set but not used
Fix:
usb.c: In function 'usb_parse_config':
usb.c:331:17: warning: variable 'ch' set but not used [-Wunused-but-set-variable]
usb.c: In function 'usb_hub_port_connect_change':
usb.c:1123:29: warning: variable 'portchange' set but not used [-Wunused-but-set-variable]
usb.c: In function 'usb_hub_configure':
usb.c:1183:25: warning: variable 'hubsts' set but not used [-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Acked-by: Remy Bohmer <linux@bohmer.net>
Wolfgang Denk [Wed, 5 Oct 2011 20:59:27 +0000 (22:59 +0200)]
drivers/net/smc91111.c: fix warning: variable ... set but not used
Fix:
smc91111.c: In function 'smc_phy_configure':
smc91111.c:1194:6: warning: variable 'failed' set but not used [-Wunused-but-set-variable]
smc91111.c:1190:7: warning: variable 'phyaddr' set but not used [-Wunused-but-set-variable]
Wolfgang Denk [Wed, 5 Oct 2011 20:58:11 +0000 (22:58 +0200)]
fs/jffs2/jffs2_1pass.c: fix warning: variable ... set but not used
Fix:
jffs2_1pass.c: In function 'jffs2_1pass_read_inode':
jffs2_1pass.c:699:7: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
jffs2_1pass.c: In function 'jffs2_1pass_build_lists':
jffs2_1pass.c:1578:14: warning: variable 'empty_start' set but not used [-Wunused-but-set-variable]
Wolfgang Denk [Wed, 5 Oct 2011 20:48:12 +0000 (22:48 +0200)]
CFI: fix warning: variable ... set but not used
Fix:
cfi_mtd.c: In function 'cfi_mtd_init':
cfi_mtd.c:226:19: warning: variable 'mtd_list' set but not used [-Wunused-but-set-variable]
cfi_mtd.c: In function 'cfi_mtd_init':
cfi_mtd.c:225:6: warning: unused variable 'devices_found'
cfi_mtd.c: In function 'cfi_mtd_init':
cfi_mtd.c:226:19: warning: variable 'mtd_list' set but not used [-Wunused-but-set-variable]
[-Wunused-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Fri, 7 Oct 2011 07:58:21 +0000 (09:58 +0200)]
README: fix documentation of CONFIG_SHOW_BOOT_PROGRESS
Some previous changes added code right in the middle of the
description of CONFIG_SHOW_BOOT_PROGRESS. Move this text down.
Fix formatting while we are at it.
Stefan Roese [Fri, 7 Oct 2011 01:05:49 +0000 (01:05 +0000)]
ppc: Fix DBSR_IAx defines in <bedbug/regs.h>
While adding asm/cache.h to common.h for PPC targets, I got an
error about multiple definitions of some DBSR_ macros. While
scanning these defines, I noticed that some where defined not
correctly for all PPC variants. So I removed all unused defines,
and corrected the ones really used by bedbug (book-e vs. ppc40x).
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
Stefan Roese [Fri, 7 Oct 2011 01:05:34 +0000 (01:05 +0000)]
ppc: Include <asm/cache.h> in common.h
This is needed for the patch "cache: add default setting for
CONFIG_SYS_CACHELINE_SIZE" from Anton Staaf. As cache.h defines
CONFIG_SYS_CACHELINE_SIZE for PPC targets.
This will remove the following warnings/errors:
include/common.h:819:2: warning: #warning CONFIG_SYS_CACHELINE_SIZE not defined, using __BIGGEST_ALIGNMENT__
cache.c:33: error: '__BIGGEST_ALIGNMENT__' undeclared (first use in this function)
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anton Staaf <robotboy@chromium.org> Cc: Wolfgang Denk <wd@denx.de>
Loïc Minier [Mon, 3 Oct 2011 09:57:12 +0000 (11:57 +0200)]
ublimage: NAND block size isn't set at build-time
mkimage's ublimage support can't depend of build-time board configs;
instead, this should be set in ublimage.cfg. Since currently no configs
in u-boot override the NAND block size, hardcode it as such in
ublimage.h to fix a build failure with "make tools":
gcc [...] -o ublimage.o ublimage.c -c
In file included from ublimage.c:37:0:
ublimage.h:31:20: fatal error: config.h: No such file or directory
Loïc Minier [Mon, 3 Oct 2011 09:57:10 +0000 (11:57 +0200)]
Build timestamp_autogenerated.h without config
Tools such as mkimage include version information but are
config-agnostic; build timestamp_autogenerated.h even when config.mk
isn't generated to fix "make tools" build failure:
gcc [...] -o mkimage.o mkimage.c -c
In file included from include/version.h:27:0, from mkimage.c:26:
include/timestamp.h:27:37: fatal error: timestamp_autogenerated.h: No
such file or directory
Cc: patches@linaro.org Signed-off-by: Loïc Minier <loic.minier@linaro.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 2 Oct 2011 10:01:27 +0000 (10:01 +0000)]
net: drop !NET_MULTI code
This is long over due. All but two net drivers have been converted, but
those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI
and code that is compiled when that is not defined. So here we scrub the
core code.
projects / karo-tx-uboot.git / log