7 years agotricorder: convert to generic board
Andreas Bießmann [Wed, 9 Jul 2014 15:10:34 +0000 (17:10 +0200)]
tricorder: convert to generic board

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Thomas Weber <thomas.weber@corscience.de>
7 years agoam335x_evm / gumstix pepper: Correct DDR settings
Tom Rini [Tue, 8 Jul 2014 01:40:16 +0000 (21:40 -0400)]
am335x_evm / gumstix pepper: Correct DDR settings

As noted by clang, we have been shifting certain values out of 32bit
range when setting some DDR registers.  Upon further inspection these
had been touching reserved fields (and having no impact).  These came in
from historical bring-up code and can be discarded.  Similarly, we had
been declaring some fields as 0 when they will be initialized that way.
Tested on Beaglebone White.

Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-By: Ash Charles <ashcharles@gmail.com>
7 years agok2hk_evm: add script to automate NAND flash process
Khoronzhuk, Ivan [Fri, 4 Jul 2014 12:03:27 +0000 (15:03 +0300)]
k2hk_evm: add script to automate NAND flash process

Add script to automate NAND flash process. As for now the board has
two burn scripts - burn to boot from SPI NOR flash and burn to boot
from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi.
Also update README to contain NAND burn U-boot process description.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
7 years agokeystone: add support for NAND gpheader image
Khoronzhuk, Ivan [Fri, 4 Jul 2014 12:03:26 +0000 (15:03 +0300)]
keystone: add support for NAND gpheader image

Add support for NAND gpheader image. TI Keystone2 ROM bootloader
expects 8 bytes of trailing zeroes in the nand u-boot image.
So add zeros at the end of the nand gph image.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
7 years agomtd: nand: davinci: add opportunity to write keystone U-boot image
Khoronzhuk, Ivan [Fri, 4 Jul 2014 12:03:25 +0000 (15:03 +0300)]
mtd: nand: davinci: add opportunity to write keystone U-boot image

The Keystone SoCs use the same NAND driver as Davinci.
This patch adds opportunity to write Keystone U-boot image to NAND
device using appropriate RBL ECC layout. This is needed only if RBL
boots U-boot from NAND device and that's supposed that raw u-boot
partition is used only for writing image.

The main problem is that default Davinci ECC layout is different from
Keystone RBL layout. To read U-boot image the RBL needs that image was
written using RBL ECC layout.

The BBT table is written using default Davinci layout and has to
be updated using one. The BBT can be updated only while erasing
chip or by forced bad block assigning, so erase function has to
use native ecc layout in order to be able to write BBT correctly.
So if we're writing to NAND U-boot address we use RBL layout for
others we use default ECC layout.

Also remove definition for CONFIG_CMD_NAND_ECCLAYOUT as there is no
reasons to use ECC layout commands. It was added by mistake.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
7 years agotps65218/am43xx_evm: Add power framework support to TPS65218
Tom Rini [Mon, 23 Jun 2014 20:06:29 +0000 (16:06 -0400)]
tps65218/am43xx_evm: Add power framework support to TPS65218

Add in an init function for the drivers/power framework so we can dump
and read the registers via i2c.

Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
7 years agopower/pmic.h: Add prototype for power_init_board.
Tom Rini [Mon, 23 Jun 2014 20:06:28 +0000 (16:06 -0400)]
power/pmic.h: Add prototype for power_init_board.

As this is a weak function that we may override, provide a prototype for

Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
7 years agoARM: dra7_evm: Add Ethernet support for dra72x platform
Mugunthan V N [Thu, 22 May 2014 09:07:12 +0000 (14:37 +0530)]
ARM: dra7_evm: Add Ethernet support for dra72x platform

Set the active_slave to 1 as slave 1 is pinned out in dra72x base board

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
7 years agoARM: DRA7xx: Add cpsw second port pinmux
Mugunthan V N [Thu, 22 May 2014 09:07:11 +0000 (14:37 +0530)]
ARM: DRA7xx: Add cpsw second port pinmux

Add cpsw second slave port pinmux to use it as primary ethernet port

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
7 years agodrivers: net: cpsw: add support for using second port as ethernet
Mugunthan V N [Thu, 22 May 2014 09:07:10 +0000 (14:37 +0530)]
drivers: net: cpsw: add support for using second port as ethernet

Add support for using the second slave port of cpsw
to be used as primary ethernet.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
7 years agosocfpga: Relocate arch common functions away from board
Chin Liang See [Tue, 10 Jun 2014 07:23:45 +0000 (02:23 -0500)]
socfpga: Relocate arch common functions away from board

To move the arch common function away from board folder to
arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication
for other non Altera dev kit which is using socfpga device.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Detlev Zundel <dzu@denx.de>
7 years agointegrator: switch to generic board
Linus Walleij [Mon, 23 Jun 2014 09:15:16 +0000 (11:15 +0200)]
integrator: switch to generic board

Turn on generic board for the integrators, as per the request in
the startup message. Everything just works, tested on the
Integrator/AP and Integrator/CP.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoARM: rpi_b: enable GENERIC_BOARD
Stephen Warren [Sat, 14 Jun 2014 05:37:49 +0000 (23:37 -0600)]
ARM: rpi_b: enable GENERIC_BOARD

Serial port, SD card, and LCD all work.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoarm, calimain: Add CONFIG_SYS_GENERIC_BOARD
Christian Riesch [Thu, 12 Jun 2014 06:11:53 +0000 (08:11 +0200)]

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
7 years agoarm: Fix armv8 compilation error
Shaibal.Dutta [Mon, 9 Jun 2014 20:25:52 +0000 (13:25 -0700)]
arm: Fix armv8 compilation error

Fix following compilation error when CONFIG_ARM64 is defined

Error: unknown or missing system register name at operand 2
-- `mrs x0,daifmsr daifset,#3'

Signed-off-by: Shaibal.Dutta <shaibal.dutta@broadcom.com>
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Darwin Rambo <drambo@broadcom.com>
7 years agoarm:board:h2200: Add CONFIG_SYS_GENERIC_BOARD
Łukasz Dałek [Thu, 12 Jun 2014 13:53:47 +0000 (15:53 +0200)]
arm:board:h2200: Add CONFIG_SYS_GENERIC_BOARD

Enable 'generic board init' for H2200 palmtop.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
7 years agoarm: spl: fix include guard
Jeroen Hofstee [Wed, 11 Jun 2014 20:01:48 +0000 (22:01 +0200)]
arm: spl: fix include guard

cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
7 years agoReformat boards.cfg
Albert ARIBAUD [Fri, 4 Jul 2014 22:36:57 +0000 (00:36 +0200)]
Reformat boards.cfg

Run tools/reformat.py -i -d '-' -s 8
to reorder boards as header comments suggest

7 years agosocfpga: Adding Scan Manager driver
Chin Liang See [Tue, 10 Jun 2014 06:17:42 +0000 (01:17 -0500)]
socfpga: Adding Scan Manager driver

Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
7 years agosocfpga: Adding DesignWare watchdog support
Chin Liang See [Tue, 10 Jun 2014 06:11:04 +0000 (01:11 -0500)]
socfpga: Adding DesignWare watchdog support

To enable the DesignWare watchdog support at SOCFPGA
Cyclone V dev kit.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
7 years agowatchdog/denali: Adding DesignWare watchdog driver support
Chin Liang See [Tue, 10 Jun 2014 06:10:21 +0000 (01:10 -0500)]
watchdog/denali: Adding DesignWare watchdog driver support

To add the DesignWare watchdog driver support. It required
information such as register base address and clock info from
configuration header file  within include/configs folder.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
7 years agoarm: ep9315: Return back Cirrus Logic EDB9315A board support
Sergey Kostanbaev [Wed, 25 Jun 2014 19:44:29 +0000 (23:44 +0400)]
arm: ep9315: Return back Cirrus Logic EDB9315A board support

This patch returns back support for old ep93xx processors family

Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com>
Cc: albert.u.boot@aribaud.net
7 years agogpio: spear_gpio: Fix gpio_set_value() implementation
Axel Lin [Sun, 25 May 2014 02:31:18 +0000 (10:31 +0800)]
gpio: spear_gpio: Fix gpio_set_value() implementation

In current gpio_set_value() implementation, it always sets the gpio control bit
no matter the value argument is 0 or 1. Thus the GPIOs never set to low.
This patch fixes this bug.

The address bus is used as a mask on read/write operations, so that independent
software drivers can set their GPIO bits without affecting any other pins in a
single write operation. Thus we don't need a read-modify-write to update the

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
7 years agoARM: cache_v7: use __weak
Jeroen Hofstee [Mon, 23 Jun 2014 20:07:04 +0000 (22:07 +0200)]
ARM: cache_v7: use __weak

This is not only more readable but also prevents a warning
about a missing prototype. The prototypes which are actually
missing are added.

cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: Tom Rini <trini@ti.com>
7 years agoARMv8/ls2085a_emu: Add LS2085A emulator and simulator board support
York Sun [Mon, 23 Jun 2014 22:15:56 +0000 (15:15 -0700)]
ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board support

LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
  Two DDR controllers
  UART2 is used as the console
  IFC timing is tightened for speedy booting
  Support DDR3 and DDR4 as separated targets
  Management Complex (MC) is enabled
  Support for GIC 500 (based on GICv3 arch)

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
7 years agoarmv8/fsl-lsch3: Add support to load and start MC Firmware
J. German Rivera [Mon, 23 Jun 2014 22:15:55 +0000 (15:15 -0700)]
armv8/fsl-lsch3: Add support to load and start MC Firmware

Adding support to load and start the Layerscape Management Complex (MC)
firmware. First, the MC GCR register is set to 0 to reset all cores. MC
firmware and DPL images are copied from their location in NOR flash to
DDR. MC registers are updated with the location of these images.
Deasserting the reset bit of MC GCR register releases core 0 to run.
Core 1 will be released by MC firmware. Stop bits are not touched for
this step. U-boot waits for MC until it boots up. In case of a failure,
device tree is updated accordingly. The MC firmware image uses FIT format.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
7 years agoARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC
York Sun [Mon, 23 Jun 2014 22:15:54 +0000 (15:15 -0700)]

Freescale LayerScape with Chassis Generation 3 is a set of SoCs with
ARMv8 cores and 3rd generation of Chassis. We use different MMU setup
to support memory map and cache attribute for these SoCs. MMU and cache
are enabled very early to bootst performance, especially for early
development on emulators. After u-boot relocates to DDR, a new MMU
table with QBMan cache access is created in DDR. SMMU pagesize is set
in SMMU_sACR register. Both DDR3 and DDR4 are supported.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
7 years agoARMv8: Adjust MMU setup
York Sun [Mon, 23 Jun 2014 22:15:53 +0000 (15:15 -0700)]
ARMv8: Adjust MMU setup

Make MMU function reusable. Platform code can setup its own MMU tables.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>
7 years agoAdded 64-bit MMIO accessors for ARMv8
J. German Rivera [Mon, 23 Jun 2014 22:15:52 +0000 (15:15 -0700)]
Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
7 years agoarm: Add support for semihosting for armv8 fastmodel targets.
Darwin Rambo [Mon, 9 Jun 2014 18:12:59 +0000 (11:12 -0700)]
arm: Add support for semihosting for armv8 fastmodel targets.

The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.

Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.

Please refer to doc/README.semihosting for a more detailed description
of semihosting and how it is used with the armv8 virtual platforms.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Cc: trini@ti.com
Cc: fenghua@phytium.com.cn
Cc: bhupesh.sharma@freescale.com
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Wed, 2 Jul 2014 20:38:02 +0000 (16:38 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

7 years agoPrepare v2014.07-rc4 v2014.07-rc4
Tom Rini [Wed, 2 Jul 2014 17:36:19 +0000 (13:36 -0400)]
Prepare v2014.07-rc4

Signed-off-by: Tom Rini <trini@ti.com>
7 years agousb: ci_udc: use var name ep/ci_ep consistently
Stephen Warren [Tue, 1 Jul 2014 20:22:27 +0000 (14:22 -0600)]
usb: ci_udc: use var name ep/ci_ep consistently

Almost all of ci_udc.c uses variable name "ep" for a struct usb_ep and
"ci_ep" for a struct ci_ep. This is nice and consistent, and helps people
know what type a variable is without searching for the declaration.
handle_ep_complete() doesn't do this, so fix it to be consistent.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agoUSB: gadget: atmel: zero out allocated requests
Stephen Warren [Tue, 1 Jul 2014 22:59:08 +0000 (16:59 -0600)]
USB: gadget: atmel: zero out allocated requests

A UDC's alloc_request method should zero out the newly allocated request.
Ensure the Atmel driver does so. This issue was found by code inspection,
following the investigation of an intermittent issue with ci_udc, which
was tracked down to failing to zero out allocated requests following some
of my changes. All other UDC drivers already zero out requests in one
way or another.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agousb: ci_udc: don't memalign() struct ci_req allocations
Stephen Warren [Tue, 1 Jul 2014 17:41:18 +0000 (11:41 -0600)]
usb: ci_udc: don't memalign() struct ci_req allocations

struct ci_req is a purely software structure, and needs no specific
memory alignment. Hence, allocate it with calloc() rather than
memalign(). The use of memalign() was left-over from when struct ci_req
was going to hold the aligned bounce buffer, but this is now dynamically

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agousb: ci_udc: remove controller.items array
Stephen Warren [Tue, 1 Jul 2014 17:41:17 +0000 (11:41 -0600)]
usb: ci_udc: remove controller.items array

There's no need to store an array of QTD pointers in the controller.
Since the calculation is so simple, just have ci_get_qtd() perform it
at run-time, rather than pre-calculating everything.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agousb: ci_udc: fix items array size/stride calculation
Stephen Warren [Tue, 1 Jul 2014 17:41:16 +0000 (11:41 -0600)]
usb: ci_udc: fix items array size/stride calculation

2 QTDs are allocated for each EP. The current allocation scheme aligns
the first QTD in each pair, but simply adds the struct size to calculate
the second QTD's address. This will result in a non-cache-aligned
addresss IF the system's ARCH_DMA_MINALIGN is not 32 bytes (i.e. the
size of struct ept_queue_item).

Similarly, the original ilist_ent_sz calculation aligned the value to
ARCH_DMA_MINALIGN but didn't take the USB HW's 32-byte alignment
requirement into account. This doesn't cause a practical issue unless
ARCH_DMA_MINALIGN < 32 (which I suspect is quite unlikely), but we may
as well fix the code to be explicit, so it's obviously completely

The new value of ILIST_ENT_SZ takes all alignment requirements into
account, so we can simplify ci_{flush,invalidate}_qtd() by simply using
that macro rather than calling roundup().

Similarly, the calculation of controller.items[i] can be simplified,
since each QTD is evenly spaced at its individual alignment requirement,
rather than each pair being aligned, and entries within the pair being
spaced apart only by structure size.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agousb: ci_udc: lift ilist size calculations to global scope
Stephen Warren [Tue, 1 Jul 2014 17:41:15 +0000 (11:41 -0600)]
usb: ci_udc: lift ilist size calculations to global scope

This will allow functions other than ci_udc_probe() to make use of the
constants in a future change.

This in turn requires converting the const int variables to #defines,
since the initialization of one global const int can't depend on the
value of another const int; the compiler thinks it's non-constant if
that dependency exists.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agousb: ci_udc: don't assume QTDs are adjacent when transmitting ZLPs
Stephen Warren [Tue, 1 Jul 2014 17:41:14 +0000 (11:41 -0600)]
usb: ci_udc: don't assume QTDs are adjacent when transmitting ZLPs

Fix ci_ep_submit_next_request()'s ZLP transmission code to explicitly
call ci_get_qtd() to find the address of the other QTD to use. This
will allow us to correctly align each QTD individually in the future,
which may involve leaving a gap between the QTDs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agousb: ci_udc: fix ci_flush_{qh,qtd} calls in ci_udc_probe()
Stephen Warren [Tue, 1 Jul 2014 17:41:13 +0000 (11:41 -0600)]
usb: ci_udc: fix ci_flush_{qh,qtd} calls in ci_udc_probe()

ci_udc_probe() initializes a pair of QHs and QTDs for each EP. After
each pair has been initialized, the pair is cache-flushed. The
conversion from QH/QTD index [0..2*NUM_END_POINTS) to EP index
[0..NUM_ENDPOINTS] is incorrect; it simply subtracts 1 (which yields
the QH/QTD index of the first entry in the pair) rather than dividing
by two (which scales the range). Fix this.

On my system, this avoids cache debug prints due to requests to flush
unaligned ranges. This is caused because the flush calls happen before
the items[] array entries are initialized for all but EP0.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agoMerge remote-tracking branch 'u-boot-samsung/master'
Albert ARIBAUD [Tue, 1 Jul 2014 18:52:51 +0000 (20:52 +0200)]
Merge remote-tracking branch 'u-boot-samsung/master'


Conflict was trivial between goni maintainer change and
lager_nor removal.

7 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 1 Jul 2014 13:48:25 +0000 (15:48 +0200)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

7 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 1 Jul 2014 13:11:18 +0000 (15:11 +0200)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

7 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 30 Jun 2014 21:00:34 +0000 (23:00 +0200)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

7 years agoMerge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 30 Jun 2014 20:19:03 +0000 (22:19 +0200)]
Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'

7 years agoSamsung: Goni: change maintainer to Robert Baldyga
Przemyslaw Marczak [Fri, 27 Jun 2014 10:32:06 +0000 (12:32 +0200)]
Samsung: Goni: change maintainer to Robert Baldyga

Robert Baldyga will now take care of this board.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agomx25pdk: Remove CONFIG_SYS_GENERIC_BOARD
Fabio Estevam [Wed, 25 Jun 2014 17:45:35 +0000 (14:45 -0300)]

With CONFIG_SYS_GENERIC_BOARD the board hangs after issuing a 'save' command.

Remove CONFIG_SYS_GENERIC_BOARD until this issue can be fixed properly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
7 years agodfu: free entities when parsing fails
Stephen Warren [Tue, 10 Jun 2014 16:06:41 +0000 (10:06 -0600)]
dfu: free entities when parsing fails

When dfu_init_env_entities() fails part-way through, some entities may
have been added to dfu_list. These are only removed by dfu_free_entities().
If that function isn't called, those stale entities will still exist the
next time dfu_init_env_entities() is called, leading to confusion. Fix
do_dfu() to ensure that dfu_free_entities() is always called, to avoid
this confusion.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
7 years agousb: eth: smsc95xx: add LAN9500A device ID
Ilya Ledvich [Wed, 12 Mar 2014 08:36:31 +0000 (10:36 +0200)]
usb: eth: smsc95xx: add LAN9500A device ID

Add LAN9500A product ID (0x9e00) in order to support LAN9500A based dongles.
Tested on cm_t335.

Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
7 years agousb: fastboot: fix potential buffer overflow
Jeroen Hofstee [Fri, 13 Jun 2014 22:57:14 +0000 (00:57 +0200)]
usb: fastboot: fix potential buffer overflow

cb_getvar tries to prevent overflowing the response buffer
by using strncat. But strncat takes the number of data bytes
copied as a limit not the total buffer length so it can still
overflow. Pass the correct value instead.

cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
cc: Rob Herring <robh@kernel.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
7 years agousb: xhci: (likely) fix bracket in if condition
Jeroen Hofstee [Wed, 11 Jun 2014 22:31:27 +0000 (00:31 +0200)]
usb: xhci: (likely) fix bracket in if condition

Because of the brackets the & and && is evaluated before
the comparison. This is likely not the intention. Change
it to test the first and second condition to both be true.

cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
7 years agousb:g_dnl:f_thor: remove memset before memcpy
Jeroen Hofstee [Mon, 9 Jun 2014 13:28:58 +0000 (15:28 +0200)]
usb:g_dnl:f_thor: remove memset before memcpy

since ALLOC_CACHE_ALIGN_BUFFER defines a pointer and not a
buffer, the memset with sizeof(rqt) likely does something else
then intended. Since there is a memcpy directly after it with
the full size, drop the memset completely.

Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
7 years agousb:composite: clear the whole common buffer
Jeroen Hofstee [Mon, 9 Jun 2014 13:28:59 +0000 (15:28 +0200)]
usb:composite: clear the whole common buffer

Since the struct fsg_common is calloced, reset it completely
with zero's when reused. While at it, make checkpatch happy.

cc: Lukasz Majewski <l.majewski@samsung.com>
cc: Piotr Wilczek <p.wilczek@samsung.com>
cc: Kyungmin Park <kyungmin.park@samsung.com>
cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
7 years agousb: r8a66597: Fix initilization size of r8a66597 info structure
Yasuhisa Umano [Fri, 18 Apr 2014 02:33:15 +0000 (11:33 +0900)]
usb: r8a66597: Fix initilization size of r8a66597 info structure

Initialization of r8a66597 info structure is not enough.
Because initilization was used size of pointer.
This fixes that use size of r8a6659 info structure.

Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
7 years agousb: r8a66597: Fix initialization hub that using R8A66597_MAX_ROOT_HUB
yasuhisa umano [Fri, 18 Apr 2014 02:33:08 +0000 (11:33 +0900)]
usb: r8a66597: Fix initialization hub that using R8A66597_MAX_ROOT_HUB

This driver is processed as two USB hub despite one.
The number of root hub is defined in R8A66597_MAX_ROOT_HUB.
This fixes that register is accessed by using the definition
of R8A66597_MAX_ROOT_HUB.

Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
7 years agousb: cosmetic: double const
Jeroen Hofstee [Tue, 17 Jun 2014 19:14:17 +0000 (21:14 +0200)]
usb: cosmetic: double const

For plain array const can be either before or after
the type definition. Adding both is simply redundand.
Remove the later one.

cc: marex@denx.de
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
7 years agousb: ci_udc: fix typo in debug message
Stephen Warren [Wed, 25 Jun 2014 17:03:18 +0000 (11:03 -0600)]
usb: ci_udc: fix typo in debug message


Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agousb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
Stephen Warren [Mon, 23 Jun 2014 18:02:48 +0000 (12:02 -0600)]
usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC

ci_udc.c's usb_gadget_unregister_driver() doesn't call driver->unbind()
unlike other USB gadget drivers. Fix it to do this.

Without this, when ether.c's CDC Ethernet device is torn down,
eth_unbind() is never called, so dev->gadget is never set to NULL.
For some reason, usb_eth_halt() is called both at the end of the first
use of the Ethernet device, and prior to any subsequent use. Since
dev->gadget is never cleared, all calls to usb_eth_halt() attempt to
stop, disconnect, and clean up the device, resulting in double cleanup,
which hangs U-Boot on my Tegra device at least.

ci_udc allocates its own singleton EP0 request object, and cleans it up
during usb_gadget_unregister_driver(). This appears necessary when using
the USB gadget framework in U-Boot, since that does not allocate/free
the EP0 request. However, the CDC Ethernet driver *does* allocate and
free its own EP0 requests. Consequently, we must protect
ci_ep_free_request() against double-freeing the request.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
7 years agovf610: fix build due to missing sys_proto.h
Stefano Babic [Wed, 25 Jun 2014 10:48:06 +0000 (12:48 +0200)]
vf610: fix build due to missing sys_proto.h

commit 67a04ab3ab8522a3a34491853e46105317580df5
fix the build for MX25. The same error
happens for VF610 SOC.

Signed-off-by: Stefano Babic <sbabic@denx.de>
7 years agoMerge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 25 Jun 2014 08:40:23 +0000 (10:40 +0200)]
Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'

7 years agoMerge branch 'u-boot/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 25 Jun 2014 08:39:58 +0000 (10:39 +0200)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'

7 years agoMerge branch 'sandbox' of git://git.denx.de/u-boot-x86
Tom Rini [Tue, 24 Jun 2014 18:06:22 +0000 (14:06 -0400)]
Merge branch 'sandbox' of git://git.denx.de/u-boot-x86

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-dm
Tom Rini [Tue, 24 Jun 2014 18:04:33 +0000 (14:04 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-dm

7 years agoMerge branch 'u-boot-atmel/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 24 Jun 2014 17:54:20 +0000 (19:54 +0200)]
Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'

7 years agosandbox: change local_irq_save() to macro
Masahiro Yamada [Thu, 12 Jun 2014 03:26:15 +0000 (12:26 +0900)]
sandbox: change local_irq_save() to macro

local_irq_save() should be a macro, not a function
because local_irq_save() saves flag to the given argument.

GCC is silent about this issue, but Clang warns:

In file included from lib/asm-offsets.c:15:
In file included from include/common.h:20:
In file included from include/linux/bitops.h:110:
 warning: variable 'flags' is uninitialized when used here

That change causes another warning:

In file included from include/linux/bitops.h:110:0,
                 from include/common.h:20,
                 from lib/asm-offsets.c:15:
arch/sandbox/include/asm/bitops.h: In function ‘test_and_set_bit’:
arch/sandbox/include/asm/bitops.h:56:16: warning: unused variable ‘flags’ [-Wunused-variable]

So, flags should be set to __always_unused.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
7 years agosandbox: terminate os_dirent_ls() result list
Stephen Warren [Wed, 11 Jun 2014 16:26:23 +0000 (10:26 -0600)]
sandbox: terminate os_dirent_ls() result list

Each node in the linked-list that os_dirent_ls() returns has its next
pointer set only when the next node is created. For the last node in the
list, there is no next node, so this never happens, and the next pointer
is never initialized. Explicitly initialize the next pointer so that it
isn't dangling. Without this, "sb ls" might crash.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agosandbox: restore ability to access host fs through standard commands
Stephen Warren [Thu, 12 Jun 2014 16:28:32 +0000 (10:28 -0600)]
sandbox: restore ability to access host fs through standard commands

Commit 95fac6ab4589 "sandbox: Use os functions to read host device tree"
removed the ability for get_device_and_partition() to handle the "host"
device type, and redirect accesses to it to the host filesystem. This
broke some unit tests that use this feature. So, revert that change. The
code added back by this patch is slightly different to pacify checkpatch.

However, we're then left with "host" being both:
- A pseudo device that accesses the hosts real filesystem.
- An emulated block device, which accesses "sectors" inside a file stored
  on the host.

In order to resolve this discrepancy, rename the pseudo device from host
to hostfs, and adjust the unit-tests for this change.

The "help sb" output is modified to reflect this rename, and state where
the host and hostfs devices should be used.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
7 years agox86: Enable 32-bit build using x86_64 multilib toolchain
Vasili Galka [Tue, 10 Jun 2014 13:14:56 +0000 (16:14 +0300)]
x86: Enable 32-bit build using x86_64 multilib toolchain

Until now building the x86 arch boards required 32-bit toolchain. As
many x86_64 toolchains come with 32-bit support (multilib) that's a
good idea to enable build with such toolchains.

The change required was to specify the usage of 32-bit explicitly to
the compiler and the linker (-m32 and -m elf_i386 flags) and locate
the right libgcc path.

Signed-off-by: Vasili Galka <vvv444@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agompc8313: add CONFIG_SYS_GENERIC_BOARD to ids8313 board
Heiko Schocher [Sun, 22 Jun 2014 04:33:30 +0000 (06:33 +0200)]
mpc8313: add CONFIG_SYS_GENERIC_BOARD to ids8313 board

- remove CONFIG_OF_CONTROL to boot again

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agolib, fdt: move fdtdec_get_int() out of lib/fdtdec.c
Heiko Schocher [Sun, 22 Jun 2014 04:33:29 +0000 (06:33 +0200)]
lib, fdt: move fdtdec_get_int() out of lib/fdtdec.c

move fdtdec_get_int() out of lib/fdtdec.c into lib/fdtdec_common.c
as this function is also used, if CONFIG_OF_CONTROL is not
used. Poped up on the ids8313 board using signed FIT images,
and activating CONFIG_SYS_GENERIC_BOARD. Without this patch
it shows on boot:

No valid FDT found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>

With this patch, it boots again with CONFIG_SYS_GENERIC_BOARD

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
7 years agoPMIC: MAX77686: fix invalid bus check
Jeroen Hofstee [Wed, 18 Jun 2014 20:13:52 +0000 (22:13 +0200)]
PMIC: MAX77686: fix invalid bus check

Since p->bus is unsigned checking for negative values
is optimized away. Since bus is already used as an argument
use tmp. While at it, don't declare variables in the middle
of a function.

cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoExynos: Split 5250 and 5420 memory bank configuration
Michael Pratt [Wed, 18 Jun 2014 12:24:02 +0000 (17:54 +0530)]
Exynos: Split 5250 and 5420 memory bank configuration

Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make the determination between 4
and 7 banks at runtime.

Include the bank size with the number of banks for context to make the
number of banks meaningful.

Signed-off-by: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoExynos5: Config: Enable USB boot mode for all Exynos5 SoCs
Akshay Saraswat [Wed, 18 Jun 2014 12:24:01 +0000 (17:54 +0530)]
Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs

Right now USB booting is enabled for Exynos5250 only. Moving all the
configs for USB boot mode from exynos5250-dt.h to exynos5-dt.h in order
to enableUSB booting for all Exynos5 SoCs.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoExynos5: Config: Increase SPL footprint for Exynos5420
Akshay Saraswat [Wed, 18 Jun 2014 12:24:00 +0000 (17:54 +0530)]
Exynos5: Config: Increase SPL footprint for Exynos5420

Max footprint for SPL in both Exynos 5250 and 5420 is limited to 14 KB.
For Exynos5250 we need to keep it 14 KB because BL1 supports only fixed
size SPL downloading. But in case of Exynos5420 we need not restrict it
to 14 KB. And also, the SPL size for Exynos5420 is expected to increase
with the upcoming patches and the patches under review right now.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoExynos5: Config: Place environment at the end of SPI flash
Akshay Saraswat [Wed, 18 Jun 2014 12:23:59 +0000 (17:53 +0530)]
Exynos5: Config: Place environment at the end of SPI flash

Currently environment resides at the location where BL2 ends.
This may hold good in case there is an empty space at this
position. But what if this place already has a binary or is
expected to have one. To avoid such scenarios it is better
to save environment at the end of the flash.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoExynos5420: Introduce support for the Peach-Pit board
Akshay Saraswat [Wed, 18 Jun 2014 12:23:58 +0000 (17:53 +0530)]
Exynos5420: Introduce support for the Peach-Pit board

While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit
line of devices, there could be other boards using the same chip, so a
common configuration file is being added (exynos5420.h) as well
as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi).

The peach board as declared in boards.cfg is a copy of smdk5420
declaration. The configuration files are similar, but define different
default device trees, console serial ports and prompts.

The device tree files for smdk5420 and peach-pit inherit from the same
common file.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoExynos5420: Let macros be used for exynos5420
Akshay Saraswat [Wed, 18 Jun 2014 12:23:57 +0000 (17:53 +0530)]
Exynos5420: Let macros be used for exynos5420

Macros defined in exynos5_setup.h specific to SMDK5420
are required for Peach-Pit too. Hence, replacing
CONFIG_SMDK5420 with CONFIG_EXYNOS5420 to enable these
macros for all the boards based on Exynos5420.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoExynos: SPI: Fix reading data from SPI flash
Akshay Saraswat [Wed, 18 Jun 2014 12:22:41 +0000 (17:52 +0530)]
Exynos: SPI: Fix reading data from SPI flash

SPI recieve and transfer code in exynos_spi driver has a logical bug.
We read data in a variable which can hold an integer. Then we assign
this integer 32 bit value to another variable which has data type uchar.
Latter represents a unit of our recieve buffer. Everytime when we write
a value to our recieve buffer we step ahead by 4 units when actually we
wrote to one unit. This results in the loss of 3 bytes out of every 4
bytes recieved. This patch intends to fix this bug.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agodm: Use '*' to indicate a device is activated
Simon Glass [Sat, 24 May 2014 21:21:07 +0000 (15:21 -0600)]
dm: Use '*' to indicate a device is activated

Make both dm enumeration commands support showing whether a driver is active
or not, and use a consistent indicator (an asterisk).

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
7 years agoinclude/dm.h: fix inclusion guard
Jeroen Hofstee [Tue, 10 Jun 2014 21:52:36 +0000 (23:52 +0200)]
include/dm.h: fix inclusion guard

cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-dm
Tom Rini [Sat, 21 Jun 2014 00:03:51 +0000 (20:03 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-dm

7 years agodm: Expand and improve the device lifecycle docs
Simon Glass [Thu, 12 Jun 2014 05:29:55 +0000 (23:29 -0600)]
dm: Expand and improve the device lifecycle docs

The lifecycle of a device is an important part of driver model. Add to the
existing documentation and clarify it.

Reported-by: Jon Loeliger <jdl@jdl.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Tidy up four minor code nits
Simon Glass [Thu, 12 Jun 2014 05:29:54 +0000 (23:29 -0600)]
dm: Tidy up four minor code nits

There is a spelling mistake and two functions are missing comments
altogether. Also the flags declaration is correct, but doesn't follow
style. Finally, the uclass_get_device() function has some errors in
its documentation.

Fix these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
7 years agotegra: Enable driver model
Simon Glass [Thu, 12 Jun 2014 05:29:53 +0000 (23:29 -0600)]
tegra: Enable driver model

Enable driver model for Tegra boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agotegra: dts: Bring in GPIO bindings from linux
Simon Glass [Thu, 12 Jun 2014 05:29:52 +0000 (23:29 -0600)]
tegra: dts: Bring in GPIO bindings from linux

These files are taken from Linux 3.14.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agodm: Fix printf() strings in the 'dm' command
Simon Glass [Thu, 12 Jun 2014 05:29:51 +0000 (23:29 -0600)]
dm: Fix printf() strings in the 'dm' command

The values here are int, but the map_to_sysmem() call can return a long.
Add a cast to deal with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Allow driver model tests only for sandbox
Simon Glass [Thu, 12 Jun 2014 05:29:50 +0000 (23:29 -0600)]
dm: Allow driver model tests only for sandbox

The GPIO tests require the sandbox GPIO driver, so cannot be run on other
platforms. Similarly for the 'dm test' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Cast away the const-ness of the global_data pointer
Simon Glass [Thu, 12 Jun 2014 05:29:49 +0000 (23:29 -0600)]
dm: Cast away the const-ness of the global_data pointer

In a very few cases we need to adjust the driver model root device, such as
when setting it up at initialisation. Add a macro to make this easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Add missing header files in lists and root
Simon Glass [Thu, 12 Jun 2014 05:29:48 +0000 (23:29 -0600)]
dm: Add missing header files in lists and root

These files don't compile in some architectures. Fix it by adding the
missing headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Use case-insensitive comparison for GPIO banks
Simon Glass [Thu, 12 Jun 2014 05:29:47 +0000 (23:29 -0600)]
dm: Use case-insensitive comparison for GPIO banks

We want 'N0' and 'n0' to mean the same thing, so ensure that case is not
considered when naming GPIO banks.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Update README to encourage conversion to driver model
Simon Glass [Thu, 12 Jun 2014 05:29:46 +0000 (23:29 -0600)]
dm: Update README to encourage conversion to driver model

Add a note to encourage people to convert drivers to use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Rename struct device_id to udevice_id
Simon Glass [Thu, 12 Jun 2014 05:29:45 +0000 (23:29 -0600)]
dm: Rename struct device_id to udevice_id

It is best to avoid having any occurence of 'struct device' in driver
model, so rename to achieve this.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoMakefile: Support include files for .dts files
Simon Glass [Thu, 12 Jun 2014 05:29:44 +0000 (23:29 -0600)]
Makefile: Support include files for .dts files

Linux supports this, and if we are to have compatible device tree files,
U-Boot should also.

Avoid giving the device tree files access to U-Boot's include/ directory.
Only include/dt-bindings is accessible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agosandbox: Support iotrace feature
Simon Glass [Thu, 12 Jun 2014 05:29:43 +0000 (23:29 -0600)]
sandbox: Support iotrace feature

Support the iotrace feature for sandbox, and enable it, using some dummy
I/O access methods.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoarm: Support iotrace feature
Simon Glass [Thu, 12 Jun 2014 05:29:42 +0000 (23:29 -0600)]
arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoAdd an I/O tracing feature
Simon Glass [Thu, 12 Jun 2014 05:29:41 +0000 (23:29 -0600)]
Add an I/O tracing feature

When debugging drivers it is useful to see what I/O accesses were done
and in what order.

Even if the individual accesses are of little interest it can be useful to
verify that the access pattern is consistent each time an operation is
performed. In this case a checksum can be used to characterise the operation
of a driver. The checksum can be compared across different runs of the
operation to verify that the driver is working properly.

In particular, when performing major refactoring of the driver, where the
access pattern should not change, the checksum provides assurance that the
refactoring work has not broken the driver.

Add an I/O tracing feature and associated commands to provide this facility.
It works by sneaking into the io.h heder for an architecture and redirecting
I/O accesses through its tracing mechanism.

For now no commands are provided to examine the trace buffer. The format is
fairly simple, so 'md' is a reasonable substitute.

Note: The checksum feature is only useful for I/O regions where the contents
do not change outside of software control. Where this is not suitable you can
fall back to manually comparing the addresses. It might be useful to enhance
tracing to only checksum the accesses and not the data read/written.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocosmetic: kbuild: clean-up coding style (sync with Linux 3.16-rc1)
Masahiro Yamada [Mon, 16 Jun 2014 09:56:38 +0000 (18:56 +0900)]
cosmetic: kbuild: clean-up coding style (sync with Linux 3.16-rc1)

Import the following trivial commits from Linux v3.16-rc1:

 bb66fc6 kbuild: trivial - use tabs for code indent where possible
 7eb6e34 kbuild: trivial - remove trailing empty lines
 3fbb43d kbuild: trivial - fix comment block indent
 38385f8 kbuild: trivial - remove trailing spaces

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agoomap3: overo: Select fdtfile for expansion board
Ash Charles [Tue, 10 Jun 2014 19:02:36 +0000 (12:02 -0700)]
omap3: overo: Select fdtfile for expansion board

The u-boot Overo board actually supports both Overo (OMAP35xx)
and Overo Storm (AM/DM37xx) COMs with a range of different expansion
boards.  This provides a mechanism to select the an appropriate device
tree file based on the processor version and, if available, the
expansion board ID written on the expansion board EEPROM. To match the
3.15+ kernels, fdtfile names have this format:
 "omap3-overo[-storm]-<expansion board name>.dtb"

By default, we use "omap3-overo-storm-tobi.dtb".

Signed-off-by: Ash Charles <ashcharles@gmail.com>

7 years agospi: davinci: Fix register address for SPI1_BUS
Axel Lin [Wed, 18 Jun 2014 01:09:34 +0000 (09:09 +0800)]
spi: davinci: Fix register address for SPI1_BUS

Fix a trivial copy-paste bug.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
7 years agoOMAP: disable gpmc timeout safely for reenabling
Stefano Babic [Tue, 17 Jun 2014 14:47:40 +0000 (16:47 +0200)]
OMAP: disable gpmc timeout safely for reenabling

gpmc timeout is disabled and the reset counter
is set to 0. However, if later a driver activates
the timeout setting the reset to a valid value,
the old reset value with zero is still valid
for the first access. In fact, the timeout block
loads the reset counter after a successful access.

Found on a am335x board with a FPGA connected
to the GPMC bus together with the NAND.
When the FPGA driver in kernel activates
the timeout, the system hangs at the first access
by the NAND driver.

Signed-off-by: Stefano Babic <sbabic@denx.de>