karo-tx-uboot.git
8 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 18 Dec 2013 20:45:34 +0000 (21:45 +0100)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

8 years agoarm: tegra: Fix the CPU complex reset masks
Alban Bedel [Wed, 20 Nov 2013 16:42:46 +0000 (17:42 +0100)]
arm: tegra: Fix the CPU complex reset masks

The CPU complex reset masks are not matching with the datasheet for
the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20
and T30 the register consist of groups of 4 bits, with one bit for
each CPU core. On T20 the 2 high bits of each group are always stubbed
as there is only 2 cores.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swrren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: Add the Tamonten™ NG Evaluation Carrier board
Alban Bedel [Thu, 14 Nov 2013 09:58:30 +0000 (10:58 +0100)]
ARM: tegra: Add the Tamonten™ NG Evaluation Carrier board

Add support for the new Tamonten™ NG platform from Avionic Design.
Currently only I2C, MMC, USB and ethernet have been tested.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoi2c: tegra: Add the fifth bus on SoC with more than 4 buses
Alban Bedel [Wed, 13 Nov 2013 16:27:19 +0000 (17:27 +0100)]
i2c: tegra: Add the fifth bus on SoC with more than 4 buses

Create the i2c adapter object for the fifth bus on SoC with more than
4 buses. This allow using all the bus available on T30.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: support SKU b1 of Tegra30
Alban Bedel [Wed, 13 Nov 2013 16:27:18 +0000 (17:27 +0100)]
ARM: tegra: support SKU b1 of Tegra30

Add the Tegra30 SKU b1 and treat it like other Tegra30 chips.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: Julian Scheel <julian.scheel@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"
Jim Lin [Wed, 6 Nov 2013 06:03:44 +0000 (14:03 +0800)]
ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"

Fix the timeout issue after running "bootp" command in u-boot
console. For example you see "EHCI timed out on TD- token=0x...".
TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10
after a controller reset and before RUN bit is set
(per technical reference manual).

Signed-off-by: Jim Lin <jilin@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agotegra: allow build to succeed with SPL disabled
Vidya Sagar [Thu, 31 Oct 2013 09:21:38 +0000 (14:51 +0530)]
tegra: allow build to succeed with SPL disabled

u-boot-dtb-tegra.bin and u-boot-nodtb-tegra.bin binaries
are generated only if the SPL build is enabled as they have
dependency on SPL build

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoChange maintainer for Avionic Design boards
Thierry Reding [Mon, 23 Sep 2013 09:52:41 +0000 (11:52 +0200)]
Change maintainer for Avionic Design boards

I no longer work for Avionic Design and don't have access to hardware,
so I'll pass on maintainership to Alban.

Acked-by: Alban Bedel <alban.bedel@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoTegra114: Do not program CPCON field for PLLX
Thierry Reding [Tue, 1 Oct 2013 15:04:45 +0000 (17:04 +0200)]
Tegra114: Do not program CPCON field for PLLX

PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoTegra114: Fix PLLX M, N, P init settings
Jimmy Zhang [Mon, 23 Sep 2013 20:07:49 +0000 (22:07 +0200)]
Tegra114: Fix PLLX M, N, P init settings

The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoMerge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 18 Dec 2013 16:51:28 +0000 (17:51 +0100)]
Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'

8 years agoarm: koelsch: Add support reset function
Nobuhiro Iwamatsu [Thu, 10 Oct 2013 01:48:20 +0000 (10:48 +0900)]
arm: koelsch: Add support reset function

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: koelsch: Add support I2C
Nobuhiro Iwamatsu [Wed, 11 Sep 2013 06:04:33 +0000 (15:04 +0900)]
arm: koelsch: Add support I2C

This supports sh_i2c on koelsch board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: koelsch: Add support Ethernet
Nobuhiro Iwamatsu [Sun, 20 Oct 2013 11:37:17 +0000 (20:37 +0900)]
arm: koelsch: Add support Ethernet

The koelsch board has one sh-ether device.
This supports sh-ether.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
8 years agoarm: lager: Add support reset function
Nobuhiro Iwamatsu [Thu, 10 Oct 2013 00:13:41 +0000 (09:13 +0900)]
arm: lager: Add support reset function

The lager board uses I2C for reset.

ned-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

8 years agoarm: lager: Add support I2C
Nobuhiro Iwamatsu [Mon, 30 Sep 2013 01:08:40 +0000 (10:08 +0900)]
arm: lager: Add support I2C

The lager board has I2C for rcar.
This supports I2C for rcar on lager board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: lager: Add support Ethernet
Nobuhiro Iwamatsu [Sun, 20 Oct 2013 11:28:24 +0000 (20:28 +0900)]
arm: lager: Add support Ethernet

The lager board has one sh-ether device.
This supports sh-ether.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8 years agoarm: rmobile: Update README.rmobile
Nobuhiro Iwamatsu [Tue, 10 Dec 2013 05:52:20 +0000 (14:52 +0900)]
arm: rmobile: Update README.rmobile

Add infomation of Lager and Koelsh board, and R-Car.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
8 years agoarm: atmel: at91sam9x5: move CONFIG_SYS_NO_FLASH to proper position
Bo Shen [Tue, 10 Dec 2013 08:14:02 +0000 (16:14 +0800)]
arm: atmel: at91sam9x5: move CONFIG_SYS_NO_FLASH to proper position

In config_cmd_default.h, it will use CONFIG_SYS_NO_FLASH to decide
whether include CONFIG_CMD_FLASH and CONFIG_CMD_IMLS. So, move the
CONFIG_SYS_NO_FLASH to proper position, then we don't need to undef
these two commands.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: atmel: at91sam9x5: cleanup unneeded undef
Bo Shen [Tue, 10 Dec 2013 08:14:01 +0000 (16:14 +0800)]
arm: atmel: at91sam9x5: cleanup unneeded undef

remove unneeded #undef for at91sam9x5ek board.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: atmel: at91sam9x5: cleanup cs configure for spi
Bo Shen [Tue, 17 Dec 2013 09:34:43 +0000 (17:34 +0800)]
arm: atmel: at91sam9x5: cleanup cs configure for spi

As the cs for spi is worked in gpio mode, so no need to configure
it as peripheral and then configure to gpio. Configure it to gpio
directly.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoARM: OMAP5: clocks: Update MPU settings for OPP_NOM
Lokesh Vutla [Thu, 12 Dec 2013 10:06:21 +0000 (15:36 +0530)]
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM

As per the latest 0.6 version of DM for OMAP5430 ES2.0,
MPU_GCLK is given as 1000MHz. In order to achieve this DPLL_MPU
should be locked at 2000MHz. Fixing the same and cleaning the
previously used dpll values.

Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: DRA7xx: Change clk divider setting
Lokesh Vutla [Thu, 12 Dec 2013 10:04:56 +0000 (15:34 +0530)]
ARM: DRA7xx: Change clk divider setting

Commit "armv7: hw_data: change clock divider setting"
updates the setting for m6 divider for 20MHz sys_clk frequency.
But missed to update for other sys_clk frequencies. Doing the same.

Reported-by: Rajendran, Vinothkumar <vinothr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoarm: omap: cm_t35: update config file
Nikita Kiryanov [Wed, 11 Dec 2013 16:04:40 +0000 (18:04 +0200)]
arm: omap: cm_t35: update config file

This patch makes the following updates to the cm_t35 config file:
- Replace "ttyS" in default environment kernel bootargs with the new "ttyO"
  notation.
- Remove "omapfb.debug=y" from default environment kernel bootargs.
- Define a minimal power-on delay for USB hub ports so that slow-to-power-on USB
  sticks will have enough time to become responsive.
- Add support for bootz command
- ulpi_reset is not necessary and always fails with the following error message:
  "ULPI: ulpi_reset: failed writing reset bit"
  So, remove it.

Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stefan Roese <sr@denx.de>
8 years agoam3517_evm: activate Ethernet PHY
Yegor Yefremov [Wed, 11 Dec 2013 14:41:11 +0000 (15:41 +0100)]
am3517_evm: activate Ethernet PHY

Pin 30 is connected to PHY's RESET# signal, so it must be
put to high. Otherwise PHY won't be found via MDIO interface.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
8 years agoam335x, siemens boards: adapt default environment setting
Heiko Schocher [Tue, 10 Dec 2013 10:56:53 +0000 (11:56 +0100)]
am335x, siemens boards: adapt default environment setting

commit 16297cfb2a20c9d89834cd9e31edac5184a777a1
Author: Mateusz Zalega <m.zalega@samsung.com>
Date:   Fri Oct 4 19:22:26 2013 +0200

    usb: new board-specific USB init interface

introduced a new parameter to the dfu command. Adapt the default environment
for the siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Mateusz Zalega <m.zalega@samsung.com>
8 years agoarm: omap: abb: add missing include
Nikita Kiryanov [Sun, 8 Dec 2013 12:29:19 +0000 (14:29 +0200)]
arm: omap: abb: add missing include

ABB code uses LDELAY but does not include the header that provides its
definition.

Include the header.

Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Nishanth Menon <nm@ti.com>
8 years agoarm: am437: Fix offset for USB registers
Dan Murphy [Thu, 5 Dec 2013 13:19:17 +0000 (07:19 -0600)]
arm: am437: Fix offset for USB registers

Fix the offset for the USB clock registers

Signed-off-by: Dan Murphy <dmurphy@ti.com>
8 years agoam335x_evm: Consolidate DFU environment parts into the DFU part of the file
Tom Rini [Wed, 4 Dec 2013 14:14:20 +0000 (09:14 -0500)]
am335x_evm: Consolidate DFU environment parts into the DFU part of the file

To make managing the environment easier, add DFUARGS to
CONFIG_EXTRA_ENV_SETTINGS.  Then we set DFUARGS down in the DFU part of
the file, and include (or not) the NAND part, based on if NAND is set.

Signed-off-by: Tom Rini <trini@ti.com>
8 years agoarm: omap3: Add SPL support to cm_t35
Stefan Roese [Wed, 4 Dec 2013 12:54:18 +0000 (13:54 +0100)]
arm: omap3: Add SPL support to cm_t35

Add SPL U-Boot support to replace x-loader on the Compulab cm_t35
board. Currently only the 256MiB SDRAM board versions are supported.

Tested by booting via MMC and NAND.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
8 years agoarm: omap3: Add HEAD acoustics (HA) board variant omap3_ha to tao3530
Stefan Roese [Wed, 4 Dec 2013 08:27:37 +0000 (09:27 +0100)]
arm: omap3: Add HEAD acoustics (HA) board variant omap3_ha to tao3530

The Head acoustics (HA) baseboard used the Technexion TAO3530 SOM
and has only some minor differences to the Technexion Thunder baseboard.
This patch adds support for this HA baseboard / TAO3530 as the "omap3_ha"
build target.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
8 years agoarm: omap3: Add board revision output to tao3530
Stefan Roese [Wed, 4 Dec 2013 08:27:36 +0000 (09:27 +0100)]
arm: omap3: Add board revision output to tao3530

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
8 years agoarm: omap3: Remove bootargs mem_size handling
Stefan Roese [Wed, 4 Dec 2013 08:27:35 +0000 (09:27 +0100)]
arm: omap3: Remove bootargs mem_size handling

The memory size is autodetected and is passed to the Linux kernel
either via ATAGs or device-tree (dtb). So there is no need to
pass it via the bootargs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
8 years agoarm: omap3: Add SPL support to tao3530
Stefan Roese [Wed, 4 Dec 2013 08:27:34 +0000 (09:27 +0100)]
arm: omap3: Add SPL support to tao3530

Add SPL support for the Technexion TAO3530 SOM to replace
x-loader. Tested with the Thunder baseboard. Currently this is
only tested with the TAO3530 SOM revision (Ax/Bx).

Tested by booting via MMC and NAND.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
8 years agoarm, omap3: Add support for TechNexion modules
Tapani Utriainen [Wed, 4 Dec 2013 08:27:33 +0000 (09:27 +0100)]
arm, omap3: Add support for TechNexion modules

Add support for TechNexion TAO3530 SoM

This patch has been posted quite a long time ago. I ported it to
the latest mainline U-Boot version. With some additional cleanup
and enhancements.

Signed-off-by: Tapani Utriainen <tapani@technexion.com>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
8 years agoARM: OMAP4: Move TEXT_BASE down to non-HS limit
Lokesh Vutla [Wed, 4 Dec 2013 06:52:55 +0000 (12:22 +0530)]
ARM: OMAP4: Move TEXT_BASE down to non-HS limit

With the current scenario SPL size is being overlapped with the public
stack and not allowing any OMAP4 device to boot. So the suggestion came
up was to move the TEXT_BASE down to non-HS limit. Fixing the same and
also moving the SRAM_SCRATCH_SPACE_ADDR up to the end of image
downloadable area.
Discussion on this can be seen here:
https://www.mail-archive.com/u-boot@lists.denx.de/msg127147.html

Tested on OMAP4460 PANDA.

Reported-by: Chao Xu <caesarxuchao@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoam33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF
Tom Rini [Fri, 23 Aug 2013 16:26:49 +0000 (12:26 -0400)]
am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF

Test on Beaglebone white over cpsw, usb ether and SD card (read and
write), performance increased, crc32 of data matches.

Signed-off-by: Tom Rini <trini@ti.com>
8 years agoARM: fix the standalone programs
Jeroen Hofstee [Thu, 21 Nov 2013 21:32:51 +0000 (22:32 +0100)]
ARM: fix the standalone programs

The standalone programs do not use the api calls, but rely
directly on u-boot variable gd->jt for the jump table. Commit
fe1378a - "ARM: use r9 for gd" changed the register holding
the address of gd, but the assembly code in the standalone
examples was not updated accordingly. This broke the programs
on ARM relying on the jumptable in the v2013.10 release.
This patch unbricks them by using the correct register.

Cc: Michal Simek <monstr@monstr.eu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
8 years agoRevert "ARM: move interrupt_init to before relocation"
Albert ARIBAUD [Fri, 8 Nov 2013 21:37:33 +0000 (22:37 +0100)]
Revert "ARM: move interrupt_init to before relocation"

Revert commit 0f5141e9 which causes boards starting in
FLASH to try and write to a FLASH location.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Tue, 10 Dec 2013 22:15:18 +0000 (17:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
board/samsung/trats2/trats2.c
include/configs/exynos5250-dt.h

Signed-off-by: Tom Rini <trini@ti.com>
8 years agoMerge branch 'u-boot/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 10 Dec 2013 13:31:56 +0000 (14:31 +0100)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard

Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds

8 years agoMerge branch 'spi' of git://git.denx.de/u-boot-x86
Tom Rini [Tue, 10 Dec 2013 14:36:23 +0000 (09:36 -0500)]
Merge branch 'spi' of git://git.denx.de/u-boot-x86

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Tue, 10 Dec 2013 14:33:13 +0000 (09:33 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Tue, 10 Dec 2013 14:29:45 +0000 (09:29 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

8 years agovexpress: use correct timer address on extended memory map systems
Ian Campbell [Sun, 17 Nov 2013 15:17:42 +0000 (15:17 +0000)]
vexpress: use correct timer address on extended memory map systems

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: albert.u.boot@aribaud.net
8 years agoserial: zynq: Remove unused #defines
Soren Brinkmann [Wed, 30 Oct 2013 14:49:32 +0000 (15:49 +0100)]
serial: zynq: Remove unused #defines

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agosandbox: spi: Enable new spi/sf layers
Mike Frysinger [Tue, 3 Dec 2013 23:43:28 +0000 (16:43 -0700)]
sandbox: spi: Enable new spi/sf layers

We want to test SPI flash code in the sandbox, so enable the new drivers and
the 'sf test' command.

This command is used to validate the sandbox SPI / SPI flash implementation,
so enable it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agosandbox: spi: Add new SPI flash driver
Mike Frysinger [Tue, 3 Dec 2013 23:43:27 +0000 (16:43 -0700)]
sandbox: spi: Add new SPI flash driver

This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write.  Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.

sjg@chromium.org added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agosandbox: spi: Add SPI emulation bus
Mike Frysinger [Tue, 3 Dec 2013 23:43:26 +0000 (16:43 -0700)]
sandbox: spi: Add SPI emulation bus

This adds a SPI framework for people to hook up simulated SPI clients.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agospi: Add device tree binding for SPI bus
Simon Glass [Tue, 3 Dec 2013 23:43:25 +0000 (16:43 -0700)]
spi: Add device tree binding for SPI bus

This was obtained from Linux 3.12 commit 5e01dc7b26.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agospi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT node
Simon Glass [Tue, 3 Dec 2013 23:43:24 +0000 (16:43 -0700)]
spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT node

This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agosandbox: Rename sb_cmdline_option to sandbox_cmdline_option
Simon Glass [Tue, 3 Dec 2013 23:43:23 +0000 (16:43 -0700)]
sandbox: Rename sb_cmdline_option to sandbox_cmdline_option

The new name is longer but more clearly related to sandbox.

This is in a separate patch within the same series since some comments on the
SPI series rely on it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
8 years agoarm: at91: support for the Calao USB-A9263 board (based on AT91SAM9263)
Mateusz Kulikowski [Mon, 2 Dec 2013 22:30:58 +0000 (23:30 +0100)]
arm: at91: support for the Calao USB-A9263 board (based on AT91SAM9263)

Add support for USB-A9263 board manufactured by Calao Systems
(http://www.calao-systems.com/).
Code is based on old U-Boot sources (2010.09) released by Calao.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm, at91: add siemens corvus board
Heiko Schocher [Mon, 2 Dec 2013 06:47:23 +0000 (07:47 +0100)]
arm, at91: add siemens corvus board

enable support for the siemens AT91SAM9G20 based board corvus.

Signed-off-by: Boris Schmidt <boris.schmidt@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm, at91: add Siemens board taurus and axm
Heiko Schocher [Mon, 2 Dec 2013 06:47:22 +0000 (07:47 +0100)]
arm, at91: add Siemens board taurus and axm

enable support for the siemens AT91SAM9G20 based boards taurus
and axm.

Signed-off-by: Roger Meier <r.meier@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoat91: switch coloured LED to gpio API
Andreas Bießmann [Fri, 29 Nov 2013 11:13:46 +0000 (12:13 +0100)]
at91: switch coloured LED to gpio API

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoat91: nand: switch atmel_nand to generic GPIO API
Andreas Bießmann [Fri, 29 Nov 2013 11:13:45 +0000 (12:13 +0100)]
at91: nand: switch atmel_nand to generic GPIO API

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de>
Acked-by: Scott Wood <scottwood@freescale.com>
8 years agoat91: redefine legacy GPIO PIN_BASE
Andreas Bießmann [Fri, 29 Nov 2013 11:13:44 +0000 (12:13 +0100)]
at91: redefine legacy GPIO PIN_BASE

In order to get the very same value for legacy pin definitions and new gpio
definitions set the legacy PIN_BASE to 0.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoat91: add new gpio pin definitions
Andreas Bießmann [Fri, 29 Nov 2013 11:13:43 +0000 (12:13 +0100)]
at91: add new gpio pin definitions

This patch define new names for GPIO pins on at91 devices. Follow up patches
will convert the whole infrastructure to use these new definitions.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
8 years agommc: add Faraday FTSDC021 SDHCI controller support
Kuo-Jung Su [Mon, 25 Nov 2013 02:51:41 +0000 (10:51 +0800)]
mmc: add Faraday FTSDC021 SDHCI controller support

Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.

However this driver is only verified with SD memory cards.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
CC: Andy Fleming <afleming@gmail.com>
8 years agopowerpc: mmc: Add corenet devices support in esdhc spl
Priyanka Jain [Thu, 28 Nov 2013 04:42:16 +0000 (10:12 +0530)]
powerpc: mmc: Add corenet devices support in esdhc spl

Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
8 years agommc/dwmmc: modify FIFO threshold only if value explicitly set
Alexey Brodkin [Wed, 27 Nov 2013 13:00:52 +0000 (17:00 +0400)]
mmc/dwmmc: modify FIFO threshold only if value explicitly set

If platform provides "host->fifoth_val" it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.

This implementation allows:
 * escape unclear and recursive calculations that are currently in use
 * use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires it

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
8 years agommc: dw_mmc: remove the exynos specific code in dw-mmc.c
Jaehoon Chung [Fri, 29 Nov 2013 11:08:57 +0000 (20:08 +0900)]
mmc: dw_mmc: remove the exynos specific code in dw-mmc.c

dw-mmc.c is the general driver file.
So, remove the exynos specific code at dw-mmc.c.
Instead, exynos specific cod can be move into exynos-dw_mmc.c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoarm: keep all sections in ELF file
Albert ARIBAUD [Thu, 7 Nov 2013 13:21:46 +0000 (14:21 +0100)]
arm: keep all sections in ELF file

Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
8 years agoARM: align MVBAR on 32 byte boundary
Masahiro Yamada [Mon, 7 Oct 2013 02:46:56 +0000 (11:46 +0900)]
ARM: align MVBAR on 32 byte boundary

The lower 5 bit of MVBAR is UNK/SBZP.
So, Monitor Vector Base Address must be 32-byte aligned.
On the other hand, the secure monitor handler does not need
32-byte alignment.

This commit moves ".algin 5" directive to the correct place.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Andre Przywara <andre.przywara@linaro.org>
8 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 6 Dec 2013 15:54:42 +0000 (16:54 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

8 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 6 Dec 2013 13:26:51 +0000 (14:26 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-blackfin
Tom Rini [Fri, 6 Dec 2013 12:19:09 +0000 (07:19 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin

8 years agoAM3517 EVM: Enable ethernet
Tom Rini [Tue, 6 Dec 2011 15:49:41 +0000 (08:49 -0700)]
AM3517 EVM: Enable ethernet

Signed-off-by: Tom Rini <trini@ti.com>
8 years agoomap4_panda: Don't use ulpi_reset
Roger Quadros [Mon, 2 Dec 2013 13:47:45 +0000 (15:47 +0200)]
omap4_panda: Don't use ulpi_reset

Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"

It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.

Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agoomap3_beagle: Don't use ulpi_reset
Roger Quadros [Mon, 2 Dec 2013 13:47:44 +0000 (15:47 +0200)]
omap3_beagle: Don't use ulpi_reset

Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"

It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.

Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agousb: ehci-omap: Reset the USB Host OMAP module
Roger Quadros [Mon, 2 Dec 2013 13:47:43 +0000 (15:47 +0200)]
usb: ehci-omap: Reset the USB Host OMAP module

In commit bb1f327 we removed the UHH reset to fix NFS root (over usb
ethernet) problems with Beagleboard (3530 ES1.0). However, this
seems to cause USB detection problems for Pandaboard, about (3/8).

On further investigation, it seems that doing the UHH reset is not
the cause of the original Beagleboard problem, but in the way the reset
was done.

This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based
on the UHH_REVISION register. This should fix the Beagleboard NFS
problem as well as the Pandaboard USB detection problem.

Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
8 years agoarm: omap3: Enable clocks for peripherals only if they are used
Michael Trimarchi [Sat, 30 Nov 2013 06:59:58 +0000 (07:59 +0100)]
arm: omap3: Enable clocks for peripherals only if they are used

This patch change the per_clocks_enable() function used in OMAP3
code to enable peripherals clocks. Only required clock should be
activated. So if the board use the uart(x) as a console we need
to activate it. The Board's config should include define to enable
every subsystem that the board use. For a complete list
of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER
should be checked.
Right now the bootloader can enable and disable clocks for:
uart(x) using CONFIG_SYS_NS16550
gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 }
i2c bus using CONFIG_DRIVER_OMAP34XX_I2C.

Not required gptimer(x) and mcbsp(x) for booting are disabled by default and
are not supported by any define.
Their activation need to included in the per_clocks_enable if the
peripheral is included. Not booting board should enable the peripheral
clock connected to their driver

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
8 years agoarm: arndale: disable spi boot
Minkyu Kang [Fri, 6 Dec 2013 10:18:13 +0000 (19:18 +0900)]
arm: arndale: disable spi boot

arndale board is booted from mmc

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Inderpal Singh <inderpal.singh@linaro.org>
8 years agoarm: exynos: adds ifdef for spi boot
Minkyu Kang [Fri, 6 Dec 2013 10:04:03 +0000 (19:04 +0900)]
arm: exynos: adds ifdef for spi boot

This patch fix following errors and warnings

spl_boot.c: In function 'exynos_spi_copy':
spl_boot.c:111:49: error: 'CONFIG_ENV_SPI_BASE' undeclared (first use in this function)
spl_boot.c:111:49: note: each undeclared identifier is reported only once for each function it appears in
spl_boot.c:142:2: error: 'SPI_FLASH_UBOOT_POS' undeclared (first use in this function)
spl_boot.c: In function 'copy_uboot_to_ram':
spl_boot.c:189:28: warning: unused variable 'param' [-Wunused-variable]
spl_boot.c: At top level:
spl_boot.c:107:13: warning: 'exynos_spi_copy' defined but not used [-Wunused-function]

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
8 years agoMerge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 6 Dec 2013 09:41:49 +0000 (10:41 +0100)]
Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'

8 years agoblackfin: Do not generate unused header bootrom-asm-offsets.h
Masahiro Yamada [Fri, 29 Nov 2013 06:34:16 +0000 (15:34 +0900)]
blackfin: Do not generate unused header bootrom-asm-offsets.h

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
8 years agospi: bfin_spi6xx: Remove unnecessary test for bus and pins[bus]
Axel Lin [Mon, 2 Dec 2013 04:57:44 +0000 (12:57 +0800)]
spi: bfin_spi6xx: Remove unnecessary test for bus and pins[bus]

For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
8 years agospi: bfin_spi: Remove unnecessary test for bus and pins[bus]
Axel Lin [Mon, 2 Dec 2013 04:57:33 +0000 (12:57 +0800)]
spi: bfin_spi: Remove unnecessary test for bus and pins[bus]

For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
8 years agoblackfin: soft-i2c: No need to define blackfin specific soft i2c operations
Sonic Zhang [Mon, 18 Nov 2013 10:59:18 +0000 (18:59 +0800)]
blackfin: soft-i2c: No need to define blackfin specific soft i2c operations

Use default GPIO operations.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Heiko Schocher <hs@denx.de>
8 years agoblackfin: Add missing macro CONFIG_BFIN_SERIAL
Sonic Zhang [Mon, 18 Nov 2013 06:50:19 +0000 (14:50 +0800)]
blackfin: Add missing macro CONFIG_BFIN_SERIAL

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
8 years agoblackfin: If none ADI_GPIOX macro is defined, use ADI_GPIO1 as default
Sonic Zhang [Mon, 18 Nov 2013 06:12:39 +0000 (14:12 +0800)]
blackfin: If none ADI_GPIOX macro is defined, use ADI_GPIO1 as default

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
8 years agoblackfin: Use ADI_GPIO2 driver other than the default ADI_GPIO1
Sonic Zhang [Mon, 18 Nov 2013 06:01:38 +0000 (14:01 +0800)]
blackfin: Use ADI_GPIO2 driver other than the default ADI_GPIO1

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
8 years agoi2c: samsung: register i2c busses for Exynso5420 and Exynos5250
Naveen Krishna Ch [Fri, 6 Dec 2013 06:42:38 +0000 (12:12 +0530)]
i2c: samsung: register i2c busses for Exynso5420 and Exynos5250

This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels
on Exynos5420 and Exynos5250 and also adds support for init function
for hsi2c channels

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
8 years agoarm: omap: i2c: don't zero cnt in i2c_write
Nikita Kiryanov [Thu, 28 Nov 2013 16:04:42 +0000 (18:04 +0200)]
arm: omap: i2c: don't zero cnt in i2c_write

Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3
based devices. This seems to be related to the following advisory which
apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as
OMAP4430 TRM:

Advisory:
I2C Module Does Not Allow 0-Byte Data Requests
Details:
When configured as the master, the I2C module does not allow 0-byte data
transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause
undefined behavior.
Workaround(s):
No workaround. Do not use 0-byte data requests.

The writes in question are unnecessary from a functional point of view.
Most of them are done after I/O has finished, and the only one that preceds
I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before
actual data transmission takes place.

Therefore, remove all writes that zero the cnt register.

Cc: Heiko Schocher <hs@denx.de>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Tom Rini <trini@ti.com>
Cc: Lubomir Popov <lpopov@mm-sol.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
8 years agocmd_eeprom: bug fix for i2c read/write
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:59 +0000 (16:02 +0800)]
cmd_eeprom: bug fix for i2c read/write

The local pointer of address (i.e., addr) only gets
referenced under SPI mode, and it won't be appropriate
to pass only 1-byte addr[1] to i2c_read/i2c_write while
CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 1.

1. In U-boot's I2C model, the address would be re-assembled
   to a byte string in MSB order inside I2C controller drivers.

2. The 'CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW' option which could
   be found at soft_i2c.c is always turned on in cmd_eeprom.c,
   the addr[0] always contains the device address with overflowed
   MSB address bits.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
8 years agoi2c: fti2c010: serial out r/w address in MSB order
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:58 +0000 (16:02 +0800)]
i2c: fti2c010: serial out r/w address in MSB order

For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B),
the r/w address should be serial out in MSB order.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
8 years agoi2c: fti2c010: migrate to new i2c model
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:57 +0000 (16:02 +0800)]
i2c: fti2c010: migrate to new i2c model

Replace the legacy i2c model with the new one.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
8 years agoi2c: fti2c010: cosmetic: coding style cleanup
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:56 +0000 (16:02 +0800)]
i2c: fti2c010: cosmetic: coding style cleanup

Coding style cleanup

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
8 years agodriver:i2c:s3c24x0: fix clock init for hsi2c
Piotr Wilczek [Wed, 20 Nov 2013 09:43:50 +0000 (10:43 +0100)]
driver:i2c:s3c24x0: fix clock init for hsi2c

Fix clock value initialisation for Exynos other than Exynos5 for hsi2c.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
8 years agodriver:i2c:s3c24x0: adapt driver to new i2c
Piotr Wilczek [Wed, 20 Nov 2013 09:43:49 +0000 (10:43 +0100)]
driver:i2c:s3c24x0: adapt driver to new i2c

This patch adapts the s3c24x0 driver to the new i2c framework.
Config file is modified for all the boards that use the driver.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
CC: Heiko Schocher <hs@denx.de>
CC: Inderpal Singh <inderpal.singh@linaro.org>
CC: David Müller <d.mueller@elsoft.ch>
CC: Chander Kashyap <k.chander@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
8 years agoarm: exynos: remove the unused define.
Jaehoon Chung [Tue, 3 Dec 2013 05:00:21 +0000 (14:00 +0900)]
arm: exynos: remove the unused define.

These defines didn't use anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoarm: exynos/goni: fix the return type for s5p_mmc_init
Jaehoon Chung [Tue, 3 Dec 2013 05:01:06 +0000 (14:01 +0900)]
arm: exynos/goni: fix the return type for s5p_mmc_init

The "int" type is right.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agopowerpc/mpc8349: Use generic mpc85xx DDR driver
York Sun [Tue, 3 Dec 2013 21:16:59 +0000 (13:16 -0800)]
powerpc/mpc8349: Use generic mpc85xx DDR driver

MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
directly. We now can simply enable the macro and use the driver.
Other mpc83xx SoCs still use their own driver.

Signed-off-by: York Sun <yorksun@freescale.com>
8 years agopowerpc/t2080qds: undef CONFIG_FSL_DDR_INTERACTIVE
Shengzhou Liu [Wed, 4 Dec 2013 06:21:05 +0000 (14:21 +0800)]
powerpc/t2080qds: undef CONFIG_FSL_DDR_INTERACTIVE

Usually CONFIG_FSL_DDR_INTERACTIVE feature is used for debug.
we would not enable this by default to save the limited space of u-boot.

This avoid following compiling error:
section .bootpg loaded at [00000000effff000,00000000effff577] overlap ssection
.data loaded at [00000000efff31b8,00000000f00010c7]
u-boot: section .bootpg lma 0xeffff000 adjusted to 0xf00010c8

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
8 years agoT4240: Address T4240/T4160 Rev2.0 DDR clock change
Zang Roy-R61911 [Thu, 28 Nov 2013 05:23:37 +0000 (13:23 +0800)]
T4240: Address T4240/T4160 Rev2.0 DDR clock change

MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0.
It's 12 in Rev1.0, for Rev2.0 it uses 6.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
8 years agopowerpc: spiflash:Add corenet devices support in eSPI SPL
Priyanka Jain [Thu, 28 Nov 2013 04:38:12 +0000 (10:08 +0530)]
powerpc: spiflash:Add corenet devices support in eSPI SPL

Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
8 years agopowerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROM
Po Liu [Tue, 26 Nov 2013 06:34:07 +0000 (14:34 +0800)]
powerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROM

Currently, there is only one EEPROM on c29xpcie board which is AT24C1024.
We program the SPD data at beginning of the AT24C1024.But the AT24C1024
has a 16-bit sub-address mode. This patch is tomake it work when getting
SPD in a 16-bit sub-address EEPROM.

Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
8 years agopowerpc/p1010rdb:modify the mtest start_address
Zhao Qiang [Tue, 26 Nov 2013 05:59:15 +0000 (13:59 +0800)]
powerpc/p1010rdb:modify the mtest start_address

In new board P1010RDB-PB, the interrupt vector table is at
the start of memory. So if the start_address needs to be set
a proper value.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
8 years agopowerpc/corenet: CPC1 speculation disable
Dave Liu [Thu, 28 Nov 2013 06:58:08 +0000 (14:58 +0800)]
powerpc/corenet: CPC1 speculation disable

In PBL RAMBOOT(SPI/SD/NAND boot) mode, CPC1 used as SRAM, should disable
CPC1 speculation and keep it till relocation. Otherwise, speculation
transactions will go to DDR controller, it will cause problem.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>