2 * Copyright (C) 2005-2006 Atmel Corporation
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/clk.h>
11 #include <asm/arch/hmatrix.h>
12 #include <asm/arch/mmu.h>
13 #include <asm/arch/portmux.h>
16 DECLARE_GLOBAL_DATA_PTR;
18 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
20 .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
21 .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
22 .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)
25 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
26 .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
27 .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)
28 | MMU_VMR_CACHE_WRBACK,
32 static const struct sdram_config sdram_config = {
33 .data_bits = SDRAM_DATA_32BIT,
34 #ifdef CONFIG_ATSTK1000_16MB_SDRAM
35 /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
38 /* MT48LC2M32B2P-5 (8 MB) on motherboard */
51 .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
54 int board_early_init_f(void)
56 /* Enable SDRAM in the EBI mux */
57 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
59 portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH);
60 sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
62 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
64 #if defined(CONFIG_MACB)
65 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
66 portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
68 #if defined(CONFIG_MMC)
69 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
75 int board_early_init_r(void)
77 gd->bd->bi_phy_id[0] = 0x10;
78 gd->bd->bi_phy_id[1] = 0x11;
83 int board_eth_init(bd_t *bi)
85 macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
86 macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);