3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Torsten Demke, FORCE Computers GmbH. torsten.demke@fci.com
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/processor.h>
35 #define PIIX4_VENDOR_ID 0x8086
36 #define PIIX4_ISA_DEV_ID 0x7110
37 #define PIIX4_IDE_DEV_ID 0x7111
39 /* Function 0 ISA Bridge */
40 #define PCI_CFG_PIIX4_IORT 0x4C /* 8 bit ISA Recovery Timer Reg (default 0x4D) */
41 #define PCI_CFG_PIIX4_XBCS 0x4E /* 16 bit XBus Chip select reg (default 0x0003) */
42 #define PCI_CFG_PIIX4_PIRQC 0x60 /* PCI IRQ Route Register 4 x 8bit (default )*/
43 #define PCI_CFG_PIIX4_SERIRQ 0x64
44 #define PCI_CFG_PIIX4_TOM 0x69
45 #define PCI_CFG_PIIX4_MSTAT 0x6A
46 #define PCI_CFG_PIIX4_MBDMA 0x76
47 #define PCI_CFG_PIIX4_APICBS 0x80
48 #define PCI_CFG_PIIX4_DLC 0x82
49 #define PCI_CFG_PIIX4_PDMACFG 0x90
50 #define PCI_CFG_PIIX4_DDMABS 0x92
51 #define PCI_CFG_PIIX4_GENCFG 0xB0
52 #define PCI_CFG_PIIX4_RTCCFG 0xCB
55 #define PIIX4_ISA_DMA1_CH0BA 0x00
56 #define PIIX4_ISA_DMA1_CH0CA 0x01
57 #define PIIX4_ISA_DMA1_CH1BA 0x02
58 #define PIIX4_ISA_DMA1_CH1CA 0x03
59 #define PIIX4_ISA_DMA1_CH2BA 0x04
60 #define PIIX4_ISA_DMA1_CH2CA 0x05
61 #define PIIX4_ISA_DMA1_CH3BA 0x06
62 #define PIIX4_ISA_DMA1_CH3CA 0x07
63 #define PIIX4_ISA_DMA1_CMDST 0x08
64 #define PIIX4_ISA_DMA1_REQ 0x09
65 #define PIIX4_ISA_DMA1_WSBM 0x0A
66 #define PIIX4_ISA_DMA1_CH_MOD 0x0B
67 #define PIIX4_ISA_DMA1_CLR_PT 0x0C
68 #define PIIX4_ISA_DMA1_M_CLR 0x0D
69 #define PIIX4_ISA_DMA1_CLR_M 0x0E
70 #define PIIX4_ISA_DMA1_RWAMB 0x0F
72 #define PIIX4_ISA_DMA2_CH0BA 0xC0
73 #define PIIX4_ISA_DMA2_CH0CA 0xC1
74 #define PIIX4_ISA_DMA2_CH1BA 0xC2
75 #define PIIX4_ISA_DMA2_CH1CA 0xC3
76 #define PIIX4_ISA_DMA2_CH2BA 0xC4
77 #define PIIX4_ISA_DMA2_CH2CA 0xC5
78 #define PIIX4_ISA_DMA2_CH3BA 0xC6
79 #define PIIX4_ISA_DMA2_CH3CA 0xC7
80 #define PIIX4_ISA_DMA2_CMDST 0xD0
81 #define PIIX4_ISA_DMA2_REQ 0xD2
82 #define PIIX4_ISA_DMA2_WSBM 0xD4
83 #define PIIX4_ISA_DMA2_CH_MOD 0xD6
84 #define PIIX4_ISA_DMA2_CLR_PT 0xD8
85 #define PIIX4_ISA_DMA2_M_CLR 0xDA
86 #define PIIX4_ISA_DMA2_CLR_M 0xDC
87 #define PIIX4_ISA_DMA2_RWAMB 0xDE
89 #define PIIX4_ISA_INT1_ICW1 0x20
90 #define PIIX4_ISA_INT1_OCW2 0x20
91 #define PIIX4_ISA_INT1_OCW3 0x20
92 #define PIIX4_ISA_INT1_ICW2 0x21
93 #define PIIX4_ISA_INT1_ICW3 0x21
94 #define PIIX4_ISA_INT1_ICW4 0x21
95 #define PIIX4_ISA_INT1_OCW1 0x21
97 #define PIIX4_ISA_INT1_ELCR 0x4D0
99 #define PIIX4_ISA_INT2_ICW1 0xA0
100 #define PIIX4_ISA_INT2_OCW2 0xA0
101 #define PIIX4_ISA_INT2_OCW3 0xA0
102 #define PIIX4_ISA_INT2_ICW2 0xA1
103 #define PIIX4_ISA_INT2_ICW3 0xA1
104 #define PIIX4_ISA_INT2_ICW4 0xA1
105 #define PIIX4_ISA_INT2_OCW1 0xA1
106 #define PIIX4_ISA_INT2_IMR 0xA1 /* read only */
108 #define PIIX4_ISA_INT2_ELCR 0x4D1
110 #define PIIX4_ISA_TMR0_CNT_ST 0x40
111 #define PIIX4_ISA_TMR1_CNT_ST 0x41
112 #define PIIX4_ISA_TMR2_CNT_ST 0x42
113 #define PIIX4_ISA_TMR_TCW 0x43
115 #define PIIX4_ISA_RST_XBUS 0x60
117 #define PIIX4_ISA_NMI_CNT_ST 0x61
118 #define PIIX4_ISA_NMI_ENABLE 0x70
120 #define PIIX4_ISA_RTC_INDEX 0x70
121 #define PIIX4_ISA_RTC_DATA 0x71
122 #define PIIX4_ISA_RTCEXT_IND 0x70
123 #define PIIX4_ISA_RTCEXT_DATA 0x71
125 #define PIIX4_ISA_DMA1_CH2LPG 0x81
126 #define PIIX4_ISA_DMA1_CH3LPG 0x82
127 #define PIIX4_ISA_DMA1_CH1LPG 0x83
128 #define PIIX4_ISA_DMA1_CH0LPG 0x87
129 #define PIIX4_ISA_DMA2_CH2LPG 0x89
130 #define PIIX4_ISA_DMA2_CH3LPG 0x8A
131 #define PIIX4_ISA_DMA2_CH1LPG 0x8B
132 #define PIIX4_ISA_DMA2_LPGRFR 0x8F
134 #define PIIX4_ISA_PORT_92 0x92
136 #define PIIX4_ISA_APM_CONTRL 0xB2
137 #define PIIX4_ISA_APM_STATUS 0xB3
139 #define PIIX4_ISA_COCPU_ERROR 0xF0
141 /* Function 1 IDE Controller */
142 #define PCI_CFG_PIIX4_BMIBA 0x20
143 #define PCI_CFG_PIIX4_IDETIM 0x40
144 #define PCI_CFG_PIIX4_SIDETIM 0x44
145 #define PCI_CFG_PIIX4_UDMACTL 0x48
146 #define PCI_CFG_PIIX4_UDMATIM 0x4A
148 /* Function 2 USB Controller */
149 #define PCI_CFG_PIIX4_SBRNUM 0x60
150 #define PCI_CFG_PIIX4_LEGSUP 0xC0
152 /* Function 3 Power Management */
153 #define PCI_CFG_PIIX4_PMAB 0x40
154 #define PCI_CFG_PIIX4_CNTA 0x44
155 #define PCI_CFG_PIIX4_CNTB 0x48
156 #define PCI_CFG_PIIX4_GPICTL 0x4C
157 #define PCI_CFG_PIIX4_DEVRESD 0x50
158 #define PCI_CFG_PIIX4_DEVACTA 0x54
159 #define PCI_CFG_PIIX4_DEVACTB 0x58
160 #define PCI_CFG_PIIX4_DEVRESA 0x5C
161 #define PCI_CFG_PIIX4_DEVRESB 0x60
162 #define PCI_CFG_PIIX4_DEVRESC 0x64
163 #define PCI_CFG_PIIX4_DEVRESE 0x68
164 #define PCI_CFG_PIIX4_DEVRESF 0x6C
165 #define PCI_CFG_PIIX4_DEVRESG 0x70
166 #define PCI_CFG_PIIX4_DEVRESH 0x74
167 #define PCI_CFG_PIIX4_DEVRESI 0x78
168 #define PCI_CFG_PIIX4_PMMISC 0x80
169 #define PCI_CFG_PIIX4_SMBBA 0x90
172 #endif /* _PIIX4_PCI_H */