2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
20 #if defined(CONFIG_CMD_IDE)
28 /* TODO: Can we move these into arch/ headers? */
38 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
45 #include <status_led.h>
48 #include <asm/errno.h>
50 #include <asm/sections.h>
51 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
52 #include <asm/init_helpers.h>
53 #include <asm/relocate.h>
56 #include <asm/state.h>
59 #include <linux/compiler.h>
62 * Pointer to initial global data area
64 * Here we initialize it if needed.
66 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
68 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
69 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
71 DECLARE_GLOBAL_DATA_PTR;
75 * sjg: IMO this code should be
76 * refactored to a single function, something like:
78 * void led_set_state(enum led_colour_t colour, int on);
80 /************************************************************************
81 * Coloured LED functionality
82 ************************************************************************
83 * May be supplied by boards if desired
85 __weak void coloured_LED_init(void) {}
86 __weak void red_led_on(void) {}
87 __weak void red_led_off(void) {}
88 __weak void green_led_on(void) {}
89 __weak void green_led_off(void) {}
90 __weak void yellow_led_on(void) {}
91 __weak void yellow_led_off(void) {}
92 __weak void blue_led_on(void) {}
93 __weak void blue_led_off(void) {}
96 * Why is gd allocated a register? Prior to reloc it might be better to
97 * just pass it around to each function in this file?
99 * After reloc one could argue that it is hardly used and doesn't need
100 * to be in a register. Or if it is it should perhaps hold pointers to all
101 * global data for all modules, so that post-reloc we can avoid the massive
102 * literal pool we get on ARM. Or perhaps just encourage each module to use
107 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
110 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
111 static int init_func_watchdog_init(void)
113 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
114 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
115 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
116 defined(CONFIG_IMX_WATCHDOG))
119 puts(" Watchdog enabled\n");
125 int init_func_watchdog_reset(void)
131 #endif /* CONFIG_WATCHDOG */
133 __weak void board_add_ram_info(int use_default)
135 /* please define platform specific board_add_ram_info() */
138 static int init_baud_rate(void)
140 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
144 static int display_text_info(void)
146 #ifndef CONFIG_SANDBOX
147 ulong bss_start, bss_end, text_base;
149 bss_start = (ulong)&__bss_start;
150 bss_end = (ulong)&__bss_end;
152 #ifdef CONFIG_SYS_TEXT_BASE
153 text_base = CONFIG_SYS_TEXT_BASE;
155 text_base = CONFIG_SYS_MONITOR_BASE;
158 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
159 text_base, bss_start, bss_end);
162 #ifdef CONFIG_MODEM_SUPPORT
163 debug("Modem Support enabled\n");
165 #ifdef CONFIG_USE_IRQ
166 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
167 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
173 static int announce_dram_init(void)
179 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
180 static int init_func_ram(void)
182 #ifdef CONFIG_BOARD_TYPES
183 int board_type = gd->board_type;
185 int board_type = 0; /* use dummy arg */
188 gd->ram_size = initdram(board_type);
190 if (gd->ram_size > 0)
193 puts("*** failed ***\n");
198 static int show_dram_config(void)
200 unsigned long long size;
202 #ifdef CONFIG_NR_DRAM_BANKS
205 debug("\nRAM Configuration:\n");
206 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
207 size += gd->bd->bi_dram[i].size;
208 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
210 print_size(gd->bd->bi_dram[i].size, "\n");
218 print_size(size, "");
219 board_add_ram_info(0);
225 __weak void dram_init_banksize(void)
227 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
228 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
229 gd->bd->bi_dram[0].size = get_effective_memsize();
233 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
234 static int init_func_i2c(void)
237 #ifdef CONFIG_SYS_I2C
240 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
247 #if defined(CONFIG_HARD_SPI)
248 static int init_func_spi(void)
258 static int zero_global_data(void)
260 memset((void *)gd, '\0', sizeof(gd_t));
265 static int setup_mon_len(void)
267 #if defined(__ARM__) || defined(__MICROBLAZE__)
268 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
269 #elif defined(CONFIG_SANDBOX)
270 gd->mon_len = (ulong)&_end - (ulong)_init;
271 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
272 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
274 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
275 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
280 __weak int arch_cpu_init(void)
285 __weak unsigned long get_timer_masked(void)
290 #ifdef CONFIG_SANDBOX
291 static int setup_ram_buf(void)
293 struct sandbox_state *state = state_get_current();
295 gd->arch.ram_buf = state->ram_buf;
296 gd->ram_size = state->ram_size;
302 /* Get the top of usable RAM */
303 __weak ulong board_get_usable_ram_top(ulong total_size)
305 #ifdef CONFIG_SYS_SDRAM_BASE
307 * Detect whether we have so much RAM it goes past the end of our
308 * 32-bit address space. If so, clip the usable RAM so it doesn't.
310 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
312 * Will wrap back to top of 32-bit space when reservations
320 static int setup_dest_addr(void)
322 debug("Monitor len: %08lX\n", gd->mon_len);
324 * Ram is setup, size stored in gd !!
326 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
327 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
329 * Subtract specified amount of memory to hide so that it won't
330 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 * the Linux kernel should now get passed the now "corrected"
332 * memory size and won't touch it either. This should work
333 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 * arch/powerpc with bootwrapper support, that recalculate the
335 * memory size from the SDRAM controller setup will have to
338 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
340 #ifdef CONFIG_SYS_SDRAM_BASE
341 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
343 gd->ram_top += get_effective_memsize();
344 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
345 gd->relocaddr = gd->ram_top;
346 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
347 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
349 * We need to make sure the location we intend to put secondary core
350 * boot code is reserved and not used by any part of u-boot
352 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
353 gd->relocaddr = determine_mp_bootpg(NULL);
354 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
360 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
361 static int reserve_logbuffer(void)
363 /* reserve kernel log buffer */
364 gd->relocaddr -= LOGBUFF_RESERVE;
365 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
372 /* reserve protected RAM */
373 static int reserve_pram(void)
377 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
378 gd->relocaddr -= (reg << 10); /* size is in kB */
379 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
383 #endif /* CONFIG_PRAM */
385 /* Round memory pointer down to next 4 kB limit */
386 static int reserve_round_4k(void)
388 gd->relocaddr &= ~(4096 - 1);
392 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
394 static int reserve_mmu(void)
396 /* reserve TLB table */
397 gd->arch.tlb_size = PGTABLE_SIZE;
398 gd->relocaddr -= gd->arch.tlb_size;
400 /* round down to next 64 kB limit */
401 gd->relocaddr &= ~(0x10000 - 1);
403 gd->arch.tlb_addr = gd->relocaddr;
404 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
405 gd->arch.tlb_addr + gd->arch.tlb_size);
411 static int reserve_lcd(void)
413 #ifdef CONFIG_FB_ADDR
414 gd->fb_base = CONFIG_FB_ADDR;
416 /* reserve memory for LCD display (always full pages) */
417 gd->relocaddr = lcd_setmem(gd->relocaddr);
418 gd->fb_base = gd->relocaddr;
419 #endif /* CONFIG_FB_ADDR */
422 #endif /* CONFIG_LCD */
424 static int reserve_trace(void)
427 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
428 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
429 debug("Reserving %dk for trace data at: %08lx\n",
430 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
436 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
437 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
438 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
439 static int reserve_video(void)
441 /* reserve memory for video display (always full pages) */
442 gd->relocaddr = video_setmem(gd->relocaddr);
443 gd->fb_base = gd->relocaddr;
449 static int reserve_uboot(void)
452 * reserve memory for U-Boot code, data & bss
453 * round down to next 4 kB limit
455 gd->relocaddr -= gd->mon_len;
456 gd->relocaddr &= ~(4096 - 1);
458 /* round down to next 64 kB limit so that IVPR stays aligned */
459 gd->relocaddr &= ~(65536 - 1);
462 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
465 gd->start_addr_sp = gd->relocaddr;
470 #ifndef CONFIG_SPL_BUILD
471 /* reserve memory for malloc() area */
472 static int reserve_malloc(void)
474 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
475 debug("Reserving %dk for malloc() at: %08lx\n",
476 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
480 /* (permanently) allocate a Board Info struct */
481 static int reserve_board(void)
484 gd->start_addr_sp -= sizeof(bd_t);
485 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
486 memset(gd->bd, '\0', sizeof(bd_t));
487 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
488 sizeof(bd_t), gd->start_addr_sp);
494 static int setup_machine(void)
496 #ifdef CONFIG_MACH_TYPE
497 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
502 static int reserve_global_data(void)
504 gd->start_addr_sp -= sizeof(gd_t);
505 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
506 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
507 sizeof(gd_t), gd->start_addr_sp);
511 static int reserve_fdt(void)
514 * If the device tree is sitting immediate above our image then we
515 * must relocate it. If it is embedded in the data section, then it
516 * will be relocated with other data.
519 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
521 gd->start_addr_sp -= gd->fdt_size;
522 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
523 debug("Reserving %lu Bytes for FDT at: %08lx\n",
524 gd->fdt_size, gd->start_addr_sp);
530 int arch_reserve_stacks(void)
535 static int reserve_stacks(void)
537 /* make stack pointer 16-byte aligned */
538 gd->start_addr_sp -= 16;
539 gd->start_addr_sp &= ~0xf;
542 * let the architecture specific code tailor gd->start_addr_sp and
545 return arch_reserve_stacks();
548 static int display_new_sp(void)
550 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
555 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
556 static int setup_board_part1(void)
561 * Save local variables to board info struct
564 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
565 bd->bi_memsize = gd->ram_size; /* size in bytes */
567 #ifdef CONFIG_SYS_SRAM_BASE
568 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
569 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
572 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
573 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
574 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
576 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
577 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
579 #if defined(CONFIG_MPC83xx)
580 bd->bi_immrbar = CONFIG_SYS_IMMR;
586 static int setup_board_part2(void)
590 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
591 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
592 #if defined(CONFIG_CPM2)
593 bd->bi_cpmfreq = gd->arch.cpm_clk;
594 bd->bi_brgfreq = gd->arch.brg_clk;
595 bd->bi_sccfreq = gd->arch.scc_clk;
596 bd->bi_vco = gd->arch.vco_out;
597 #endif /* CONFIG_CPM2 */
598 #if defined(CONFIG_MPC512X)
599 bd->bi_ipsfreq = gd->arch.ips_clk;
600 #endif /* CONFIG_MPC512X */
601 #if defined(CONFIG_MPC5xxx)
602 bd->bi_ipbfreq = gd->arch.ipb_clk;
603 bd->bi_pcifreq = gd->pci_clk;
604 #endif /* CONFIG_MPC5xxx */
605 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
606 bd->bi_pcifreq = gd->pci_clk;
608 #if defined(CONFIG_EXTRA_CLOCK)
609 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
610 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
611 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
618 #ifdef CONFIG_SYS_EXTBDINFO
619 static int setup_board_extra(void)
623 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
624 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
625 sizeof(bd->bi_r_version));
627 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
628 bd->bi_plb_busfreq = gd->bus_clk;
629 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
630 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
631 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
632 bd->bi_pci_busfreq = get_PCI_freq();
633 bd->bi_opbfreq = get_OPB_freq();
634 #elif defined(CONFIG_XILINX_405)
635 bd->bi_pci_busfreq = get_PCI_freq();
643 static int init_post(void)
645 post_bootmode_init();
646 post_run(NULL, POST_ROM | post_bootmode_get(0));
652 static int setup_dram_config(void)
654 /* Ram is board specific, so move it to board code ... */
655 dram_init_banksize();
660 static int reloc_fdt(void)
663 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
664 gd->fdt_blob = gd->new_fdt;
670 static int setup_reloc(void)
672 #ifdef CONFIG_SYS_TEXT_BASE
673 #if defined(CONFIG_M68K)
675 * On all ColdFire arch cpu, monitor code starts always
676 * just after the default vector table location, so at 0x400
678 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
679 #elif defined(CONFIG_ARM)
680 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
682 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
685 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
687 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
688 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
689 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
695 /* ARM calls relocate_code from its crt0.S */
696 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
698 static int jump_to_copy(void)
701 * x86 is special, but in a nice way. It uses a trampoline which
702 * enables the dcache if possible.
704 * For now, other archs use relocate_code(), which is implemented
705 * similarly for all archs. When we do generic relocation, hopefully
706 * we can make all archs enable the dcache prior to relocation.
708 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
710 * SDRAM and console are now initialised. The final stack can now
711 * be setup in SDRAM. Code execution will continue in Flash, but
712 * with the stack in SDRAM and Global Data in temporary memory
715 board_init_f_r_trampoline(gd->start_addr_sp);
717 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
724 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
725 static int mark_bootstage(void)
727 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
732 static int initf_malloc(void)
734 #ifdef CONFIG_SYS_MALLOC_F_LEN
735 assert(gd->malloc_base); /* Set up by crt0.S */
736 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
743 static int initf_dm(void)
745 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
748 ret = dm_init_and_scan(true);
756 /* Architecture-specific memory reservation */
757 __weak int reserve_arch(void)
762 __weak int arch_cpu_init_dm(void)
767 static init_fnc_t init_sequence_f[] = {
768 #ifdef CONFIG_SANDBOX
772 #ifdef CONFIG_OF_CONTROL
779 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
780 /* TODO: can this go into arch_cpu_init()? */
783 arch_cpu_init, /* basic arch cpu dependent setup */
785 #ifdef CONFIG_OF_CONTROL
790 #if defined(CONFIG_BOARD_EARLY_INIT_F)
793 /* TODO: can any of this go into arch_cpu_init()? */
794 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
795 get_clocks, /* get CPU and bus clocks (etc.) */
796 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
797 && !defined(CONFIG_TQM885D)
798 adjust_sdram_tbs_8xx,
800 /* TODO: can we rename this to timer_init()? */
803 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
804 timer_init, /* initialize timer */
806 #ifdef CONFIG_SYS_ALLOC_DPRAM
807 #if !defined(CONFIG_CPM2)
811 #if defined(CONFIG_BOARD_POSTCLK_INIT)
814 #ifdef CONFIG_FSL_ESDHC
820 env_init, /* initialize environment */
821 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
822 /* get CPU and bus clocks according to the environment variable */
824 /* adjust sdram refresh rate according to the new clock */
828 init_baud_rate, /* initialze baudrate settings */
829 serial_init, /* serial communications setup */
830 console_init_f, /* stage 1 init of console */
831 #ifdef CONFIG_SANDBOX
832 sandbox_early_getopt_check,
834 #ifdef CONFIG_OF_CONTROL
837 display_options, /* say that we are here */
838 display_text_info, /* show debugging info if required */
839 #if defined(CONFIG_MPC8260)
842 #endif /* CONFIG_MPC8260 */
843 #if defined(CONFIG_MPC83xx)
846 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
849 print_cpuinfo, /* display cpu info (and speed) */
850 #if defined(CONFIG_MPC5xxx)
852 #endif /* CONFIG_MPC5xxx */
853 #if defined(CONFIG_DISPLAY_BOARDINFO)
856 INIT_FUNC_WATCHDOG_INIT
857 #if defined(CONFIG_MISC_INIT_F)
860 INIT_FUNC_WATCHDOG_RESET
861 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
864 #if defined(CONFIG_HARD_SPI)
868 /* TODO: unify all these dram functions? */
869 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
870 dram_init, /* configure available RAM banks */
872 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
878 INIT_FUNC_WATCHDOG_RESET
879 #if defined(CONFIG_SYS_DRAM_TEST)
881 #endif /* CONFIG_SYS_DRAM_TEST */
882 INIT_FUNC_WATCHDOG_RESET
887 INIT_FUNC_WATCHDOG_RESET
889 * Now that we have DRAM mapped and working, we can
890 * relocate the code and continue running from DRAM.
892 * Reserve memory at end of RAM for (top down in that order):
893 * - area that won't get touched by U-Boot and Linux (optional)
894 * - kernel log buffer
898 * - board info struct
901 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
902 /* Blackfin u-boot monitor should be on top of the ram */
905 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
912 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
920 /* TODO: Why the dependency on CONFIG_8xx? */
921 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
922 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
923 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
926 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
929 #ifndef CONFIG_SPL_BUILD
940 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
942 INIT_FUNC_WATCHDOG_RESET
946 #ifdef CONFIG_SYS_EXTBDINFO
949 INIT_FUNC_WATCHDOG_RESET
952 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
957 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
963 void board_init_f(ulong boot_flags)
965 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
967 * For some archtectures, global data is initialized and used before
968 * calling this function. The data should be preserved. For others,
969 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
970 * here to host global data until relocation.
977 * Clear global data before it is accessed at debug print
978 * in initcall_run_list. Otherwise the debug print probably
979 * get the wrong vaule of gd->have_console.
984 gd->flags = boot_flags;
985 gd->have_console = 0;
987 if (initcall_run_list(init_sequence_f))
990 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
991 /* NOTREACHED - jump_to_copy() does not return */
996 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
998 * For now this code is only used on x86.
1000 * init_sequence_f_r is the list of init functions which are run when
1001 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1002 * The following limitations must be considered when implementing an
1004 * - 'static' variables are read-only
1005 * - Global Data (gd->xxx) is read/write
1007 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1008 * supported). It _should_, if possible, copy global data to RAM and
1009 * initialise the CPU caches (to speed up the relocation process)
1011 * NOTE: At present only x86 uses this route, but it is intended that
1012 * all archs will move to this when generic relocation is implemented.
1014 static init_fnc_t init_sequence_f_r[] = {
1020 void board_init_f_r(void)
1022 if (initcall_run_list(init_sequence_f_r))
1026 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1027 * Transfer execution from Flash to RAM by calculating the address
1028 * of the in-RAM copy of board_init_r() and calling it
1030 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1032 /* NOTREACHED - board_init_r() does not return */
1035 #endif /* CONFIG_X86 */
1038 ulong board_init_f_mem(ulong top)
1040 /* Leave space for the stack we are running with now */
1043 top -= sizeof(struct global_data);
1044 top = ALIGN(top, 16);
1045 gd = (struct global_data *)top;
1046 memset((void *)gd, '\0', sizeof(*gd));
1048 #ifdef CONFIG_SYS_MALLOC_F_LEN
1049 top -= CONFIG_SYS_MALLOC_F_LEN;
1050 gd->malloc_base = top;
1055 #endif /* !CONFIG_X86 */