2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
33 #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
35 #include <asm/arch/hardware.h>
37 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
38 #include <asm/arch/ixp425.h>
41 #include <asm/arch/hardware.h>
43 #ifdef CONFIG_MPC866 /* only valid for MPC866 */
48 /* #define DEBUG_I2C */
51 DECLARE_GLOBAL_DATA_PTR;
55 /*-----------------------------------------------------------------------
62 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
63 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
67 #define PRINTD(fmt,args...) do { \
68 if (gd->have_console) \
69 printf (fmt ,##args); \
72 #define PRINTD(fmt,args...)
75 #if defined(CONFIG_I2C_MULTI_BUS)
76 static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
77 #endif /* CONFIG_I2C_MULTI_BUS */
79 /*-----------------------------------------------------------------------
82 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
83 static void send_reset (void);
85 static void send_start (void);
86 static void send_stop (void);
87 static void send_ack (int);
88 static int write_byte (uchar byte);
89 static uchar read_byte (int);
91 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
92 /*-----------------------------------------------------------------------
93 * Send a reset sequence consisting of 9 clocks with the data signal high
94 * to clock any confused device back into an idle state. Also send a
95 * <stop> at the end of the sequence for belts & suspenders.
97 static void send_reset(void)
99 I2C_SOFT_DECLARATIONS /* intentional without ';' */
108 for(j = 0; j < 9; j++) {
121 /*-----------------------------------------------------------------------
122 * START: High -> Low on SDA while SCL is High
124 static void send_start(void)
126 I2C_SOFT_DECLARATIONS /* intentional without ';' */
138 /*-----------------------------------------------------------------------
139 * STOP: Low -> High on SDA while SCL is High
141 static void send_stop(void)
143 I2C_SOFT_DECLARATIONS /* intentional without ';' */
158 /*-----------------------------------------------------------------------
159 * ack should be I2C_ACK or I2C_NOACK
161 static void send_ack(int ack)
163 I2C_SOFT_DECLARATIONS /* intentional without ';' */
178 /*-----------------------------------------------------------------------
179 * Send 8 bits and look for an acknowledgement.
181 static int write_byte(uchar data)
183 I2C_SOFT_DECLARATIONS /* intentional without ';' */
188 for(j = 0; j < 8; j++) {
191 I2C_SDA(data & 0x80);
201 * Look for an <ACK>(negative logic) and return it.
216 return(nack); /* not a nack is an ack */
219 #if defined(CONFIG_I2C_MULTI_BUS)
221 * Functions for multiple I2C bus handling
223 unsigned int i2c_get_bus_num(void)
228 int i2c_set_bus_num(unsigned int bus)
230 #if defined(CONFIG_I2C_MUX)
231 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
236 ret = i2x_mux_select_mux(bus);
243 if (bus >= CONFIG_SYS_MAX_I2C_BUS)
250 /* TODO: add 100/400k switching */
251 unsigned int i2c_get_bus_speed(void)
253 return CONFIG_SYS_I2C_SPEED;
256 int i2c_set_bus_speed(unsigned int speed)
258 if (speed != CONFIG_SYS_I2C_SPEED)
265 /*-----------------------------------------------------------------------
266 * if ack == I2C_ACK, ACK the byte so can continue reading, else
267 * send I2C_NOACK to end the read.
269 static uchar read_byte(int ack)
271 I2C_SOFT_DECLARATIONS /* intentional without ';' */
276 * Read 8 bits, MSB first.
281 for(j = 0; j < 8; j++) {
295 /*=====================================================================*/
296 /* Public Functions */
297 /*=====================================================================*/
299 /*-----------------------------------------------------------------------
302 void i2c_init (int speed, int slaveaddr)
304 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
305 /* call board specific i2c bus reset routine before accessing the */
306 /* environment, which might be in a chip on that bus. For details */
307 /* about this problem see doc/I2C_Edge_Conditions. */
311 * WARNING: Do NOT save speed in a static variable: if the
312 * I2C routines are called before RAM is initialized (to read
313 * the DIMM SPD, for instance), RAM won't be usable and your
320 /*-----------------------------------------------------------------------
321 * Probe to see if a chip is present. Also good for checking for the
322 * completion of EEPROM writes since the chip stops responding until
323 * the write completes (typically 10mSec).
325 int i2c_probe(uchar addr)
330 * perform 1 byte write transaction with just address byte
334 rc = write_byte ((addr << 1) | 0);
340 /*-----------------------------------------------------------------------
343 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
346 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
347 chip, addr, alen, buffer, len);
349 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
351 * EEPROM chips that implement "address overflow" are ones
352 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
353 * address and the extra bits end up in the "chip address"
354 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
355 * four 256 byte chips.
357 * Note that we consider the length of the address field to
358 * still be one byte because the extra address bits are
359 * hidden in the chip address.
361 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
363 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
368 * Do the addressing portion of a write cycle to set the
369 * chip's address pointer. If the address length is zero,
370 * don't do the normal write cycle to set the address pointer,
371 * there is no address pointer in this chip.
375 if(write_byte(chip << 1)) { /* write cycle */
377 PRINTD("i2c_read, no chip responded %02X\n", chip);
380 shift = (alen-1) * 8;
382 if(write_byte(addr >> shift)) {
383 PRINTD("i2c_read, address not <ACK>ed\n");
388 send_stop(); /* reportedly some chips need a full stop */
392 * Send the chip address again, this time for a read cycle.
393 * Then read the data. On the last byte, we do a NACK instead
394 * of an ACK(len == 0) to terminate the read.
396 write_byte((chip << 1) | 1); /* read cycle */
398 *buffer++ = read_byte(len == 0);
404 /*-----------------------------------------------------------------------
407 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
409 int shift, failures = 0;
411 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
412 chip, addr, alen, buffer, len);
415 if(write_byte(chip << 1)) { /* write cycle */
417 PRINTD("i2c_write, no chip responded %02X\n", chip);
420 shift = (alen-1) * 8;
422 if(write_byte(addr >> shift)) {
423 PRINTD("i2c_write, address not <ACK>ed\n");
430 if(write_byte(*buffer++)) {
438 /*-----------------------------------------------------------------------
441 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
445 i2c_read(i2c_addr, reg, 1, &buf, 1);
450 /*-----------------------------------------------------------------------
453 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
455 i2c_write(i2c_addr, reg, 1, &val, 1);