2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
5 * Configuration settings for the Embest RIoTboard
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
16 #include "mx6_common.h"
18 #define CONFIG_MXC_UART_BASE UART2_BASE
19 #define CONFIG_CONSOLE_DEV "ttymxc1"
20 #define CONFIG_MMCROOT "/dev/mmcblk0p2"
22 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
24 #define CONFIG_IMX6_THERMAL
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_BOARD_LATE_INIT
32 #define CONFIG_MXC_UART
34 #define CONFIG_CMD_FUSE
35 #ifdef CONFIG_CMD_FUSE
36 #define CONFIG_MXC_OCOTP
40 #define CONFIG_CMD_I2C
41 #define CONFIG_SYS_I2C
42 #define CONFIG_SYS_I2C_MXC
43 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
44 #define CONFIG_SYS_I2C_SPEED 100000
47 #define CONFIG_CMD_USB
48 #define CONFIG_USB_EHCI
49 #define CONFIG_USB_EHCI_MX6
50 #define CONFIG_USB_STORAGE
51 #define CONFIG_USB_HOST_ETHER
52 #define CONFIG_USB_ETHER_ASIX
53 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
54 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
55 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
56 #define CONFIG_MXC_USB_FLAGS 0
59 #define CONFIG_FSL_ESDHC
60 #define CONFIG_FSL_USDHC
61 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
64 #define CONFIG_CMD_MMC
65 #define CONFIG_GENERIC_MMC
66 #define CONFIG_BOUNCE_BUFFER
68 #define CONFIG_FEC_MXC
70 #define IMX_FEC_BASE ENET_BASE_ADDR
71 #define CONFIG_FEC_XCV_TYPE RGMII
72 #define CONFIG_ETHPRIME "FEC"
73 #define CONFIG_FEC_MXC_PHYADDR 4
76 #define CONFIG_PHY_ATHEROS
80 #define CONFIG_SPI_FLASH
81 #define CONFIG_SPI_FLASH_SST
82 #define CONFIG_MXC_SPI
83 #define CONFIG_SF_DEFAULT_BUS 0
84 #define CONFIG_SF_DEFAULT_CS 0
85 #define CONFIG_SF_DEFAULT_SPEED 20000000
86 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
89 /* allow to overwrite serial and ethaddr */
90 #define CONFIG_ENV_OVERWRITE
91 #define CONFIG_CONS_INDEX 1
92 #define CONFIG_BAUDRATE 115200
94 /* Command definition */
95 #undef CONFIG_CMD_FPGA
97 #define CONFIG_CMD_BMODE
98 #define CONFIG_CMD_SETEXPR
100 #define CONFIG_ARP_TIMEOUT 200UL
102 /* Miscellaneous configurable options */
103 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
104 #define CONFIG_SYS_CBSIZE 256
106 /* Print Buffer Size */
107 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
108 #define CONFIG_SYS_MAXARGS 16
109 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
111 #define CONFIG_SYS_MEMTEST_START 0x10000000
112 #define CONFIG_SYS_MEMTEST_END 0x10010000
113 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
115 #define CONFIG_STACKSIZE (128 * 1024)
117 /* Physical Memory Map */
118 #define CONFIG_NR_DRAM_BANKS 1
119 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
121 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
122 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
123 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
125 #define CONFIG_SYS_INIT_SP_OFFSET \
126 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
127 #define CONFIG_SYS_INIT_SP_ADDR \
128 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
130 /* Environment organization */
131 #define CONFIG_ENV_SIZE (8 * 1024)
133 #if defined(CONFIG_ENV_IS_IN_MMC)
135 #define CONFIG_DEFAULT_FDT_FILE "imx6dl-riotboard.dtb"
136 #define CONFIG_SYS_FSL_USDHC_NUM 3
137 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */
138 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
139 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
140 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
142 #define CONFIG_DEFAULT_FDT_FILE "imx6q-marsboard.dtb"
143 #define CONFIG_SYS_FSL_USDHC_NUM 2
144 #define CONFIG_ENV_OFFSET (768 * 1024)
145 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
146 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
147 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
148 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
149 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
152 #ifndef CONFIG_SYS_DCACHE_OFF
153 #define CONFIG_CMD_CACHE
158 #define CONFIG_VIDEO_IPUV3
159 #define CONFIG_CFB_CONSOLE
160 #define CONFIG_VGA_AS_SINGLE_DEVICE
161 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
162 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
163 #define CONFIG_VIDEO_BMP_RLE8
164 #define CONFIG_SPLASH_SCREEN
165 #define CONFIG_SPLASH_SCREEN_ALIGN
166 #define CONFIG_BMP_16BPP
167 #define CONFIG_VIDEO_LOGO
168 #define CONFIG_VIDEO_BMP_LOGO
169 #define CONFIG_IPUV3_CLK 260000000
170 #define CONFIG_IMX_HDMI
171 #define CONFIG_IMX_VIDEO_SKIP
173 #include <config_distro_defaults.h>
175 #endif /* __RIOTBOARD_CONFIG_H */