2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
12 #define CONFIG_SYS_GENERIC_BOARD
13 #define CONFIG_MXC_GPIO
15 #include <asm/arch/imx-regs.h>
17 #define CONFIG_DISPLAY_CPUINFO
18 #define CONFIG_BOARD_EARLY_INIT_F
19 #define CONFIG_REVISION_TAG
20 #define CONFIG_SYS_NO_FLASH
24 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
29 #include <config_cmd_default.h>
30 #define CONFIG_DISPLAY_BOARDINFO
31 #define CONFIG_DOS_PARTITION
32 #define CONFIG_FAT_WRITE
34 #define CONFIG_CMD_ASKENV
35 #define CONFIG_CMD_BMP
36 #define CONFIG_CMD_DATE
37 #define CONFIG_CMD_DHCP
38 #define CONFIG_CMD_EXT4
39 #define CONFIG_CMD_EXT4_WRITE
40 #define CONFIG_CMD_FAT
41 #define CONFIG_CMD_FS_GENERIC
42 #define CONFIG_CMD_GREPENV
43 #define CONFIG_CMD_I2C
44 #define CONFIG_CMD_MII
45 #define CONFIG_CMD_MMC
46 #define CONFIG_CMD_NAND
47 #define CONFIG_CMD_NET
48 #define CONFIG_CMD_PING
49 #define CONFIG_CMD_SATA
50 #define CONFIG_CMD_SETEXPR
51 #define CONFIG_CMD_USB
56 * Memory configurations
58 #define CONFIG_NR_DRAM_BANKS 2
59 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
60 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
61 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
62 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
63 #define PHYS_SDRAM_SIZE (gd->ram_size)
64 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
65 #define CONFIG_SYS_MEMTEST_START 0x70000000
66 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
68 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
69 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
70 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
72 #define CONFIG_SYS_INIT_SP_OFFSET \
73 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
74 #define CONFIG_SYS_INIT_SP_ADDR \
75 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
77 #define CONFIG_SYS_TEXT_BASE 0x71000000
80 * U-Boot general configurations
82 #define CONFIG_SYS_LONGHELP
83 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
84 #define CONFIG_SYS_PBSIZE \
85 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
86 /* Print buffer size */
87 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
88 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
89 /* Boot argument buffer size */
90 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
91 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
92 #define CONFIG_CMDLINE_EDITING /* Command history etc */
93 #define CONFIG_SYS_HUSH_PARSER
98 #define CONFIG_MXC_UART
99 #define CONFIG_MXC_UART_BASE UART2_BASE
100 #define CONFIG_CONS_INDEX 1
101 #define CONFIG_BAUDRATE 115200
106 #ifdef CONFIG_CMD_MMC
108 #define CONFIG_GENERIC_MMC
109 #define CONFIG_FSL_ESDHC
110 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
111 #define CONFIG_SYS_FSL_ESDHC_NUM 1
117 #define CONFIG_ENV_SIZE (16 * 1024)
118 #ifdef CONFIG_CMD_NAND
119 #define CONFIG_SYS_MAX_NAND_DEVICE 1
120 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
121 #define CONFIG_NAND_MXC
122 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
123 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
124 #define CONFIG_SYS_NAND_LARGEPAGE
125 #define CONFIG_MXC_NAND_HWECC
126 #define CONFIG_SYS_NAND_USE_FLASH_BBT
128 /* Environment is in NAND */
129 #define CONFIG_ENV_IS_IN_NAND
130 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
131 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
132 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
133 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
134 #define CONFIG_ENV_OFFSET_REDUND \
135 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
137 #define CONFIG_CMD_UBI
138 #define CONFIG_CMD_UBIFS
139 #define CONFIG_CMD_MTDPARTS
140 #define CONFIG_RBTREE
142 #define CONFIG_MTD_DEVICE
143 #define CONFIG_MTD_PARTITIONS
144 #define MTDIDS_DEFAULT "nand0=mxc_nand"
145 #define MTDPARTS_DEFAULT \
146 "mtdparts=mxc_nand:" \
154 #define CONFIG_ENV_IS_NOWHERE
158 * Ethernet on SOC (FEC)
160 #ifdef CONFIG_CMD_NET
161 #define CONFIG_FEC_MXC
162 #define IMX_FEC_BASE FEC_BASE_ADDR
163 #define CONFIG_FEC_MXC_PHYADDR 0x0
165 #define CONFIG_DISCOVER_PHY
166 #define CONFIG_FEC_XCV_TYPE RMII
167 #define CONFIG_PHYLIB
168 #define CONFIG_PHY_MICREL
169 #define CONFIG_ETHPRIME "FEC0"
175 #ifdef CONFIG_CMD_I2C
176 #define CONFIG_SYS_I2C
177 #define CONFIG_SYS_I2C_MXC
178 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
179 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
185 #ifdef CONFIG_CMD_DATE
186 #define CONFIG_RTC_M41T62
187 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
188 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
194 #ifdef CONFIG_CMD_USB
195 #define CONFIG_USB_EHCI
196 #define CONFIG_USB_EHCI_MX5
197 #define CONFIG_USB_STORAGE
198 #define CONFIG_USB_HOST_ETHER
199 #define CONFIG_USB_ETHER_ASIX
200 #define CONFIG_USB_ETHER_MCS7830
201 #define CONFIG_USB_ETHER_SMSC95XX
202 #define CONFIG_MXC_USB_PORT 1
203 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
204 #define CONFIG_MXC_USB_FLAGS 0
210 #ifdef CONFIG_CMD_SATA
211 #define CONFIG_DWC_AHSATA
212 #define CONFIG_SYS_SATA_MAX_DEVICE 1
213 #define CONFIG_DWC_AHSATA_PORT_ID 0
214 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
216 #define CONFIG_LIBATA
223 #define CONFIG_VIDEO_IPUV3
224 #define CONFIG_CFB_CONSOLE
225 #define CONFIG_VGA_AS_SINGLE_DEVICE
226 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
227 #define CONFIG_VIDEO_BMP_RLE8
228 #define CONFIG_VIDEO_BMP_GZIP
229 #define CONFIG_SPLASH_SCREEN
230 #define CONFIG_SPLASHIMAGE_GUARD
231 #define CONFIG_SPLASH_SCREEN_ALIGN
232 #define CONFIG_BMP_16BPP
233 #define CONFIG_VIDEO_LOGO
234 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
235 #define CONFIG_IPUV3_CLK 200000000
241 #define CONFIG_CMDLINE_TAG
242 #define CONFIG_INITRD_TAG
243 #define CONFIG_REVISION_TAG
244 #define CONFIG_SETUP_MEMORY_TAGS
245 #define CONFIG_BOOTDELAY 3
246 #define CONFIG_BOOTFILE "fitImage"
247 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
248 #define CONFIG_LOADADDR 0x70800000
249 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
250 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
251 #define CONFIG_OF_LIBFDT
256 #define CONFIG_SPL_FRAMEWORK
257 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
258 #define CONFIG_SPL_BOARD_INIT
259 #define CONFIG_SPL_TEXT_BASE 0x70008000
260 #define CONFIG_SPL_PAD_TO 0x8000
261 #define CONFIG_SPL_STACK 0x70004000
262 #define CONFIG_SPL_GPIO_SUPPORT
263 #define CONFIG_SPL_LIBCOMMON_SUPPORT
264 #define CONFIG_SPL_LIBGENERIC_SUPPORT
265 #define CONFIG_SPL_NAND_SUPPORT
266 #define CONFIG_SPL_SERIAL_SUPPORT
268 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
269 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
270 #define CONFIG_SYS_NAND_OOBSIZE 64
271 #define CONFIG_SYS_NAND_PAGE_COUNT 64
272 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
273 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
278 #define CONFIG_PREBOOT "run try_bootscript"
279 #define CONFIG_HOSTNAME m53evk
281 #define CONFIG_EXTRA_ENV_SETTINGS \
282 "consdev=ttymxc1\0" \
283 "baudrate=115200\0" \
284 "bootscript=boot.scr\0" \
285 "bootdev=/dev/mmcblk0p1\0" \
286 "rootdev=/dev/mmcblk0p2\0" \
288 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
289 "kernel_addr_r=0x72000000\0" \
291 "setenv bootargs ${bootargs} " \
292 "console=${consdev},${baudrate}\0" \
294 "setenv bootargs ${bootargs} " \
295 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
296 "${netmask}:${hostname}:${netdev}:off\0" \
298 "setenv bootargs ${bootargs} ${miscargs}\0" \
300 "if test \"x${mtdparts}\" == \"x\" ; then " \
301 "mtdparts default ; " \
304 "run adddfltmtd ; " \
305 "setenv bootargs ${bootargs} ${mtdparts}\0" \
306 "addargs=run addcons addmtd addmisc\0" \
309 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
311 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
312 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
314 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
315 "miscargs=nohlt panic=1\0" \
316 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
318 "setenv bootargs ubi.mtd=5 " \
319 "root=ubi0:rootfs rootfstype=ubifs\0" \
321 "setenv bootargs root=/dev/nfs rw " \
322 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
324 "run mmcload mmcargs addargs ; " \
325 "bootm ${kernel_addr_r}\0" \
327 "run mmcload ubiargs addargs ; " \
328 "bootm ${kernel_addr_r}\0" \
330 "run mmcload nfsargs addip addargs ; " \
331 "bootm ${kernel_addr_r}\0" \
333 "run ubiload mmcargs addargs ; " \
334 "bootm ${kernel_addr_r}\0" \
336 "run ubiload ubiargs addargs ; " \
337 "bootm ${kernel_addr_r}\0" \
339 "run ubiload nfsargs addip addargs ; " \
340 "bootm ${kernel_addr_r}\0" \
342 "run netload mmcargs addargs ; " \
343 "bootm ${kernel_addr_r}\0" \
345 "run netload ubiargs addargs ; " \
346 "bootm ${kernel_addr_r}\0" \
348 "run netload nfsargs addip addargs ; " \
349 "bootm ${kernel_addr_r}\0" \
352 "if test -e mmc 0:1 ${bootscript} ; then " \
353 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
355 "echo Running bootscript... ; " \
356 "source ${kernel_addr_r} ; " \
360 #endif /* __M53EVK_CONFIG_H__ */