+cgtqmx6qeval arm armv7 cgtqmx6eval congatec mx6 cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q
+tx51-6xx0 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=600,NR_DRAM_BANKS=1,SYS_SDRAM_CLK=166
+tx51-6xx1 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=600,NR_DRAM_BANKS=2,SYS_SDRAM_CLK=200
+tx51-6xx2 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=600,NR_DRAM_BANKS=2,SYS_SDRAM_CLK=166
+tx51-8xx0 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=1,SYS_SDRAM_CLK=166
+tx51-8xx1 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=2,SYS_SDRAM_CLK=200
+tx51-8xx2 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=2,SYS_SDRAM_CLK=166
+tx53-xx30 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=1
+tx53-xx31 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=2
+tx6u-8xx0 arm armv7 tx6 karo mx6 tx6:MX6DL
+tx6u-8xx0_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG
+tx6u-8xx0_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE
+tx6u-8xx1 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32
+tx6u-8xx1_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG
+tx6u-8xx1_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE
+tx6q-1xx0 arm armv7 tx6 karo mx6 tx6:MX6Q
+tx6q-1xx0_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG
+tx6q-1xx0_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE