powerpc/mpc85xx: Add definitions for HDBCR registers

[karo-tx-uboot.git] / arch / powerpc / cpu / mpc85xx / start.S

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 7912a4b2496e5437404fec01231ddef3c2790804..2ce5505e00e0cc823afe4723b162832406ad7b5c 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -44,6 +44,15 @@
 #undef MSR_KERNEL
 #define MSR_KERNEL ( MSR_ME )  /* Machine Check */
 
+#if defined(CONFIG_NAND_SPL) || \
+       (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL))
+#define MINIMAL_SPL
+#endif
+
+#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
+#define NOR_BOOT
+#endif
+
 /*
  * Set up GOT: Global Offset Table
  *
@@ -53,7 +62,7 @@
        GOT_ENTRY(_GOT2_TABLE_)
        GOT_ENTRY(_FIXUP_TABLE_)
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
        GOT_ENTRY(_start)
        GOT_ENTRY(_start_of_vectors)
        GOT_ENTRY(_end_of_vectors)
@@ -61,7 +70,7 @@
 #endif
 
        GOT_ENTRY(__init_end)
-       GOT_ENTRY(__bss_end__)
+       GOT_ENTRY(__bss_end)
        GOT_ENTRY(__bss_start)
        END_GOT
 
@@ -107,10 +116,10 @@ _start_e500:
        /* Erratum says set bits 55:60 to 001001 */
        msync
        isync
-       mfspr   r3,976
+       mfspr   r3,SPRN_HDBCR0
        li      r4,0x48
        rlwimi  r3,r4,0,0x1f8
-       mtspr   976,r3
+       mtspr   SPRN_HDBCR0,r3
        isync
 2:
 #endif
@@ -282,11 +291,8 @@ l2_disabled:
        isync
        .endm
 
-/*
- * Ne need to setup interrupt vector for NAND SPL
- * because NAND SPL never compiles it.
- */
-#if !defined(CONFIG_NAND_SPL)
+/* Interrupt vectors do not fit in minimal SPL. */
+#if !defined(MINIMAL_SPL)
        /* Setup interrupt vectors */
        lis     r1,CONFIG_SYS_MONITOR_BASE@h
        mtspr   IVPR,r1
@@ -366,9 +372,9 @@ l2_disabled:
 #endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_CPU_A003999
-       mfspr   r3,977
+       mfspr   r3,SPRN_HDBCR1
        oris    r3,r3,0x0100
-       mtspr   977,r3
+       mtspr   SPRN_HDBCR1,r3
 #endif
 
        /* Enable Branch Prediction */
@@ -443,7 +449,7 @@ nexti:      mflr    r1              /* R1 = our PC */
 
        /* Set the size of the TLB to 4KB */
        mfspr   r3, MAS1
-       li      r2, 0xF00
+       li      r2, 0xF80
        andc    r3, r3, r2      /* Clear the TSIZE bits */
        ori     r3, r3, MAS1_TSIZE(BOOKE_PAGESZ_4K)@l
        oris    r3, r3, MAS1_IPROT@h
@@ -518,7 +524,7 @@ nexti:      mflr    r1              /* R1 = our PC */
  * in AS1.
  */
 
-#if !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
+#ifdef NOR_BOOT
 /*
  * TLB entry is created for IVPR + IVOR15 to map on valid OP code address
  * bacause flash's virtual address maps to 0xff800000 - 0xffffffff.
@@ -1032,7 +1038,7 @@ create_init_ram_area:
        lis     r6,FSL_BOOKE_MAS0(1, 15, 0)@h
        ori     r6,r6,FSL_BOOKE_MAS0(1, 15, 0)@l
 
-#if !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
+#ifdef NOR_BOOT
        /* create a temp mapping in AS=1 to the 4M boot window */
        create_tlb1_entry 15, \
                1, BOOKE_PAGESZ_4M, \
@@ -1046,8 +1052,8 @@ create_init_ram_area:
        */
        create_tlb1_entry 15, \
                1, BOOKE_PAGESZ_1M, \
-               CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
-               CONFIG_SYS_PBI_FLASH_WINDOW, MAS3_SX|MAS3_SW|MAS3_SR, \
+               CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \
+               CONFIG_SYS_PBI_FLASH_WINDOW & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
                0, r6
 #else
        /*
@@ -1056,8 +1062,8 @@ create_init_ram_area:
         */
        create_tlb1_entry 15, \
                1, BOOKE_PAGESZ_1M, \
-               CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
-               CONFIG_SYS_MONITOR_BASE, MAS3_SX|MAS3_SW|MAS3_SR, \
+               CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \
+               CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
                0, r6
 #endif
 
@@ -1107,7 +1113,8 @@ switch_as:
        bdnz    1b
 
        /* Jump out the last 4K page and continue to 'normal' start */
-#ifdef CONFIG_SYS_RAMBOOT
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
+       /* We assume that we're already running at the address we're linked at */
        b       _start_cont
 #else
        /* Calculate absolute address in FLASH and jump there           */
@@ -1153,7 +1160,7 @@ _start_cont:
 
        /* NOTREACHED - board_init_f() does not return */
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
        . = EXC_OFF_SYS_RESET
        .globl  _start_of_vectors
 _start_of_vectors:
@@ -1597,7 +1604,7 @@ in32:
 in32r:
        lwbrx   r3,r0,r3
        blr
-#endif  /* !CONFIG_NAND_SPL */
+#endif  /* !MINIMAL_SPL */
 
 /*------------------------------------------------------------------------------*/
 
@@ -1777,7 +1784,7 @@ clear_bss:
         * Now clear BSS segment
         */
        lwz     r3,GOT(__bss_start)
-       lwz     r4,GOT(__bss_end__)
+       lwz     r4,GOT(__bss_end)
 
        cmplw   0,r3,r4
        beq     6f
@@ -1794,7 +1801,7 @@ clear_bss:
        mr      r4,r10          /* Destination Address          */
        bl      board_init_r
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
        /*
         * Copy exception vector code to low memory
         *
@@ -1967,4 +1974,4 @@ setup_ivors:
 
 #include "fixed_ivor.S"
        blr
-#endif /* !CONFIG_NAND_SPL */
+#endif /* !MINIMAL_SPL */