*/
#include <common.h>
-
-#ifdef CONFIG_PCI
-
#include <command.h>
-#include <cmd_boot.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <cmd_pci.h>
#include <pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_PCI)
-
-extern int cmd_get_data_size(char* arg, int default_size);
-
unsigned char ShortPCIListing = 1;
/*
* Subroutine: pciinfo
*
* Description: Show information about devices on PCI bus.
- * Depending on the define CFG_SHORT_PCI_LISTING
+ * Depending on the define CONFIG_SYS_SHORT_PCI_LISTING
* the output will be more or less exhaustive.
*
* Inputs: bus_no the number of the bus to be scanned.
}
}
-char* pci_classes_str(u8 class)
+static char *pci_classes_str(u8 class)
{
switch (class) {
- case PCI_CLASS_NOT_DEFINED:
- return "Build before PCI Rev2.0";
- break;
- case PCI_BASE_CLASS_STORAGE:
- return "Mass storage controller";
- break;
- case PCI_BASE_CLASS_NETWORK:
- return "Network controller ";
- break;
- case PCI_BASE_CLASS_DISPLAY:
- return "Display controller ";
- break;
- case PCI_BASE_CLASS_MULTIMEDIA:
- return "Multimedia device ";
- break;
- case PCI_BASE_CLASS_MEMORY:
- return "Memory controller ";
- break;
- case PCI_BASE_CLASS_BRIDGE:
- return "Bridge device ";
- break;
- case PCI_BASE_CLASS_COMMUNICATION:
- return "Simple comm. controller";
- break;
- case PCI_BASE_CLASS_SYSTEM:
- return "Base system peripheral ";
- break;
- case PCI_BASE_CLASS_INPUT:
- return "Input device ";
- break;
- case PCI_BASE_CLASS_DOCKING:
- return "Docking station ";
- break;
- case PCI_BASE_CLASS_PROCESSOR:
- return "Processor ";
- break;
- case PCI_BASE_CLASS_SERIAL:
- return "Serial bus controller ";
- break;
- case PCI_BASE_CLASS_INTELLIGENT:
- return "Intelligent controller ";
- break;
- case PCI_BASE_CLASS_SATELLITE:
- return "Satellite controller ";
- break;
- case PCI_BASE_CLASS_CRYPT:
- return "Cryptographic device ";
- break;
- case PCI_BASE_CLASS_SIGNAL_PROCESSING:
- return "DSP ";
- break;
- case PCI_CLASS_OTHERS:
- return "Does not fit any class ";
- break;
- default:
- return "??? ";
- break;
+ case PCI_CLASS_NOT_DEFINED:
+ return "Build before PCI Rev2.0";
+ break;
+ case PCI_BASE_CLASS_STORAGE:
+ return "Mass storage controller";
+ break;
+ case PCI_BASE_CLASS_NETWORK:
+ return "Network controller";
+ break;
+ case PCI_BASE_CLASS_DISPLAY:
+ return "Display controller";
+ break;
+ case PCI_BASE_CLASS_MULTIMEDIA:
+ return "Multimedia device";
+ break;
+ case PCI_BASE_CLASS_MEMORY:
+ return "Memory controller";
+ break;
+ case PCI_BASE_CLASS_BRIDGE:
+ return "Bridge device";
+ break;
+ case PCI_BASE_CLASS_COMMUNICATION:
+ return "Simple comm. controller";
+ break;
+ case PCI_BASE_CLASS_SYSTEM:
+ return "Base system peripheral";
+ break;
+ case PCI_BASE_CLASS_INPUT:
+ return "Input device";
+ break;
+ case PCI_BASE_CLASS_DOCKING:
+ return "Docking station";
+ break;
+ case PCI_BASE_CLASS_PROCESSOR:
+ return "Processor";
+ break;
+ case PCI_BASE_CLASS_SERIAL:
+ return "Serial bus controller";
+ break;
+ case PCI_BASE_CLASS_INTELLIGENT:
+ return "Intelligent controller";
+ break;
+ case PCI_BASE_CLASS_SATELLITE:
+ return "Satellite controller";
+ break;
+ case PCI_BASE_CLASS_CRYPT:
+ return "Cryptographic device";
+ break;
+ case PCI_BASE_CLASS_SIGNAL_PROCESSING:
+ return "DSP";
+ break;
+ case PCI_CLASS_OTHERS:
+ return "Does not fit any class";
+ break;
+ default:
+ return "???";
+ break;
};
}
* Subroutine: pci_header_show_brief
*
* Description: Reads and prints the header of the
- * specified PCI device in short form.
+ * specified PCI device in short form.
*
* Inputs: dev Bus+Device+Function number
*
pci_read_config_byte(dev, PCI_CLASS_CODE, &class);
pci_read_config_byte(dev, PCI_CLASS_SUB_CODE, &subclass);
- printf("0x%.4x 0x%.4x %s 0x%.2x\n",
+ printf("0x%.4x 0x%.4x %-23s 0x%.2x\n",
vendor, device,
pci_classes_str(class), subclass);
}
PRINT (" status register = 0x%.4x\n", word, PCI_STATUS);
PRINT (" revision ID = 0x%.2x\n", byte, PCI_REVISION_ID);
PRINT2(" class code = 0x%.2x (%s)\n", byte, PCI_CLASS_CODE,
- pci_classes_str);
+ pci_classes_str);
PRINT (" sub class code = 0x%.2x\n", byte, PCI_CLASS_SUB_CODE);
PRINT (" programming interface = 0x%.2x\n", byte, PCI_CLASS_PROG);
PRINT (" cache line = 0x%.2x\n", byte, PCI_CACHE_LINE_SIZE);
PRINT (" min Grant = 0x%.2x\n", byte, PCI_MIN_GNT);
PRINT (" max Latency = 0x%.2x\n", byte, PCI_MAX_LAT);
break;
-
+
case PCI_HEADER_TYPE_BRIDGE: /* PCI-to-PCI bridge */
PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
PRINT (" primary bus number = 0x%.2x\n", byte, PCI_CB_PRIMARY_BUS);
PRINT (" CardBus number = 0x%.2x\n", byte, PCI_CB_CARD_BUS);
PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_CB_SUBORDINATE_BUS);
- PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER);
+ PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER);
PRINT (" CardBus memory base 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_0);
PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_0);
PRINT (" CardBus memory base 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_1);
PRINT (" subdevice ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_ID);
PRINT (" PC Card 16bit base address = 0x%.8x\n", dword, PCI_CB_LEGACY_MODE_BASE);
break;
-
+
default:
printf("unknown header\n");
- break;
+ break;
}
#undef PRINT
* pci modify[.b, .w, .l] bus.device.function [addr]
* pci write[.b, .w, .l] bus.device.function addr value
*/
-int do_pci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pci (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr = 0, value = 0, size = 0;
pci_dev_t bdf = 0;
if ((bdf = get_pci_dev(argv[2])) == -1)
return 1;
break;
+#ifdef CONFIG_CMD_PCI_ENUM
+ case 'e':
+ break;
+#endif
default: /* scan bus */
value = 1; /* short listing */
bdf = 0; /* bus number */
return 0;
case 'd': /* display */
return pci_cfg_display(bdf, addr, size, value);
+#ifdef CONFIG_CMD_PCI_ENUM
+ case 'e':
+ pci_init();
+ return 0;
+#endif
case 'n': /* next */
if (argc < 4)
goto usage;
return 1;
usage:
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
+ return cmd_usage(cmdtp);
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_PCI) */
+/***************************************************/
-#endif /* CONFIG_PCI */
+
+U_BOOT_CMD(
+ pci, 5, 1, do_pci,
+ "list and access PCI Configuration Space",
+ "[bus] [long]\n"
+ " - short or long list of PCI devices on bus 'bus'\n"
+#ifdef CONFIG_CMD_PCI_ENUM
+ "pci enum\n"
+ " - re-enumerate PCI buses\n"
+#endif
+ "pci header b.d.f\n"
+ " - show header of PCI device 'bus.device.function'\n"
+ "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n"
+ " - display PCI configuration space (CFG)\n"
+ "pci next[.b, .w, .l] b.d.f address\n"
+ " - modify, read and keep CFG address\n"
+ "pci modify[.b, .w, .l] b.d.f address\n"
+ " - modify, auto increment CFG address\n"
+ "pci write[.b, .w, .l] b.d.f address value\n"
+ " - write to CFG address"
+);
projects / karo-tx-uboot.git / blobdiff