* (C) Copyright 2002-2004
* Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
*
- * Copyright (C) 2003, 2006 Arabella Software Ltd.
+ * Copyright (C) 2003 Arabella Software Ltd.
* Yuli Barcohen <yuli@arabellasw.com>
- * Modified to work with AMD flashes
- * Added support for byte lanes swap
- * Added support for 32-bit chips consisting of two 16-bit devices
- * (for example, S70GL256M00)
*
* Copyright (C) 2004
* Ed Okerson
- * Modified to work with little-endian systems.
+ *
+ * Copyright (C) 2006
+ * Tolunay Orkun <listmember@orkun.us>
*
* See file CREDITS for list of people who contributed to this
* project.
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
- * History
- * 01/20/2004 - combined variants of original driver.
- * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
- * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
- * 01/27/2004 - Little endian support Ed Okerson
- *
- * Tested Architectures
- * Port Width Chip Width # of banks Flash Chip Board
- * 32 16 1 28F128J3 seranoa/eagle
- * 64 16 1 28F128J3 seranoa/falcon
- *
*/
/* The DEBUG define must be before common to enable debugging */
/* #define DEBUG */
#include <common.h>
-
-#ifdef CFG_FLASH_CFI_DRIVER
-
-#include <watchdog.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <asm/byteorder.h>
#include <environment.h>
+#ifdef CFG_FLASH_CFI_DRIVER
/*
* This file implements a Common Flash Interface (CFI) driver for U-Boot.
* The width of the port and the width of the chips are determined at initialization.
* These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
*
* References
* JEDEC Standard JESD68 - Common Flash Interface (CFI)
* JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
* Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
* Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
+ * AMD CFI Specification, Release 2.0 December 1, 2001
+ * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
+ * Device IDs, Publication Number 25538 Revision A, November 8, 2001
*
- * TODO
- *
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
- * Table (ALT) to determine if protection is available
- *
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
+ * define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
+ * reading and writing ... (yes there is such a Hardware).
*/
-#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
-#define CFG_FLASH_CFI_SWAP
-#endif
-
#ifndef CFG_FLASH_BANKS_LIST
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
#endif
#define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
#define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
+#define FLASH_OFFSET_MANUFACTURER_ID 0x00
+#define FLASH_OFFSET_DEVICE_ID 0x01
+#define FLASH_OFFSET_DEVICE_ID2 0x0E
+#define FLASH_OFFSET_DEVICE_ID3 0x0F
#define FLASH_OFFSET_CFI 0x55
+#define FLASH_OFFSET_CFI_ALT 0x555
#define FLASH_OFFSET_CFI_RESP 0x10
#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */
#define FLASH_OFFSET_USER_PROTECTION 0x85
#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-#define FLASH_MAN_CFI 0x01000000
-
-#define CFI_CMDSET_NONE 0
-#define CFI_CMDSET_INTEL_EXTENDED 1
-#define CFI_CMDSET_AMD_STANDARD 2
-#define CFI_CMDSET_INTEL_STANDARD 3
-#define CFI_CMDSET_AMD_EXTENDED 4
-#define CFI_CMDSET_MITSU_STANDARD 256
-#define CFI_CMDSET_MITSU_EXTENDED 257
-#define CFI_CMDSET_SST 258
-
+#define CFI_CMDSET_NONE 0
+#define CFI_CMDSET_INTEL_EXTENDED 1
+#define CFI_CMDSET_AMD_STANDARD 2
+#define CFI_CMDSET_INTEL_STANDARD 3
+#define CFI_CMDSET_AMD_EXTENDED 4
+#define CFI_CMDSET_MITSU_STANDARD 256
+#define CFI_CMDSET_MITSU_EXTENDED 257
+#define CFI_CMDSET_SST 258
#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
# undef FLASH_CMD_RESET
-# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
+# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
#endif
-
typedef union {
unsigned char c;
unsigned short w;
volatile unsigned long long *llp;
} cfiptr_t;
-#define NUM_ERASE_REGIONS 4
+#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
+
+static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT};
/* use CFG_MAX_FLASH_BANKS_DETECT if defined */
#ifdef CFG_MAX_FLASH_BANKS_DETECT
static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
+static void flash_read_jedec_ids (flash_info_t * info);
static int flash_detect_cfi (flash_info_t * info);
static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
uchar *cp;
cp = flash_make_addr (info, 0, offset);
-#if defined(CFG_FLASH_CFI_SWAP)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
return (cp[0]);
#else
return (cp[info->portwidth - 1]);
debug ("addr[%x] = 0x%x\n", x, addr[x]);
}
#endif
-#if defined(CFG_FLASH_CFI_SWAP)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
retval = ((addr[(info->portwidth)] << 8) | addr[0]);
#else
retval = ((addr[(2 * info->portwidth) - 1] << 8) |
}
/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
+ * read a long word by picking the least significant byte of each maximum
* port size word. Swap for ppc format.
*/
ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
debug ("addr[%x] = 0x%x\n", x, addr[x]);
}
#endif
-#if defined(CFG_FLASH_CFI_SWAP)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
(addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
#else
if (flash_info[i].flash_id == FLASH_UNKNOWN) {
#ifndef CFG_FLASH_QUIET_TEST
printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, flash_info[i].size, flash_info[i].size << 20);
+ i+1, flash_info[i].size, flash_info[i].size << 20);
#endif /* CFG_FLASH_QUIET_TEST */
}
#ifdef CFG_FLASH_PROTECTION
(info->portwidth << 3), (info->chipwidth << 3));
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
- printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
+ printf (" ");
+ switch (info->vendor) {
+ case CFI_CMDSET_INTEL_STANDARD:
+ printf ("Intel Standard");
+ break;
+ case CFI_CMDSET_INTEL_EXTENDED:
+ printf ("Intel Extended");
+ break;
+ case CFI_CMDSET_AMD_STANDARD:
+ printf ("AMD Standard");
+ break;
+ case CFI_CMDSET_AMD_EXTENDED:
+ printf ("AMD Extended");
+ break;
+ default:
+ printf ("Unknown (%d)", info->vendor);
+ break;
+ }
+ printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
+ info->manufacturer_id, info->device_id);
+ if (info->device_id == 0x7E) {
+ printf("%04X", info->device_id2);
+ }
+ printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
info->erase_blk_tout,
- info->write_tout,
+ info->write_tout);
+ if (info->buffer_size > 1) {
+ printf (" Buffer write timeout: %ld ms, buffer size: %d bytes\n",
info->buffer_write_tout,
info->buffer_size);
+ }
- puts (" Sector Start Addresses:");
+ puts ("\n Sector Start Addresses:");
for (i = 0; i < info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf ("\n");
#ifdef CFG_FLASH_EMPTY_INFO
int k;
int size;
}
}
- if ((i % 5) == 0)
- printf ("\n");
/* print empty and read-only info */
- printf (" %08lX%s%s",
+ printf (" %08lX %c %s ",
info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
+ erased ? 'E' : ' ',
+ info->protect[i] ? "RO" : " ");
#else /* ! CFG_FLASH_EMPTY_INFO */
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
+ printf (" %08lX %s ",
+ info->start[i],
+ info->protect[i] ? "RO" : " ");
#endif
}
putc ('\n');
*/
static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
{
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
unsigned short w;
unsigned int l;
unsigned long long ll;
cword->c = c;
break;
case FLASH_CFI_16BIT:
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
w = c;
w <<= 8;
cword->w = (cword->w >> 8) | w;
#endif
break;
case FLASH_CFI_32BIT:
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
l = c;
l <<= 24;
cword->l = (cword->l >> 8) | l;
#endif
break;
case FLASH_CFI_64BIT:
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
ll = c;
ll <<= 56;
cword->ll = (cword->ll >> 8) | ll;
int i;
uchar *cp = (uchar *) cmdbuf;
-#if defined(CFG_FLASH_CFI_SWAP)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
for (i = info->portwidth; i > 0; i--)
#else
for (i = 1; i <= info->portwidth; i++)
#endif
*cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
-#ifdef CFG_FLASH_CFI_2x16
- if ((info->portwidth == FLASH_CFI_32BIT) && (info->chipwidth == FLASH_CFI_BY16))
- {
- uchar tmp;
- cp = (uchar *) cmdbuf;
- tmp = cp[1];
- cp[1] = cp[2];
- cp[2] = tmp;
- }
-#endif /* CFG_FLASH_CFI_2x16 */
}
/*
debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.cp = cword.c;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_16BIT:
debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
cmd, cword.w,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.wp = cword.w;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_32BIT:
debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
cmd, cword.l,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.lp = cword.l;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_64BIT:
#ifdef DEBUG
}
#endif
*addr.llp = cword.ll;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
}
+
+ /* Ensure all the instructions are fully finished */
+ sync();
}
static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
return retval;
}
+/*-----------------------------------------------------------------------
+ * read jedec ids from device and set corresponding fields in info struct
+ *
+ * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
+ *
+*/
+static void flash_read_jedec_ids (flash_info_t * info)
+{
+ info->manufacturer_id = 0;
+ info->device_id = 0;
+ info->device_id2 = 0;
+
+ switch (info->vendor) {
+ case CFI_CMDSET_INTEL_STANDARD:
+ case CFI_CMDSET_INTEL_EXTENDED:
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+ flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
+ udelay(1000); /* some flash are slow to respond */
+ info->manufacturer_id = flash_read_uchar (info,
+ FLASH_OFFSET_MANUFACTURER_ID);
+ info->device_id = flash_read_uchar (info,
+ FLASH_OFFSET_DEVICE_ID);
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+ break;
+ case CFI_CMDSET_AMD_STANDARD:
+ case CFI_CMDSET_AMD_EXTENDED:
+ flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+ flash_unlock_seq(info, 0);
+ flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
+ udelay(1000); /* some flash are slow to respond */
+ info->manufacturer_id = flash_read_uchar (info,
+ FLASH_OFFSET_MANUFACTURER_ID);
+ info->device_id = flash_read_uchar (info,
+ FLASH_OFFSET_DEVICE_ID);
+ if (info->device_id == 0x7E) {
+ /* AMD 3-byte (expanded) device ids */
+ info->device_id2 = flash_read_uchar (info,
+ FLASH_OFFSET_DEVICE_ID2);
+ info->device_id2 <<= 8;
+ info->device_id2 |= flash_read_uchar (info,
+ FLASH_OFFSET_DEVICE_ID3);
+ }
+ flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+ break;
+ default:
+ break;
+ }
+}
+
/*-----------------------------------------------------------------------
* detect if flash is compatible with the Common Flash Interface (CFI)
* http://www.jedec.org/download/search/jesd68.pdf
*/
static int flash_detect_cfi (flash_info_t * info)
{
+ int cfi_offset;
debug ("flash detect cfi\n");
for (info->portwidth = CFG_FLASH_CFI_WIDTH;
info->chipwidth <= info->portwidth;
info->chipwidth <<= 1) {
flash_write_cmd (info, 0, 0, info->cmd_reset);
- flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
- && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
- && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
- info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
- debug ("device interface is %d\n",
- info->interface);
- debug ("found port %d chip %d ",
- info->portwidth, info->chipwidth);
- debug ("port %d bits chip %d bits\n",
- info->portwidth << CFI_FLASH_SHIFT_WIDTH,
- info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
- return 1;
+ for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) {
+ flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI);
+ if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
+ && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
+ && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
+ info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
+ info->cfi_offset=flash_offset_cfi[cfi_offset];
+ debug ("device interface is %d\n",
+ info->interface);
+ debug ("found port %d chip %d ",
+ info->portwidth, info->chipwidth);
+ debug ("port %d bits chip %d bits\n",
+ info->portwidth << CFI_FLASH_SHIFT_WIDTH,
+ info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+ return 1;
+ }
}
}
}
uchar num_erase_regions;
int erase_region_size;
int erase_region_count;
+ int geometry_reversed = 0;
+
+ info->ext_addr = 0;
+ info->cfi_version = 0;
#ifdef CFG_FLASH_PROTECTION
- int ext_addr;
info->legacy_unlock = 0;
#endif
info->start[0] = base;
if (flash_detect_cfi (info)) {
- info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
+ info->vendor = flash_read_ushort (info, 0,
+ FLASH_OFFSET_PRIMARY_VENDOR);
+ flash_read_jedec_ids (info);
+ flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
+ num_erase_regions = flash_read_uchar (info,
+ FLASH_OFFSET_NUM_ERASE_REGIONS);
+ info->ext_addr = flash_read_ushort (info, 0,
+ FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
+ if (info->ext_addr) {
+ info->cfi_version = (ushort) flash_read_uchar (info,
+ info->ext_addr + 3) << 8;
+ info->cfi_version |= (ushort) flash_read_uchar (info,
+ info->ext_addr + 4);
+ }
#ifdef DEBUG
flash_printqry (info, 0);
#endif
info->cmd_reset = FLASH_CMD_RESET;
#ifdef CFG_FLASH_PROTECTION
/* read legacy lock/unlock bit from intel flash */
- ext_addr = flash_read_ushort (info, 0,
- FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
- info->legacy_unlock =
- flash_read_uchar (info, ext_addr + 5) & 0x08;
+ if (info->ext_addr) {
+ info->legacy_unlock = flash_read_uchar (info,
+ info->ext_addr + 5) & 0x08;
+ }
#endif
break;
case CFI_CMDSET_AMD_STANDARD:
case CFI_CMDSET_AMD_EXTENDED:
info->cmd_reset = AMD_CMD_RESET;
+ /* check if flash geometry needs reversal */
+ if (num_erase_regions <= 1)
+ break;
+ /* reverse geometry if top boot part */
+ if (info->cfi_version < 0x3131) {
+ /* CFI < 1.1, try to guess from device id */
+ if ((info->device_id & 0x80) != 0) {
+ geometry_reversed = 1;
+ }
+ break;
+ }
+ /* CFI >= 1.1, deduct from top/bottom flag */
+ /* note: ext_addr is valid since cfi_version > 0 */
+ if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
+ geometry_reversed = 1;
+ }
break;
}
debug ("manufacturer is %d\n", info->vendor);
+ debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
+ debug ("device id is 0x%x\n", info->device_id);
+ debug ("device id2 is 0x%x\n", info->device_id2);
+ debug ("cfi version is 0x%04x\n", info->cfi_version);
+
size_ratio = info->portwidth / info->chipwidth;
/* if the chip is x8/x16 reduce the ratio by half */
if ((info->interface == FLASH_CFI_X8X16)
&& (info->chipwidth == FLASH_CFI_BY8)) {
size_ratio >>= 1;
}
- num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
debug ("size_ratio %d port %d bits chip %d bits\n",
size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
num_erase_regions, NUM_ERASE_REGIONS);
break;
}
- tmp = flash_read_long (info, 0,
+ if (geometry_reversed)
+ tmp = flash_read_long (info, 0,
+ FLASH_OFFSET_ERASE_REGIONS +
+ (num_erase_regions - 1 - i) * 4);
+ else
+ tmp = flash_read_long (info, 0,
FLASH_OFFSET_ERASE_REGIONS +
i * 4);
erase_region_size =
ctladdr.cp = flash_make_addr (info, 0, 0);
cptr.cp = (uchar *) dest;
-
/* Check if Flash is (sufficiently) erased */
switch (info->portwidth) {
case FLASH_CFI_8BIT:
}
}
#endif /* CFG_FLASH_USE_BUFFER_WRITE */
+
#endif /* CFG_FLASH_CFI */
projects / karo-tx-uboot.git / blobdiff