arm: mx5: clock: add support for changing CPU clock via cmdline

[karo-tx-uboot.git] / include / configs / MPC8308RDB.h

diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 7f2761c5391f2b72ab5d64930bb1d646dcb18664..d315729b8b1089837a2a654bb2a2d3300bfe22b9 100644 (file)
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -3,23 +3,7 @@
  * Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
  *
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -30,6 +14,7 @@
  */
 #define CONFIG_E300            1 /* E300 family */
 #define CONFIG_MPC83xx         1 /* MPC83xx family */
+#define CONFIG_MPC830x         1 /* MPC830x family */
 #define CONFIG_MPC8308         1 /* MPC8308 CPU specific */
 #define CONFIG_MPC8308RDB      1 /* MPC8308RDB board specific */
 
@@ -37,6 +22,24 @@
 
 #define CONFIG_MISC_INIT_R
 
+/* new uImage format support */
+#define CONFIG_FIT                     1
+#define CONFIG_FIT_VERBOSE             1
+
+#define CONFIG_MMC     1
+
+#ifdef CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_SYS_FSL_ESDHC_USE_PIO
+
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
 /*
  * On-board devices
  *
@@ -331,15 +334,29 @@
 #define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
 /* I2C */
-#define CONFIG_HARD_I2C                /* I2C with hardware support */
-#define CONFIG_FSL_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_SPEED   400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE   0x7F
-#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x51} } /* Don't probe these addrs */
-#define CONFIG_SYS_I2C_OFFSET  0x3000
-#define CONFIG_SYS_I2C2_OFFSET 0x3100
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
+#define CONFIG_SYS_FSL_I2C2_SPEED      400000
+#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
+#define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
+#define CONFIG_SYS_I2C_NOPROBES                { {0, 0x51} }
+
+/*
+ * SPI on header J8
+ *
+ * WARNING: enabling this will break TSEC2 (connected to the Vitesse switch)
+ * due to a pinmux conflict between GPIO9 (SPI chip select )and the TSEC2 pins.
+ */
+#ifdef CONFIG_MPC8XXX_SPI
+#define CONFIG_CMD_SPI
+#define CONFIG_USE_SPIFLASH
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_CMD_SF
+#endif
 
 /*
  * Board info - revision and where boot from
@@ -370,6 +387,7 @@
 #define CONFIG_SYS_SCCR_PCIEXP1CM      1
 
 #define CONFIG_PCI
+#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCIE
 
 #define CONFIG_PCI_PNP         /* do pci plug-and-play */
@@ -525,9 +543,6 @@
 
 #define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 
-#define xstr(s)        str(s)
-#define str(s) #s
-
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
        "netdev=eth0\0"                                                 \
        "consoledev=ttyS0\0"                                            \
@@ -561,10 +576,10 @@
                "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
        "bootcmd=run flash_self\0"                                      \
        "load=tftp ${loadaddr} ${u-boot}\0"                             \
-       "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE)             \
-               " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE)      \
+       "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
+               " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
                " +${filesize};cp.b ${fileaddr} "                       \
-               xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"          \
+               __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"   \
        "upd=run load update\0"                                         \
 
 #endif /* __CONFIG_H */