Merge branch 'master' of git://www.denx.de/git/u-boot-coldfire

[karo-tx-uboot.git] / include / configs / MPC8541CDS.h

diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 5f12eeecc518e7d7eef4465baeffadf68992688f..7334088b18fedf696512e57ec62fcee00a691b01 100644 (file)
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -47,6 +47,7 @@
 #define CONFIG_DDR_ECC                 /* only for ECC DDR module */
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 
+#define CONFIG_FSL_LAW         1       /* Use common FSL init code */
 
 /*
  * When initializing flash, if we cannot find the manufacturer ID,
@@ -309,16 +310,9 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 /* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE    1
-#define CONFIG_OF_BOARD_SETUP  1
-
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE  8192
-
-#define OF_CPU                 "PowerPC,8541@0"
-#define OF_SOC                 "soc8541@e0000000"
-#define OF_TBCLK               (bd->bi_busfreq / 8)
-#define OF_STDOUT_PATH         "/soc8541@e0000000/serial@4600"
+#define CONFIG_OF_LIBFDT               1
+#define CONFIG_OF_BOARD_SETUP          1
+#define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
 /*
  * I2C
@@ -350,6 +344,13 @@ extern unsigned long get_clock_freq(void);
 #define CFG_PCI2_IO_PHYS       0xe2100000
 #define CFG_PCI2_IO_SIZE       0x100000        /* 1M */
 
+#ifdef CONFIG_LEGACY
+#define BRIDGE_ID 17
+#define VIA_ID 2
+#else
+#define BRIDGE_ID 28
+#define VIA_ID 4
+#endif
 
 #if defined(CONFIG_PCI)
 
@@ -377,13 +378,12 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_TSEC1_NAME      "TSEC0"
 #define CONFIG_TSEC2   1
 #define CONFIG_TSEC2_NAME      "TSEC1"
-#undef CONFIG_MPC85XX_FEC
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
-#define FEC_PHY_ADDR           3
 #define TSEC1_PHYIDX           0
 #define TSEC2_PHYIDX           0
-#define FEC_PHYIDX             0
+#define TSEC1_FLAGS            TSEC_GIGABIT
+#define TSEC2_FLAGS            TSEC_GIGABIT
 
 /* Options are: TSEC[0-1] */
 #define CONFIG_ETHPRIME                "TSEC0"
@@ -401,6 +401,15 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download */
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change */
 
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
 /*
  * Command line configuration.
  */
@@ -409,6 +418,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_MII
+#define CONFIG_CMD_ELF
 
 #if defined(CONFIG_PCI)
     #define CONFIG_CMD_PCI
@@ -421,6 +431,7 @@ extern unsigned long get_clock_freq(void);
  * Miscellaneous configurable options
  */
 #define CFG_LONGHELP                   /* undef to save memory */
+#define CONFIG_CMDLINE_EDITING         /* Command-line editing */
 #define CFG_LOAD_ADDR  0x2000000       /* default load address */
 #define CFG_PROMPT     "=> "           /* Monitor Command Prompt */
 #if defined(CONFIG_CMD_KGDB)
@@ -440,13 +451,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE        32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *
@@ -466,6 +470,7 @@ extern unsigned long get_clock_freq(void);
 
 /* The mac addresses for all ethernet interface */
 #if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
 #define CONFIG_ETHADDR   00:E0:0C:00:00:FD
 #define CONFIG_HAS_ETH1
 #define CONFIG_ETH1ADDR  00:E0:0C:00:01:FD