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ARM: dts: imx6qdl: add support for Ka-Ro TX6 modules
[karo-tx-linux.git] / arch / arm / boot / dts / imx6qdl-tx6.dtsi
1 /*
2  * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 #include <dt-bindings/gpio/gpio.h>
13
14 / {
15         aliases {
16                 can1 = &can1;
17                 display = &display;
18                 ethernet0 = &fec;
19                 lcdif_23bit_pins_a = &tx6_pinctrl_disp0_1;
20                 lcdif_24bit_pins_a = &tx6_pinctrl_disp0_2;
21                 lvds0 = &lvds0;
22                 lvds1 = &lvds1;
23                 stk5led = &user_led;
24                 usbotg = &usbotg;
25         };
26
27         chosen {
28                 bootargs = "init=/linuxrc console=ttymxc0,115200 root=/dev/mtdblock3 rootfstype=jffs2 ro debug panic=1";
29         };
30
31         memory {
32                 reg = <0 0>; /* will be filled by U-Boot */
33         };
34
35         clocks {
36                 #address-cells = <1>;
37                 #size-cells = <0>;
38                 mclk: codec_clock {
39                         compatible = "fixed-clock";
40                         reg = <0>;
41                         #clock-cells = <0>;
42                         clock-frequency = <27000000>;
43                 };
44         };
45
46         backlight@0 {
47                 compatible = "pwm-backlight";
48                 pwms = <&pwm2 0 500000>;
49                 power-supply = <&reg_3v3>;
50                 /*
51                  * a poor man's way to create a 1:1 relationship between
52                  * the PWM value and the actual duty cycle
53                  */
54                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
55                                      10 11 12 13 14 15 16 17 18 19
56                                      20 21 22 23 24 25 26 27 28 29
57                                      30 31 32 33 34 35 36 37 38 39
58                                      40 41 42 43 44 45 46 47 48 49
59                                      50 51 52 53 54 55 56 57 58 59
60                                      60 61 62 63 64 65 66 67 68 69
61                                      70 71 72 73 74 75 76 77 78 79
62                                      80 81 82 83 84 85 86 87 88 89
63                                      90 91 92 93 94 95 96 97 98 99
64                                     100>;
65                 default-brightness-level = <50>;
66         };
67
68         backlight@1 {
69                 compatible = "pwm-backlight";
70                 pwms = <&pwm1 0 500000>;
71                 power-supply = <&reg_3v3>;
72                 /*
73                  * a poor man's way to create a 1:1 relationship between
74                  * the PWM value and the actual duty cycle
75                  */
76                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
77                                      10 11 12 13 14 15 16 17 18 19
78                                      20 21 22 23 24 25 26 27 28 29
79                                      30 31 32 33 34 35 36 37 38 39
80                                      40 41 42 43 44 45 46 47 48 49
81                                      50 51 52 53 54 55 56 57 58 59
82                                      60 61 62 63 64 65 66 67 68 69
83                                      70 71 72 73 74 75 76 77 78 79
84                                      80 81 82 83 84 85 86 87 88 89
85                                      90 91 92 93 94 95 96 97 98 99
86                                     100>;
87                 default-brightness-level = <50>;
88                 status = "disabled";
89         };
90
91         display: display@di0 {
92                 compatible = "fsl,imx-parallel-display";
93                 crtcs = <&ipu1 0>;
94                 interface-pix-fmt = "rgb24";
95                 pinctrl-names = "default";
96                 pinctrl-0 = <&tx6_pinctrl_disp0_1>;
97                 status = "okay";
98
99                 display-timings {
100                         VGA {
101                                 clock-frequency = <25200000>;
102                                 hactive = <640>;
103                                 vactive = <480>;
104                                 hback-porch = <48>;
105                                 hsync-len = <96>;
106                                 hfront-porch = <16>;
107                                 vback-porch = <31>;
108                                 vsync-len = <2>;
109                                 vfront-porch = <12>;
110                                 hsync-active = <0>;
111                                 vsync-active = <0>;
112                                 de-active = <1>;
113                                 pixelclk-active = <0>;
114                         };
115
116                         ETV570 {
117                                 clock-frequency = <25200000>;
118                                 hactive = <640>;
119                                 vactive = <480>;
120                                 hback-porch = <114>;
121                                 hsync-len = <30>;
122                                 hfront-porch = <16>;
123                                 vback-porch = <32>;
124                                 vsync-len = <3>;
125                                 vfront-porch = <10>;
126                                 hsync-active = <0>;
127                                 vsync-active = <0>;
128                                 de-active = <1>;
129                                 pixelclk-active = <0>;
130                         };
131
132                         ET0350 {
133                                 clock-frequency = <6413760>;
134                                 hactive = <320>;
135                                 vactive = <240>;
136                                 hback-porch = <34>;
137                                 hsync-len = <34>;
138                                 hfront-porch = <20>;
139                                 vback-porch = <15>;
140                                 vsync-len = <3>;
141                                 vfront-porch = <4>;
142                                 hsync-active = <0>;
143                                 vsync-active = <0>;
144                                 de-active = <1>;
145                                 pixelclk-active = <0>;
146                         };
147
148                         ET0430 {
149                                 clock-frequency = <9009000>;
150                                 hactive = <480>;
151                                 vactive = <272>;
152                                 hback-porch = <2>;
153                                 hsync-len = <41>;
154                                 hfront-porch = <2>;
155                                 vback-porch = <2>;
156                                 vsync-len = <10>;
157                                 vfront-porch = <2>;
158                                 hsync-active = <0>;
159                                 vsync-active = <0>;
160                                 de-active = <1>;
161                                 pixelclk-active = <1>;
162                         };
163
164                         ET0500 {
165                                 clock-frequency = <33264000>;
166                                 hactive = <800>;
167                                 vactive = <480>;
168                                 hback-porch = <88>;
169                                 hsync-len = <128>;
170                                 hfront-porch = <40>;
171                                 vback-porch = <33>;
172                                 vsync-len = <2>;
173                                 vfront-porch = <10>;
174                                 hsync-active = <0>;
175                                 vsync-active = <0>;
176                                 de-active = <1>;
177                                 pixelclk-active = <0>;
178                         };
179
180                         ET0700 { /* same as ET0500 */
181                                 clock-frequency = <33264000>;
182                                 hactive = <800>;
183                                 vactive = <480>;
184                                 hback-porch = <88>;
185                                 hsync-len = <128>;
186                                 hfront-porch = <40>;
187                                 vback-porch = <33>;
188                                 vsync-len = <2>;
189                                 vfront-porch = <10>;
190                                 hsync-active = <0>;
191                                 vsync-active = <0>;
192                                 de-active = <1>;
193                                 pixelclk-active = <0>;
194                         };
195
196                         ETQ570 {
197                                 clock-frequency = <6596040>;
198                                 hactive = <320>;
199                                 vactive = <240>;
200                                 hback-porch = <38>;
201                                 hsync-len = <30>;
202                                 hfront-porch = <30>;
203                                 vback-porch = <16>;
204                                 vsync-len = <3>;
205                                 vfront-porch = <4>;
206                                 hsync-active = <0>;
207                                 vsync-active = <0>;
208                                 de-active = <1>;
209                                 pixelclk-active = <0>;
210                         };
211                 };
212         };
213
214         gpio-keys {
215                 compatible = "gpio-keys";
216
217                 power {
218                         label = "Power Button";
219                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
220                         linux,code = <116>; /* KEY_POWER */
221                         gpio-key,wakeup;
222                 };
223         };
224
225         leds {
226                 compatible = "gpio-leds";
227
228                 user_led: user {
229                         label = "Heartbeat";
230                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
231                         linux,default-trigger = "heartbeat";
232                 };
233         };
234
235         regulators {
236                 compatible = "simple-bus";
237
238                 reg_3v3_etn: 3v3-etn {
239                         compatible = "regulator-fixed";
240                         regulator-name = "3V3_ETN";
241                         regulator-min-microvolt = <3300000>;
242                         regulator-max-microvolt = <3300000>;
243                         gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
244                         enable-active-high;
245                 };
246
247                 reg_2v5: 2v5 {
248                         compatible = "regulator-fixed";
249                         regulator-name = "2V5";
250                         regulator-min-microvolt = <2500000>;
251                         regulator-max-microvolt = <2500000>;
252                         regulator-always-on;
253                 };
254
255                 reg_3v3: 3v3 {
256                         compatible = "regulator-fixed";
257                         regulator-name = "3V3";
258                         regulator-min-microvolt = <3300000>;
259                         regulator-max-microvolt = <3300000>;
260                         regulator-always-on;
261                 };
262
263                 reg_can_xcvr: can-xcvr {
264                         compatible = "regulator-fixed";
265                         regulator-name = "CAN XCVR";
266                         regulator-min-microvolt = <3300000>;
267                         regulator-max-microvolt = <3300000>;
268                         gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
269                         enable-active-low;
270                         pinctrl-names = "default";
271                         pinctrl-0 = <&pinctrl_tx6qdl_flexcan_xcvr>;
272                 };
273
274                 reg_lcd_pwr0: lcd-power@0 {
275                         compatible = "regulator-fixed";
276                         regulator-name = "LCD POWER";
277                         regulator-min-microvolt = <3300000>;
278                         regulator-max-microvolt = <3300000>;
279                         gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
280                         enable-active-high;
281                         regulator-boot-on;
282                 };
283
284                 reg_lcd_pwr1: lcd-power@1 {
285                         compatible = "regulator-fixed";
286                         regulator-name = "LCD POWER";
287                         regulator-min-microvolt = <3300000>;
288                         regulator-max-microvolt = <3300000>;
289                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
290                         enable-active-high;
291                         regulator-boot-on;
292                 };
293
294                 reg_lcd_reset: lcd-reset {
295                         compatible = "regulator-fixed";
296                         regulator-name = "LCD RESET";
297                         regulator-min-microvolt = <3300000>;
298                         regulator-max-microvolt = <3300000>;
299                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
300                         startup-delay-us = <300000>;
301                         enable-active-high;
302                         regulator-always-on;
303                         regulator-boot-on;
304                 };
305
306                 reg_usbh1_vbus: usbh1_vbus {
307                         compatible = "regulator-fixed";
308                         regulator-name = "usbh1_vbus";
309                         regulator-min-microvolt = <5000000>;
310                         regulator-max-microvolt = <5000000>;
311                         gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
312                         enable-active-high;
313                 };
314
315                 reg_usbotg_vbus: usbotg_vbus {
316                         compatible = "regulator-fixed";
317                         regulator-name = "usbotg_vbus";
318                         regulator-min-microvolt = <5000000>;
319                         regulator-max-microvolt = <5000000>;
320                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
321                         enable-active-high;
322                 };
323         };
324
325         sound {
326                 compatible = "fsl,imx6qdl-tx6qdl-sgtl5000",
327                              "fsl,imx-audio-sgtl5000";
328                 model = "sgtl5000-audio";
329                 pinctrl-names = "default";
330                 pinctrl-0 = <&pinctrl_audmux_5>;
331                 ssi-controller = <&ssi1>;
332                 audio-codec = <&sgtl5000>;
333                 audio-routing =
334                         "MIC_IN", "Mic Jack",
335                         "Mic Jack", "Mic Bias",
336                         "Headphone Jack", "HP_OUT";
337                 mux-int-port = <1>;
338                 mux-ext-port = <5>;
339         };
340 };
341
342 &audmux {
343         status = "okay";
344 };
345
346 &can1 {
347         pinctrl-names = "default";
348         pinctrl-0 = <&pinctrl_flexcan1_3>;
349         xceiver-supply = <&reg_can_xcvr>;
350
351         status = "okay";
352 };
353
354 &can2 {
355         pinctrl-names = "default";
356         pinctrl-0 = <&pinctrl_flexcan2_1>;
357         xceiver-supply = <&reg_can_xcvr>;
358
359         status = "okay";
360 };
361
362 &fec {
363         pinctrl-names = "default";
364         pinctrl-0 = <&pinctrl_enet_4>;
365         phy-mode = "rmii";
366         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
367         phy-supply = <&reg_3v3_etn>;
368         status = "okay";
369 };
370
371 &gpmi {
372         pinctrl-names = "default";
373         pinctrl-0 = <&pinctrl_tx6_gpmi_nand>;
374         nand-on-flash-bbt;
375         status = "okay";
376 };
377
378 &i2c1 {
379         pinctrl-names = "default";
380         pinctrl-0 = <&pinctrl_i2c1_1>;
381         clock-frequency = <400000>;
382         status = "okay";
383
384         ds1339: rtc@68 {
385                 compatible = "dallas,ds1339";
386                 reg = <0x68>;
387         };
388 };
389
390 &i2c3 {
391         pinctrl-names = "default";
392         pinctrl-0 = <&pinctrl_i2c3_2>;
393         clock-frequency = <400000>;
394         status = "okay";
395
396         touchscreen: tsc2007@48 {
397                 compatible = "ti,tsc2007";
398                 reg = <0x48>;
399                 pinctrl-names = "default";
400                 pinctrl-0 = <&pinctrl_tsc2007_1>;
401                 interrupt-parent = <&gpio3>;
402                 interrupts = <26 0>;
403                 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
404                 ti,x-plate-ohms = <660>;
405                 linux,wakeup;
406         };
407
408         polytouch: edt-ft5x06@38 {
409                 compatible = "edt,edt-ft5x06";
410                 reg = <0x38>;
411                 pinctrl-names = "default";
412                 pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
413                 interrupt-parent = <&gpio6>;
414                 interrupts = <15 0>;
415                 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
416                 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
417         };
418
419         sgtl5000: sgtl5000@0a {
420                 compatible = "fsl,sgtl5000";
421                 reg = <0x0a>;
422                 VDDA-supply = <&reg_2v5>;
423                 VDDIO-supply = <&reg_3v3>;
424                 clocks = <&mclk>;
425         };
426 };
427
428 &iomuxc {
429         pinctrl-names = "default";
430         pinctrl-0 = <&pinctrl_hog>;
431
432         display {
433                 tx6_pinctrl_disp0_1: disp0grp-1 {
434                         fsl,pins = <
435                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
436                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
437                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
438                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
439                                 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */
440                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
441                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
442                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
443                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
444                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
445                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
446                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
447                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
448                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
449                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
450                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
451                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
452                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
453                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
454                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
455                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
456                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
457                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
458                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
459                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
460                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
461                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
462                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
463                         >;
464                 };
465
466                 tx6_pinctrl_disp0_2: disp0grp-2 {
467                         fsl,pins = <
468                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
469                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
470                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
471                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
472                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
473                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
474                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
475                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
476                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
477                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
478                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
479                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
480                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
481                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
482                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
483                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
484                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
485                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
486                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
487                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
488                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
489                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
490                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
491                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
492                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
493                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
494                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
495                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
496                         >;
497                 };
498         };
499
500         flexcan {
501                 pinctrl_tx6qdl_flexcan_xcvr: flexcan-xcvrgrp-1 {
502                         fsl,pins = <
503                                 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
504                         >;
505                 };
506         };
507
508         hog {
509                 pinctrl_hog: hoggrp {
510                         fsl,pins = <
511                                 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
512                                 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
513                                 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
514                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT
515                                 MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x1b0b0 /* SD1 CD */
516                                 MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x1b0b0 /* SD2 CD */
517                                 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
518                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
519                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
520                         >;
521                 };
522         };
523
524         kpp {
525                 pinctrl_kpp: kppgrp {
526                         fsl,pins = <
527                                 MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1
528                                 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1
529                                 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1
530                                 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1
531
532                                 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1
533                                 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1
534                                 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1
535                                 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1
536                         >;
537                 };
538         };
539
540         nand {
541                 pinctrl_tx6_gpmi_nand: tx6-gpmi-nand {
542                         fsl,pins = <
543                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
544                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
545                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
546                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
547                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
548                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
549                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
550                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
551                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
552                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
553                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
554                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
555                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
556                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
557                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
558                         >;
559                 };
560         };
561
562         touchpanel {
563                 pinctrl_tsc2007_1: tsc2007grp-1 {
564                         fsl,pins = <
565                                 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */
566                         >;
567                 };
568
569                 pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
570                         fsl,pins = <
571                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */
572                                 MX6QDL_PAD_EIM_A16__GPIO2_IO22   0x1b0b0 /* Reset */
573                                 MX6QDL_PAD_EIM_A17__GPIO2_IO21   0x1b0b0 /* Wake */
574                         >;
575                 };
576         };
577
578         usbh1 {
579                 pinctrl_tx6_usbh1_vbus: tx6-usbh1-vbusgrp {
580                         fsl,pins = <
581                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */
582                         >;
583                 };
584         };
585
586         usbotg {
587                 pinctrl_tx6_usbotg: tx6-usbotggrp {
588                         fsl,pins = <
589                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059
590                         >;
591                 };
592
593                 pinctrl_tx6_usbotg_vbus: tx6-usbotg-vbusgrp {
594                         fsl,pins = <
595                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */
596                         >;
597                 };
598         };
599 };
600
601 &kpp {
602         pinctrl-names = "default";
603         pinctrl-0 = <&pinctrl_kpp>;
604         /* sample keymap */
605         /* row/col 0,1 are mapped to KPP row/col 6,7 */
606         linux,keymap = <
607                 0x06060074 /* row 6, col 6, KEY_POWER */
608                 0x06070052 /* row 6, col 7, KEY_KP0 */
609                 0x0602004f /* row 6, col 2, KEY_KP1 */
610                 0x06030050 /* row 6, col 3, KEY_KP2 */
611                 0x07060051 /* row 7, col 6, KEY_KP3 */
612                 0x0707004b /* row 7, col 7, KEY_KP4 */
613                 0x0702004c /* row 7, col 2, KEY_KP5 */
614                 0x0703004d /* row 7, col 3, KEY_KP6 */
615                 0x02060047 /* row 2, col 6, KEY_KP7 */
616                 0x02070048 /* row 2, col 7, KEY_KP8 */
617                 0x02020049 /* row 2, col 2, KEY_KP9 */
618         >;
619 };
620
621 &ldb {
622         status = "okay";
623
624         lvds0: lvds-channel@0 {
625                 fsl,data-mapping = "spwg";
626                 fsl,data-width = <18>;
627                 status = "okay";
628
629                 display-timings {
630                         native-mode = <&lvds_timing0>;
631                         lvds_timing0: hsd100pxn1 {
632                                 clock-frequency = <65000000>;
633                                 hactive = <1024>;
634                                 vactive = <768>;
635                                 hback-porch = <220>;
636                                 hfront-porch = <40>;
637                                 vback-porch = <21>;
638                                 vfront-porch = <7>;
639                                 hsync-len = <60>;
640                                 vsync-len = <10>;
641                         };
642                 };
643         };
644
645         lvds1: lvds-channel@1 {
646                 fsl,data-mapping = "spwg";
647                 fsl,data-width = <18>;
648                 status = "okay";
649
650                 display-timings {
651                         native-mode = <&lvds_timing1>;
652                         lvds_timing1: hsd100pxn1 {
653                                 clock-frequency = <65000000>;
654                                 hactive = <1024>;
655                                 vactive = <768>;
656                                 hback-porch = <220>;
657                                 hfront-porch = <40>;
658                                 vback-porch = <21>;
659                                 vfront-porch = <7>;
660                                 hsync-len = <60>;
661                                 vsync-len = <10>;
662                         };
663                 };
664         };
665 };
666
667 &pwm1 {
668         pinctrl-names = "default";
669         pinctrl-0 = <&pinctrl_pwm1_2>;
670         status = "okay";
671 };
672
673 &pwm2 {
674         pinctrl-names = "default";
675         pinctrl-0 = <&pinctrl_pwm2_1>;
676         status = "okay";
677 };
678
679 &ssi1 {
680         fsl,mode = "i2s-slave";
681         status = "okay";
682 };
683
684 &uart1 {
685         pinctrl-names = "default";
686         pinctrl-0 = <&pinctrl_uart1_2>;
687         status = "okay";
688 };
689
690 &uart2 {
691         pinctrl-names = "default";
692         pinctrl-0 = <&pinctrl_uart2_3 &pinctrl_uart2_rtscts_3>;
693         status = "okay";
694 };
695
696 &uart3 {
697         pinctrl-names = "default";
698         pinctrl-0 = <&pinctrl_uart3_3 &pinctrl_uart3_rtscts_3>;
699         status = "okay";
700 };
701
702 &usbh1 {
703         vbus-supply = <&reg_usbh1_vbus>;
704         pinctrl-names = "default";
705         pinctrl-0 = <&pinctrl_tx6_usbh1_vbus>;
706         dr_mode = "host";
707         disable-over-current;
708         status = "okay";
709 };
710
711 &usbotg {
712         vbus-supply = <&reg_usbotg_vbus>;
713         pinctrl-names = "default";
714         pinctrl-0 = <&pinctrl_tx6_usbotg &pinctrl_tx6_usbotg_vbus>;
715         dr_mode = "peripheral";
716         disable-over-current;
717         status = "okay";
718 };
719
720 &usdhc1 {
721         pinctrl-names = "default";
722         pinctrl-0 = <&pinctrl_usdhc1_2>;
723         cd-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
724         status = "okay";
725 };
726
727 &usdhc2 {
728         pinctrl-names = "default";
729         pinctrl-0 = <&pinctrl_usdhc2_2>;
730         cd-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
731         status = "okay";
732 };