1 //==========================================================================
3 // devs/eth/mn10300/asb2305/include/mn10300_asb2305_eth.inl
5 // ASB2305 ethernet I/O definitions.
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
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40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
43 // Author(s): dhowells
46 // Purpose: ASB2305 ethernet defintions
47 //####DESCRIPTIONEND####
48 //==========================================================================
50 #include <cyg/hal/hal_intr.h> // CYGNUM_HAL_INTERRUPT_ETHR
54 #define CYGHWR_AMD_PCNET_PCI_MEM_MAP_BASE CYGARC_UNCACHED_ADDRESS((cyg_uint32)(&CYGMEM_SECTION_pci_window[0]))
55 #define CYGHWR_AMD_PCNET_PCI_MEM_MAP_SIZE ((cyg_uint32)(CYGMEM_SECTION_pci_window_SIZE))
57 #endif // __WANT_CONFIG
62 #ifdef CYGPKG_DEVS_ETH_MN10300_ASB2305_ETH0
64 static pcnet_priv_data amd_pcnet_eth0_priv_data = {
65 #ifdef CYGSEM_DEVS_ETH_MN10300_ASB2305_ETH0_SET_ESA
66 esa : CYGDAT_DEVS_ETH_MN10300_ASB2305_ETH0_ESA,
69 hardwired_esa : false,
73 rx_ring_cnt : (1<<2) /*CYGNUM_DEVS_ETH_MN10300_ASB2305_ETH0_RX_RING_SIZE*/,
76 tx_ring_cnt : (1<<2) /*CYGNUM_DEVS_ETH_MN10300_ASB2305_ETH0_TX_RING_SIZE*/,
80 ETH_DRV_SC(amd_pcnet_sc,
81 &amd_pcnet_eth0_priv_data, // Driver specific data
82 CYGDAT_DEVS_ETH_MN10300_ASB2305_ETH0_NAME,
89 pcnet_deliver, // "pseudoDSR" called from fast net thread
90 pcnet_poll, // poll function, encapsulates ISR and DSR
93 NETDEVTAB_ENTRY(pcnet_netdev,
94 "pcnet_" CYGDAT_DEVS_ETH_MN10300_ASB2305_ETH0_NAME,
97 #endif // CYGPKG_DEVS_ETH_MN10300_ASB2305_ETH0
99 // These arrays are used for sanity checking of pointers
100 struct pcnet_priv_data *
101 pcnet_priv_array[CYGNUM_DEVS_ETH_AMD_PCNET_DEV_COUNT] = {
102 #ifdef CYGPKG_DEVS_ETH_MN10300_ASB2305_ETH0
103 &amd_pcnet_eth0_priv_data,
107 #endif // __WANT_DEVS
109 // EOF mn10300_asb2305_eth.inl