1 #ifndef CYGONCE_DEVS_FLASH_ATMEL_AT49XXXX_PARTS_INL
2 #define CYGONCE_DEVS_FLASH_ATMEL_AT49XXXX_PARTS_INL
3 //==========================================================================
7 // Atmel AT49xxxx series part descriptions
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14 // Copyright (C) 2003 Jonathan Larmour
15 // Copyright (C) 2003 Gary Thomas
17 // eCos is free software; you can redistribute it and/or modify it under
18 // the terms of the GNU General Public License as published by the Free
19 // Software Foundation; either version 2 or (at your option) any later version.
21 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
22 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
23 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 // You should have received a copy of the GNU General Public License along
27 // with eCos; if not, write to the Free Software Foundation, Inc.,
28 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
30 // As a special exception, if other files instantiate templates or use macros
31 // or inline functions from this file, or you compile this file and link it
32 // with other works to produce a work based on this file, this file does not
33 // by itself cause the resulting work to be covered by the GNU General Public
34 // License. However the source code for this file must still be made available
35 // in accordance with section (3) of the GNU General Public License.
37 // This exception does not invalidate any other reasons why a work based on
38 // this file might be covered by the GNU General Public License.
40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
43 //==========================================================================
44 //#####DESCRIPTIONBEGIN####
46 // Author(s): jlarmour,Jani Monoses <jani@iv.ro>
47 // Contributors: Jani Monoses <jani@iv.ro>, Cristian Vlasin <cris@iv.ro>, tdrury
50 // Purpose: Should be included from the flash_at49xxxx.inl file only.
51 // Description: Atmel AT49xxxx part descriptions
53 // FIXME: Add configury for selecting bottom/top bootblocks
54 //####DESCRIPTIONEND####
56 //==========================================================================
59 // Note: 'bootblocks' are a set of blocks which are treated by
60 // the driver as a single larger block. This simplifies the driver
61 // so as to only have to deal with single size blocks (even though
62 // the physical device may differ). The data structure is laid out as:
63 // <address of start of boot block area 1>
64 // <size of sub-block 1>
65 // <size of sub-block 2>
67 // <size of sub-block n>
68 // <address of start of boot block area 2>
69 // <size of sub-block 1>
70 // <size of sub-block 2>
72 // <size of sub-block n>
75 // Finally, when specifying a device with bootblocks, the total number
76 // of blocks should reflect this collapse, i.e. if the device has 15
77 // full size blocks and 8 blocks which are 1/8 each, then the total
78 // should be 16 blocks.
80 #define _LAST_BOOTBLOCK (-1)
82 // Platform code must define the below
83 // #define CYGNUM_FLASH_INTERLEAVE : Number of interleaved devices (in parallel)
84 // #define CYGNUM_FLASH_SERIES : Number of devices in series
85 // #define CYGNUM_FLASH_WIDTH : Width of devices on platform
86 // #define CYGNUM_FLASH_BASE : Address of first device
87 // And select one of the below device variants
89 #if defined(CYGPKG_DEVS_FLASH_ATMEL_AT49LV040)
91 // Note: this device is not terribly useful for anything other than a bootstrap device
92 // as it is only 512KB and has only one erase block.
95 device_id : FLASHWORD(0x13),
96 block_size : 0x80000 * CYGNUM_FLASH_INTERLEAVE,
98 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
99 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
105 #if defined(CYGHWR_DEVS_FLASH_ATMEL_AT49LV8011) || \
106 defined(CYGHWR_DEVS_FLASH_ATMEL_AT49BV8011)
108 // the following ID is true for both 8 and 16 bit CYGNUM_FLASH_WIDTH
109 device_id : FLASHWORD(0xCB),
110 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
112 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
113 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
115 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
116 0x004000 * CYGNUM_FLASH_INTERLEAVE,
117 0x008000 * CYGNUM_FLASH_INTERLEAVE,
118 0x002000 * CYGNUM_FLASH_INTERLEAVE,
119 0x002000 * CYGNUM_FLASH_INTERLEAVE,
120 0x002000 * CYGNUM_FLASH_INTERLEAVE,
121 0x002000 * CYGNUM_FLASH_INTERLEAVE,
122 0x008000 * CYGNUM_FLASH_INTERLEAVE,
123 0x004000 * CYGNUM_FLASH_INTERLEAVE,
128 #if defined(CYGHWR_DEVS_FLASH_ATMEL_AT49LV8011T) || \
129 defined(CYGHWR_DEVS_FLASH_ATMEL_AT49BV8011T)
131 // the following ID is true for both 8 and 16 bit CYGNUM_FLASH_WIDTH
132 device_id : FLASHWORD(0x4A),
133 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
135 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
136 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
138 bootblocks : { 0x0E0000 * CYGNUM_FLASH_INTERLEAVE,
139 0x004000 * CYGNUM_FLASH_INTERLEAVE,
140 0x008000 * CYGNUM_FLASH_INTERLEAVE,
141 0x002000 * CYGNUM_FLASH_INTERLEAVE,
142 0x002000 * CYGNUM_FLASH_INTERLEAVE,
143 0x002000 * CYGNUM_FLASH_INTERLEAVE,
144 0x002000 * CYGNUM_FLASH_INTERLEAVE,
145 0x008000 * CYGNUM_FLASH_INTERLEAVE,
146 0x004000 * CYGNUM_FLASH_INTERLEAVE,
151 #if defined(CYGHWR_DEVS_FLASH_ATMEL_AT49BV1604A) || \
152 defined(CYGHWR_DEVS_FLASH_ATMEL_AT49BV1614A) || \
153 defined(CYGHWR_DEVS_FLASH_ATMEL_AT49LV1614A) || \
154 defined(CYGHWR_DEVS_FLASH_ATMEL_AT49LV161)
156 // the following ID is true for both 8 and 16 bit CYGNUM_FLASH_WIDTH
157 device_id : FLASHWORD(0xC0),
158 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
160 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
161 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
163 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
164 0x002000 * CYGNUM_FLASH_INTERLEAVE,
165 0x002000 * CYGNUM_FLASH_INTERLEAVE,
166 0x002000 * CYGNUM_FLASH_INTERLEAVE,
167 0x002000 * CYGNUM_FLASH_INTERLEAVE,
168 0x002000 * CYGNUM_FLASH_INTERLEAVE,
169 0x002000 * CYGNUM_FLASH_INTERLEAVE,
170 0x002000 * CYGNUM_FLASH_INTERLEAVE,
171 0x002000 * CYGNUM_FLASH_INTERLEAVE,
176 #if defined(CYGHWR_DEVS_FLASH_ATMEL_AT49BV322A)
178 // the following ID is true for both 8 and 16 bit CYGNUM_FLASH_WIDTH
179 device_id : FLASHWORD(0xC8),
180 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
182 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
183 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
185 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
186 0x002000 * CYGNUM_FLASH_INTERLEAVE,
187 0x002000 * CYGNUM_FLASH_INTERLEAVE,
188 0x002000 * CYGNUM_FLASH_INTERLEAVE,
189 0x002000 * CYGNUM_FLASH_INTERLEAVE,
190 0x002000 * CYGNUM_FLASH_INTERLEAVE,
191 0x002000 * CYGNUM_FLASH_INTERLEAVE,
192 0x002000 * CYGNUM_FLASH_INTERLEAVE,
193 0x002000 * CYGNUM_FLASH_INTERLEAVE,
198 #if defined(CYGHWR_DEVS_FLASH_ATMEL_AT29LV200BB)
200 device_id : FLASHWORD(0x22BF),
201 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
203 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
204 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
206 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE, // 0x00000..0x03FFF
207 0x004000 * CYGNUM_FLASH_INTERLEAVE, // 0x04000..0x05FFF
208 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x06000..0x07FFF
209 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x08000..0x0FFFF
210 0x008000 * CYGNUM_FLASH_INTERLEAVE,
216 #if defined(CYGHWR_DEVS_FLASH_ATMEL_AT49BV1604A) || \
217 defined(CYGHWR_DEVS_FLASH_ATMEL_AT49BV1614A) || \
218 defined(CYGHWR_DEVS_FLASH_ATMEL_AT49LV1614A)
219 #ifndef CYGHWR_DEVS_FLASH_ATMEL_AT49XXXX_ERASE_BUG_WORKAROUND
220 #warning This flash device contains a hardware bug and you have not
221 #warning enabled the workaround for it. See the CDL file.
225 #endif // ifndef CYGONCE_DEVS_FLASH_ATMEL_AT49XXXX_PARTS_INL
227 // EOF flash_at49xxxx_parts.inl