1 //==========================================================================
3 // devs/wallclock/sh3.cxx
5 // SH3 RTC module driver.
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
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38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors: jskov
46 // Purpose: Wallclock driver for SH3 CPU RTC module
48 //####DESCRIPTIONEND####
50 //==========================================================================
52 #include <pkgconf/wallclock.h> // Wallclock device config
54 #include <cyg/hal/hal_io.h> // IO macros
55 #include <cyg/infra/cyg_type.h> // Common type definitions and support
57 #include <cyg/io/wallclock.hxx> // The WallClock API
58 #include <cyg/io/wallclock/wallclock.inl> // Helpers
60 #include <cyg/hal/sh_regs.h> // RTC register definitions
62 #include <cyg/infra/diag.h> // For debugging
66 //-----------------------------------------------------------------------------
67 // Functions for setting and getting the hardware clock counters
69 // Year must be last two digits of "western calendar year". Leap year when
72 set_sh3_hwclock(cyg_uint32 year, cyg_uint32 month, cyg_uint32 mday,
73 cyg_uint32 hour, cyg_uint32 minute, cyg_uint32 second)
76 HAL_WRITE_UINT8(CYGARC_REG_RCR2, CYGARC_REG_RCR2_RESET);
79 HAL_WRITE_UINT8(CYGARC_REG_RYRCNT, TO_BCD(year));
80 HAL_WRITE_UINT8(CYGARC_REG_RMONCNT, TO_BCD(month));
81 HAL_WRITE_UINT8(CYGARC_REG_RDAYCNT, TO_BCD(mday));
82 HAL_WRITE_UINT8(CYGARC_REG_RHRCNT, TO_BCD(hour));
83 HAL_WRITE_UINT8(CYGARC_REG_RMINCNT, TO_BCD(minute));
84 HAL_WRITE_UINT8(CYGARC_REG_RSECCNT, TO_BCD(second));
87 HAL_WRITE_UINT8(CYGARC_REG_RCR1, CYGARC_REG_RCR1_CIE);
88 HAL_WRITE_UINT8(CYGARC_REG_RCR2,
89 CYGARC_REG_RCR2_RTCEN | CYGARC_REG_RCR2_START);
94 get_sh3_hwclock(cyg_uint32* year, cyg_uint32* month, cyg_uint32* mday,
95 cyg_uint32* hour, cyg_uint32* minute, cyg_uint32* second)
101 HAL_WRITE_UINT8(CYGARC_REG_RCR1, 0);
104 HAL_READ_UINT8(CYGARC_REG_RYRCNT, tmp);
106 HAL_READ_UINT8(CYGARC_REG_RMONCNT, tmp);
107 *month = TO_DEC(tmp);
108 HAL_READ_UINT8(CYGARC_REG_RDAYCNT, tmp);
110 HAL_READ_UINT8(CYGARC_REG_RHRCNT, tmp);
112 HAL_READ_UINT8(CYGARC_REG_RMINCNT, tmp);
113 *minute = TO_DEC(tmp);
114 HAL_READ_UINT8(CYGARC_REG_RSECCNT, tmp);
115 *second = TO_DEC(tmp);
118 HAL_READ_UINT8(CYGARC_REG_RCR1, tmp);
119 } while (CYGARC_REG_RCR1_CF & tmp); // loop if carry set
122 //-----------------------------------------------------------------------------
123 // Functions required for the hardware-driver API.
125 // Returns the number of seconds elapsed since 1970-01-01 00:00:00.
127 Cyg_WallClock::get_hw_seconds(void)
129 cyg_uint32 year, month, mday, hour, minute, second;
131 get_sh3_hwclock(&year, &month, &mday, &hour, &minute, &second);
134 // This will cause the test to eventually fail due to these printouts
135 // causing timer interrupts to be lost...
136 diag_printf("year %02d\n", year);
137 diag_printf("month %02d\n", month);
138 diag_printf("mday %02d\n", mday);
139 diag_printf("hour %02d\n", hour);
140 diag_printf("minute %02d\n", minute);
141 diag_printf("second %02d\n", second);
144 #ifndef CYGSEM_WALLCLOCK_SET_GET_MODE
145 // We know what we initialized the hardware for : 1970, so by doing this
146 // the returned time should be OK for 30 years uptime.
149 // Need to use sliding window or similar to figure out what the
150 // century should be... Patent issue is unclear, and since there's
151 // no battery backup of the clock, there's little point in
153 # error "Need some magic here to figure out century counter"
156 cyg_uint32 now = _simple_mktime(year, month, mday, hour, minute, second);
160 #ifndef CYGSEM_WALLCLOCK_SET_GET_MODE
163 Cyg_WallClock::init_hw_seconds(void)
165 // This is our base: 1970-01-01 00:00:00
166 // Set the HW clock - if for nothing else, just to be sure it's in a
167 // legal range. Any arbitrary base could be used.
168 // After this the hardware clock is only read.
169 set_sh3_hwclock(70,1,1,0,0,0);
172 #endif // CYGSEM_WALLCLOCK_SET_GET_MODE
174 //-----------------------------------------------------------------------------
175 // End of devs/wallclock/sh3.cxx