1 #ifndef CYGONCE_HAL_PLATFORM_INTS_H
2 #define CYGONCE_HAL_PLATFORM_INTS_H
3 //==========================================================================
7 // HAL Interrupt and clock support
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
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40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //==========================================================================
43 //#####DESCRIPTIONBEGIN####
46 // Contributors: jskov
48 // Purpose: Define Interrupt support
49 // Description: The interrupt details for the Altera/Excalibur are defined here.
51 // #include <cyg/hal/hal_platform_ints.h>
55 //####DESCRIPTIONEND####
57 //==========================================================================
59 #include <cyg/hal/excalibur.h>
61 // These are interrupts on the Excalibur
63 #define CYGNUM_HAL_INTERRUPT_PLD_0 0
64 #define CYGNUM_HAL_INTERRUPT_PLD_1 1
65 #define CYGNUM_HAL_INTERRUPT_PLD_2 2
66 #define CYGNUM_HAL_INTERRUPT_PLD_3 3
67 #define CYGNUM_HAL_INTERRUPT_PLD_4 4
68 #define CYGNUM_HAL_INTERRUPT_PLD_5 5
69 #define CYGNUM_HAL_INTERRUPT_EXTERNAL 6
70 #define CYGNUM_HAL_INTERRUPT_UART 7
71 #define CYGNUM_HAL_INTERRUPT_TIMER_0 8
72 #define CYGNUM_HAL_INTERRUPT_TIMER_1 9
73 #define CYGNUM_HAL_INTERRUPT_PLL 10
74 #define CYGNUM_HAL_INTERRUPT_EBI_ERROR 11
75 #define CYGNUM_HAL_INTERRUPT_PLD_ERROR 12
76 #define CYGNUM_HAL_INTERRUPT_AHB_ERROR 13
77 #define CYGNUM_HAL_INTERRUPT_COMMTX 14
78 #define CYGNUM_HAL_INTERRUPT_COMMRX 15
79 #define CYGNUM_HAL_INTERRUPT_FAST_COMMS 16
81 #define CYGNUM_HAL_INTERRUPT_NONE -1
83 #define CYGNUM_HAL_ISR_MIN 0
84 #define CYGNUM_HAL_ISR_MAX (CYGNUM_HAL_INTERRUPT_FAST_COMMS)
86 #define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX-CYGNUM_HAL_ISR_MIN+1)
88 // The vector used by the Real time clock
89 #define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER_0
91 //----------------------------------------------------------------------------
94 // Writing a bad value to the watchdog reload register causes a reset.
95 #define HAL_PLATFORM_RESET() \
96 HAL_WRITE_UINT32(EXCALIBUR_WDOG_RELOAD, 0)
98 #define HAL_PLATFORM_RESET_ENTRY EXCALIBUR_FLASH_PHYS_BASE
100 #endif // CYGONCE_HAL_PLATFORM_INTS_H