packages/hal/arm/ebsa285/v2_0/include/hal_platform_setup.h

   1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
   2 #define CYGONCE_HAL_PLATFORM_SETUP_H
   3
   4 /*=============================================================================
   5 //
   6 //      hal_platform_setup.h
   7 //
   8 //      Platform specific support for HAL (assembly code)
   9 //
  10 //=============================================================================
  11 //####ECOSGPLCOPYRIGHTBEGIN####
  12 // -------------------------------------------
  13 // This file is part of eCos, the Embedded Configurable Operating System.
  14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  40 // at http://sources.redhat.com/ecos/ecos-license/
  41 // -------------------------------------------
  42 //####ECOSGPLCOPYRIGHTEND####
  43 //=============================================================================
  44 //#####DESCRIPTIONBEGIN####
  45 //
  46 // Author(s):    hmt
  47 // Contributors: hmt
  48 // Date:         1999-04-21
  49 // Purpose:      Intel EBSA285 platform specific support routines
  50 // Description:
  51 // Usage:       #include <cyg/hal/hal_platform_setup.h>
  52 //
  53 //####DESCRIPTIONEND####
  54 //
  55 //===========================================================================*/
  56
  57 #include <pkgconf/system.h>             // System-wide configuration info
  58 #include CYGBLD_HAL_PLATFORM_H          // Platform specific configuration
  59 #include CYGHWR_MEMORY_LAYOUT_H         // Location of the ROM
  60 #include <cyg/hal/hal_ebsa285.h>        // Platform specific hardware definitions
  61 #include <cyg/hal/hal_mmu.h>            // MMU definitions
  62
  63 // Note that we do NOT define CYGHWR_HAL_ARM_HAS_MMU so that at reset we
  64 // jump straight into the ROM; this makes it unnecessary to take any
  65 // special steps to switch from executing in the ROM alias at low
  66 // addresses.  Make no difference for RAM start. For ROMRAM startup the
  67 // application is linked with RAM addresses, but we have to jump to
  68 // the ROM address at startup. Diddle the UNMAPPED macro to do this
  69
  70 #if defined (CYG_HAL_STARTUP_ROMRAM)
  71 #define UNMAPPED(x) (x + CYGMEM_REGION_rom)
  72 #endif
  73
  74 // Define macro used to diddle the LEDs during early initialization.
  75 // Can use r0+r1.  Argument in \x.
  76 #define CYGHWR_LED_MACRO                                                  \
  77         ldr     r0,=0x42000148    /* SA110_XBUS_CYCLE_ARBITER */          ;\
  78         ldr     r0,[r0]                                                   ;\
  79         tsts    r0,#0x00800000 /* SA110_XBUS_CYCLE_ARBITER_ENABLED */     ;\
  80         bne     667f              /* Don't touch if PCI arbiter enabled */;\
  81         ldr     r0,=0x40012800    /* SA110_XBUS_XCS2 */                   ;\
  82         mov     r1,#7&(~(\x))                                             ;\
  83         str     r1,[r0]                                                   ;\
  84 667:
  85
  86 // The main useful output of this file is PLATFORM_SETUP1: it invokes lots
  87 // of other stuff (may depend on RAM or ROM start).  The other stuff is
  88 // divided into further macros to make it easier to manage what's enabled
  89 // when.
  90
  91 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) || \
  92     defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) ||      \
  93     !defined(CYGSEM_HAL_USE_ROM_MONITOR)
  94
  95 // Dependence on ROM/RAM start removed when meminit code fixed up.
  96 // But it re-emerged when RedBoot's desire to live over RAM app
  97 // initialization asserted itself.
  98 //
  99 // The correct thing is to re-initialize everything if any of:
 100 //  o You are in ROM (duh!)
 101 //  o You include your own stubs (ergo rule the world)
 102 //  o You do not cooperate with a ROM Monitor
 103 //
 104 // [The latter two probably mean the same thing, but this way also lets us
 105 //  support a standalone RAM startup app with no stubs in it. ]
 106 // Hence the more complex conditional above.  See comments in the ChangeLog
 107 // and plf_io.h wrt initializing the PCI bus world.
 108
 109 #define PLATFORM_SETUP1                         \
 110         PLATFORM_FLUSH_DISABLE_CACHES           \
 111         INIT_XBUS_ACCESS                        \
 112         ALLOW_CLOCK_SWITCHING                   \
 113         CALL_MEMINIT_CODE                       \
 114         ROMRAM_COPY                             \
 115         BASIC_PCI_SETUP
 116 #else
 117 #define PLATFORM_SETUP1
 118 #endif
 119
 120
 121 // Discard and disable all caches: we are about to be writing vectors...
 122 #define PLATFORM_FLUSH_DISABLE_CACHES                                      \
 123         /* flush and disable the caches */                                 \
 124         mrc     p15,0,r1,c1,c0,0                                           ;\
 125         bic     r1,r1,#0x1000   /* ICache off */                           ;\
 126         bic     r1,r1,#0x000D   /* DCache off and MM off */                ;\
 127         mcr     p15,0,r1,c1,c0,0                                           ;\
 128         mov     r1, #0                                                     ;\
 129         mcr     p15,0,r1,c7,c6,0 /* DCache invalidate (discard) */         ;\
 130         mcr     p15,0,r1,c7,c5,0 /* ICache invalidate */                   ;\
 131         mcr     p15,0,r1,c8,c6,0 /* DCache TLB invalidate */               ;\
 132         mcr     p15,0,r1,c8,c5,0 /* ICache TLB invalidate */               ;\
 133         nop                                                                ;\
 134         nop     /* be sure invalidate "takes" before doing owt else */     ;\
 135         nop                                                                ;
 136
 137
 138 // Allow clock switching: very early in the startup
 139 #define ALLOW_CLOCK_SWITCHING                                              \
 140         mov     r0, #0                                                     ;\
 141         mcr     p15,0,r0,c15,c1,2                                          ;\
 142
 143
 144 // Depending on jumper settings, either ignore or initialize the XBus.
 145 #define INIT_XBUS_ACCESS                                                    \
 146         ldr     r1, =SA110_XBUS_CYCLE_ARBITER                              ;\
 147         ldr     r0, [r1]                                                   ;\
 148         tsts    r0, #SA110_XBUS_CYCLE_ARBITER_ENABLED                      ;\
 149         beq     777f                                                       ;\
 150         /* PCI arbiter enabled, so don't touch the XBus */                 ;\
 151         ldr     r0, =SA110_CONTROL                                         ;\
 152         ldr     r1, =0x04aa0000                                            ;\
 153         str     r1, [r0]                                                   ;\
 154         b       778f                                                       ;\
 155                                                                            ;\
 156         /* set up XBus so we can read switch and write to LEDs */          ;\
 157 777:    ldr     r0, =SA110_CONTROL                                         ;\
 158         ldr     r1, =0x64aa0000                                            ;\
 159         str     r1, [r0]                                                   ;\
 160         ldr     r0, =SA110_XBUS_CYCLE_ARBITER                              ;\
 161         ldr     r1, =0x100016db                                            ;\
 162         str     r1, [r0]                                                   ;\
 163         ldr     r0, =SA110_XBUS_IO_STROBE_MASK                             ;\
 164         ldr     r1, =0xfcfcfcfc                                            ;\
 165         str     r1, [r0]                                                   ;\
 166 778:                                                                       ;\
 167
 168 // Save lr and call mem init code
 169 #define CALL_MEMINIT_CODE                                                 \
 170         mov     r10, lr       /* preserve lr */                           ;\
 171         bl      __mem285_init                                             ;\
 172         ldr     r1, =hal_dram_size  /* [see hal_intr.h] */                ;\
 173         str     r0, [ r1 ]    /* store the top of memory address */       ;\
 174         mov     lr, r10       /* in hal_dram_size for future use */       ;\
 175
 176 // If we are doing a ROMRAM startup copy all sections up to the start of
 177 // the data section to RAM.
 178 #if defined(CYG_HAL_STARTUP_ROMRAM)
 179 #define ROMRAM_COPY                                                      \
 180         ldr     r0,=(CYGMEM_REGION_rom)                                  ;\
 181         ldr     r1,=0                                                    ;\
 182         ldr     r2,=0x40                                                 ;\
 183 810:    ldr     r3,[r0],#4                                               ;\
 184         str     r3,[r1],#4                                               ;\
 185         cmp     r1,r2                                                    ;\
 186         bne     810b                                                     ;\
 187         ldr     r0,=(CYGMEM_REGION_rom+reset_vector)                     ;\
 188         ldr     r1,=(reset_vector)                                       ;\
 189         ldr     r2,=(CYGMEM_REGION_rom_SIZE)                             ;\
 190 820:    ldr     r3,[r0],#4                                               ;\
 191         str     r3,[r1],#4                                               ;\
 192         cmp     r1,r2                                                    ;\
 193         bne     820b                                                     ;\
 194         ldr     r0,=830f                                                 ;\
 195         mov     pc,r0                                                    ;\
 196 830:
 197 #else
 198 #define ROMRAM_COPY
 199 #endif
 200
 201 #define BASIC_PCI_SETUP                                                   \
 202         /**************************************************************** \
 203          *  Basic PCI setup.                                              \
 204          ****************************************************************/\
 205         ldr     r0, =SA110_CONTROL_STATUS_BASE                            ;\
 206                                                                           ;\
 207         /* Disable PCI Outbound interrupts */                             ;\
 208         mov     r1, #12                                                   ;\
 209         str     r1, [r0, #SA110_OUT_INT_MASK_o]                           ;\
 210                                                                           ;\
 211         /* Disable Doorbells */                                           ;\
 212         mov     r1, #0                                                    ;\
 213         str     r1, [r0, #SA110_DOORBELL_PCI_MASK_o]                      ;\
 214         str     r1, [r0, #SA110_DOORBELL_SA_MASK_o]                       ;\
 215                                                                           ;\
 216         /* Map high PCI address bits to 0 */                              ;\
 217         str     r1, [r0, #SA110_PCI_ADDR_EXT_o]                           ;\
 218                                                                           ;\
 219         /* Interrupt ID to 1 */                                           ;\
 220         mov     r1, #0x100                                                ;\
 221         str     r1, [r0, #SA110_PCI_CFG_INT_LINE_o]                       ;\
 222                                                                           ;\
 223         /* Remove PCI_reset */                                            ;\
 224         ldr     r1, [r0, #SA110_CONTROL_o]                                ;\
 225         orr     r1, r1, #0x200                                            ;\
 226         str     r1, [r0, #SA110_CONTROL_o]                                ;\
 227                                                                           ;\
 228         /* Open a 2MB window */                                           ;\
 229         mov     r1, #0x1c0000                                             ;\
 230         str     r1,[r0, #SA110_SDRAM_BASE_ADDRESS_MASK_o]                 ;\
 231         mov     r1, #0xe00000                                             ;\
 232         str     r1,[r0, #SA110_SDRAM_BASE_ADDRESS_OFFSET_o]               ;\
 233                                                                           ;\
 234         /* Only init PCI if central function is set and */                ;\
 235         /* standalone bit is cleared                    */                ;\
 236         ldr     r1, [r0, #SA110_CONTROL_o]                                ;\
 237         tst     r1, #SA110_CONTROL_CFN                                    ;\
 238         beq     1f                                                        ;\
 239                                                                           ;\
 240         ldr     r1, =0x40012000                                           ;\
 241         ldr     r1, [r1]                                                  ;\
 242         tst     r1, #0x40                                                 ;\
 243         bne     1f                                                        ;\
 244                                                                           ;\
 245         /* Don't respond to any commands */                               ;\
 246         mov     r1, #0                                                    ;\
 247         str     r1, [r0, #SA110_PCI_CFG_COMMAND_o]                        ;\
 248                                                                           ;\
 249         str     r1, [r0, #SA110_PCI_CFG_SDRAM_BAR_o]                      ;\
 250         mov     r1, #0x40000000                                           ;\
 251         str     r1, [r0, #SA110_PCI_CFG_CSR_MEM_BAR_o]                    ;\
 252         mov     r1, #0xf000                                               ;\
 253         str     r1, [r0, #SA110_PCI_CFG_CSR_IO_BAR_o]                     ;\
 254                                                                           ;\
 255         /* respond to I/O space & Memory transactions. */                 ;\
 256         mov     r1, #0x17                                                 ;\
 257         str     r1, [r0, #SA110_PCI_CFG_COMMAND_o]                        ;\
 258     1:                                                                    ;\
 259         /* Signal PCI_init_complete */                                    ;\
 260         ldr     r1, [r0, #SA110_CONTROL_o]                                ;\
 261         orr     r1, r1, #SA110_CONTROL_INIT_COMPLETE                      ;\
 262         str     r1, [r0, #SA110_CONTROL_o]                                ;\
 263
 264
 265 /*---------------------------------------------------------------------------*/
 266 /* end of hal_platform_setup.h                                               */
 267 #endif /* CYGONCE_HAL_PLATFORM_SETUP_H */