packages/hal/sparclite/sleb/v2_0/include/hal_xpic.h

   1 #ifndef CYGONCE_HAL_XPIC_H
   2 #define CYGONCE_HAL_XPIC_H
   3
   4 //=============================================================================
   5 //
   6 //      hal_xpic.h
   7 //
   8 //      HAL eXternal Programmable Interrupt Controller support
   9 //
  10 //=============================================================================
  11 //####ECOSGPLCOPYRIGHTBEGIN####
  12 // -------------------------------------------
  13 // This file is part of eCos, the Embedded Configurable Operating System.
  14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  40 // at http://sources.redhat.com/ecos/ecos-license/
  41 // -------------------------------------------
  42 //####ECOSGPLCOPYRIGHTEND####
  43 //=============================================================================
  44 //#####DESCRIPTIONBEGIN####
  45 //
  46 // Author(s):   nickg, gthomas, hmt
  47 // Contributors:        nickg, gthomas, hmt
  48 // Date:        1999-01-28
  49 // Purpose:     Define Interrupt support
  50 // Description: The macros defined here provide the HAL APIs for handling
  51 //              an external interrupt controller, and which interrupt is
  52 //              used for what.
  53 //
  54 // Usage:
  55 //              #include <cyg/hal/hal_intr.h> // which includes this file
  56 //              ...
  57 //
  58 //
  59 //####DESCRIPTIONEND####
  60 //
  61 //=============================================================================
  62
  63 #include <cyg/hal/hal_hwio.h> // HAL_SPARC_86940_READ/WRITE
  64
  65 //-----------------------------------------------------------------------------
  66 // Interrupt controller access
  67 //
  68 // In the Fuitsu SPARClite Evaluation Boards, when the external IRC (86940)
  69 // is used (set Switch 1, position 8 (SW1#8)), interrupts are as follows:
  70 //
  71 // 15   : NMI Push Switch (SW7)
  72 // 14   : N_INT# Ethernet LAN Controller (MB86964)
  73 // 13   : EX_IRQ13 from expansion board, active HIGH
  74 // 12   : EX_IRQ12 from expansion board, active LOW
  75 // 11   : EX_IRQ11 from expansion board, active LOW
  76 // 10   : RRDY0 Serial CH0 receive ready signal
  77 //  9   : TRDY0 Serial CH0 transmit ready signal
  78 //  8   : TIMER1 Timer 1 output counter
  79 //  7   : RRDY1 Serial CH1 receive ready signal
  80 //  6   : TRDY1 Serial CH1 transmit ready signal
  81 //  5   : EX_IRQ5 from expansion board, active LOW
  82 //  4   : EX_IRQ4 from expansion board, active LOW
  83 //  3   : EX_IRQ3 from expansion board, active HIGH
  84 //  2   : EX_IRQ2 from expansion board, active LOW
  85 //  1   : TIMER2 Timer 2 output counter
  86
  87 // The vector used by the Real time clock
  88
  89 //#define CYG_VECTOR_RTC                  CYG_VECTOR_INTERRUPT_8
  90 #define CYGNUM_HAL_INTERRUPT_RTC       CYGNUM_HAL_VECTOR_INTERRUPT_8
  91
  92 #define HAL_SPARC_86940_REG_IRC_TRGM0 ( 0 * 4 )
  93 #define HAL_SPARC_86940_REG_IRC_TRGM1 ( 1 * 4 )
  94 #define HAL_SPARC_86940_REG_IRC_RQSNS ( 2 * 4 )
  95 #define HAL_SPARC_86940_REG_IRC_RQCLR ( 3 * 4 )
  96 #define HAL_SPARC_86940_REG_IRC_IMASK ( 4 * 4 )
  97 #define HAL_SPARC_86940_REG_IRC_CLIRL ( 5 * 4 )
  98
  99 #define HAL_SPARC_86940_FLAG_CLIRL_CL (0x10)
 100
 101 #define HAL_SPARC_86940_IRC_IMASK_READ( r ) \
 102             HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_IRC_IMASK, r )
 103
 104 #define HAL_SPARC_86940_IRC_IMASK_WRITE( v ) \
 105             HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_IRC_IMASK, v )
 106
 107 #define HAL_SPARC_86940_IRC_RQSNS_READ( r ) \
 108             HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_IRC_RQSNS, r )
 109
 110 #define HAL_SPARC_86940_IRC_RQCLR_WRITE( v ) \
 111             HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_IRC_RQCLR, v )
 112
 113 #define HAL_SPARC_86940_IRC_CLIRL_READ( r ) \
 114             HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_IRC_CLIRL, r )
 115
 116 #define HAL_SPARC_86940_IRC_CLIRL_WRITE( v ) \
 117             HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_IRC_CLIRL, v )
 118
 119 //-----------------------------------------------------------------------------
 120
 121 #define HAL_INTERRUPT_MASK( _vector_ ) CYG_MACRO_START                      \
 122     cyg_uint32 _traps_, _mask_;                                             \
 123     HAL_DISABLE_TRAPS( _traps_ );                                           \
 124     HAL_SPARC_86940_IRC_IMASK_READ( _mask_ );                               \
 125     _mask_ |= (1 << (_vector_) );                                           \
 126     HAL_SPARC_86940_IRC_IMASK_WRITE( _mask_ );                              \
 127     HAL_SPARC_86940_IRC_RQCLR_WRITE( (1 << (_vector_) ) );                  \
 128     HAL_SPARC_86940_IRC_CLIRL_WRITE( HAL_SPARC_86940_FLAG_CLIRL_CL );       \
 129     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 130 CYG_MACRO_END
 131
 132 #define HAL_INTERRUPT_UNMASK( _vector_ ) CYG_MACRO_START                    \
 133     cyg_uint32 _traps_, _mask_;                                             \
 134     HAL_DISABLE_TRAPS( _traps_ );                                           \
 135     HAL_SPARC_86940_IRC_IMASK_READ( _mask_ );                               \
 136     _mask_ &=~ (1 << (_vector_) );                                          \
 137     HAL_SPARC_86940_IRC_IMASK_WRITE( _mask_ );                              \
 138     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 139 CYG_MACRO_END
 140
 141 #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) CYG_MACRO_START               \
 142     cyg_uint32 _traps_;                                                     \
 143     cyg_uint32 _req_, _irl_;                                                \
 144     HAL_DISABLE_TRAPS( _traps_ );                                           \
 145     HAL_SPARC_86940_IRC_RQCLR_WRITE( (1 << (_vector_) ) );                  \
 146     do {                                                                    \
 147         HAL_SPARC_86940_IRC_CLIRL_WRITE( HAL_SPARC_86940_FLAG_CLIRL_CL );   \
 148         HAL_SPARC_86940_IRC_RQSNS_READ( _req_ );                            \
 149         HAL_SPARC_86940_IRC_CLIRL_READ( _irl_ );                            \
 150         _req_ &= (1 << (_vector_)); /* if there really is a new intr  */    \
 151         _irl_ &= 0x0f;              /* then get out - else poll until */    \
 152     } while ( (!_req_) && (_irl_ == (_vector_)) ); /* no intr here    */    \
 153     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 154 CYG_MACRO_END
 155
 156 // Set an interrupt source's sensitivity:
 157 // _level_ != 0 ? level-sensitive : edge-sensitive
 158 // _up_    != 0 ? high/up : low/down
 159 // SPARClite's 86940 has values as follows:
 160 //    0  : high level
 161 //    1  : low level
 162 //    2  : rising edge
 163 //    3  : falling edge
 164 // TRGM0 controls sources 15-8, TRGM1 sources 7-1.
 165
 166 #define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) CYG_MACRO_START  \
 167     int _reg_ = (8 > (_vector_)) ? HAL_SPARC_86940_REG_IRC_TRGM1            \
 168                                  : HAL_SPARC_86940_REG_IRC_TRGM0;           \
 169     int _val_, _myvect_ = (_vector_);                                       \
 170     cyg_uint32 _traps_;                                                     \
 171     HAL_DISABLE_TRAPS( _traps_ );                                           \
 172     (_myvect_) &= 7;                                                        \
 173     (_myvect_) <<= 1;                                                       \
 174     HAL_SPARC_86940_READ( _reg_, _val_ );                                   \
 175     _val_ &=~ (3 << (_myvect_));                                            \
 176     _val_ |= ( ((_level_) ? 0 : 2) + ((_up_) ? 0 : 1) ) << (_myvect_);      \
 177     HAL_SPARC_86940_WRITE( _reg_, _val_ );                                  \
 178     HAL_INTERRUPT_ACKNOWLEDGE( _vector_ );                                  \
 179     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 180 CYG_MACRO_END
 181
 182 // This is not a standard macro - platform dependent for debugging only:
 183 //  o level, up tell you how this source was configured as above.
 184 //  o hipri returns the number of the highest prio requesting interrupt
 185 //  o mask tells you whether this source is masked off
 186 //  o req tells you whether this source is requesting right now.
 187 #define HAL_INTERRUPT_QUERY_INFO( _vector_, _level_, _up_,                  \
 188                                    _hipri_, _mask_, _req_ ) CYG_MACRO_START \
 189     int _reg_ = (8 > (_vector_)) ? HAL_SPARC_86940_REG_IRC_TRGM1            \
 190                                  : HAL_SPARC_86940_REG_IRC_TRGM0;           \
 191     int _val_, _myvect_ = (_vector_);                                       \
 192     HAL_SPARC_86940_IRC_IMASK_READ( _val_ );                                \
 193     _mask_ = (0 != ((1 << (_vector_)) & _val_ ));                           \
 194     HAL_SPARC_86940_IRC_RQSNS_READ( _val_ );                                \
 195     _req_ = (0 != ((1 << (_vector_)) & _val_ ));                            \
 196     HAL_SPARC_86940_IRC_CLIRL_READ( _hipri_ );                              \
 197     (_myvect_) &= 7;                                                        \
 198     (_myvect_) <<= 1;                                                       \
 199     HAL_SPARC_86940_READ( _reg_, _val_ );                                   \
 200     _val_ >>= (_myvect_);                                                   \
 201     (_level_) = !(_val_ & 2);                                               \
 202     (_up_)    = !(_val_ & 1);                                               \
 203 CYG_MACRO_END
 204
 205 // This may set the priority of a vector to a particular level:
 206 // SPARClite does not support this.
 207 #define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) /* nothing */
 208
 209 //-----------------------------------------------------------------------------
 210 #endif // ifndef CYGONCE_HAL_XPIC_H
 211 // End of hal_xpic.h