board/BuR/common/common.c

   1 /*
   2  * common.c
   3  *
   4  * common board functions for B&R boards
   5  *
   6  * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
   7  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  *
  11  */
  12
  13 #include <common.h>
  14 #include <errno.h>
  15 #include <spl.h>
  16 #include <asm/arch/cpu.h>
  17 #include <asm/arch/hardware.h>
  18 #include <asm/arch/omap.h>
  19 #include <asm/arch/clock.h>
  20 #include <asm/arch/gpio.h>
  21 #include <asm/arch/sys_proto.h>
  22 #include <asm/io.h>
  23 #include <asm/gpio.h>
  24 #include <i2c.h>
  25 #include <miiphy.h>
  26 #include <cpsw.h>
  27 #include <power/tps65217.h>
  28 #include "bur_common.h"
  29
  30 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
  31 /* --------------------------------------------------------------------------*/
  32 void blink(u32 blinks, u32 intervall, u32 pin)
  33 {
  34         gpio_direction_output(pin, 0);
  35         int val = 0;
  36
  37         do {
  38                 val ^= 0x01;
  39                 gpio_set_value(pin, val);
  40                 mdelay(intervall);
  41         } while (blinks--);
  42
  43         gpio_set_value(pin, 0);
  44 }
  45 #ifdef CONFIG_SPL_BUILD
  46 void pmicsetup(u32 mpupll)
  47 {
  48         int mpu_vdd;
  49         int usb_cur_lim;
  50
  51         /* setup I2C */
  52         enable_i2c0_pin_mux();
  53         i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
  54
  55         if (i2c_probe(TPS65217_CHIP_PM)) {
  56                 puts("PMIC (0x24) not found! skip further initalization.\n");
  57                 return;
  58         }
  59
  60         /* Get the frequency which is defined by device fuses */
  61         dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
  62         printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
  63
  64         if (0 != mpupll) {
  65                 dpll_mpu_opp100.m = MPUPLL_M_1000;
  66                 printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
  67         } else {
  68                 puts("ok.\n");
  69         }
  70         /*
  71          * Increase USB current limit to 1300mA or 1800mA and set
  72          * the MPU voltage controller as needed.
  73          */
  74         if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
  75                 usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
  76                 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
  77         } else {
  78                 usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
  79                 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
  80         }
  81
  82         if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
  83                                usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
  84                 puts("tps65217_reg_write failure\n");
  85
  86         /* Set DCDC3 (CORE) voltage to 1.125V */
  87         if (tps65217_voltage_update(TPS65217_DEFDCDC3,
  88                                     TPS65217_DCDC_VOLT_SEL_1125MV)) {
  89                 puts("tps65217_voltage_update failure\n");
  90                 return;
  91         }
  92
  93         /* Set CORE Frequencies to OPP100 */
  94         do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
  95
  96         /* Set DCDC2 (MPU) voltage */
  97         if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
  98                 puts("tps65217_voltage_update failure\n");
  99                 return;
 100         }
 101
 102         /* Set LDO3 to 1.8V */
 103         if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
 104                                TPS65217_DEFLS1,
 105                                TPS65217_LDO_VOLTAGE_OUT_1_8,
 106                                TPS65217_LDO_MASK))
 107                 puts("tps65217_reg_write failure\n");
 108         /* Set LDO4 to 3.3V */
 109         if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
 110                                TPS65217_DEFLS2,
 111                                TPS65217_LDO_VOLTAGE_OUT_3_3,
 112                                TPS65217_LDO_MASK))
 113                 puts("tps65217_reg_write failure\n");
 114
 115         /* Set MPU Frequency to what we detected now that voltages are set */
 116         do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
 117 }
 118
 119 void set_uart_mux_conf(void)
 120 {
 121         enable_uart0_pin_mux();
 122 }
 123
 124 void set_mux_conf_regs(void)
 125 {
 126         enable_board_pin_mux();
 127 }
 128
 129 #endif /* CONFIG_SPL_BUILD */
 130
 131 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
 132         (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
 133 static void cpsw_control(int enabled)
 134 {
 135         /* VTP can be added here */
 136         return;
 137 }
 138
 139 /* describing port offsets of TI's CPSW block */
 140 static struct cpsw_slave_data cpsw_slaves[] = {
 141         {
 142                 .slave_reg_ofs  = 0x208,
 143                 .sliver_reg_ofs = 0xd80,
 144                 .phy_addr       = 1,
 145         },
 146         {
 147                 .slave_reg_ofs  = 0x308,
 148                 .sliver_reg_ofs = 0xdc0,
 149                 .phy_addr       = 2,
 150         },
 151 };
 152
 153 static struct cpsw_platform_data cpsw_data = {
 154         .mdio_base              = CPSW_MDIO_BASE,
 155         .cpsw_base              = CPSW_BASE,
 156         .mdio_div               = 0xff,
 157         .channels               = 8,
 158         .cpdma_reg_ofs          = 0x800,
 159         .slaves                 = 1,
 160         .slave_data             = cpsw_slaves,
 161         .ale_reg_ofs            = 0xd00,
 162         .ale_entries            = 1024,
 163         .host_port_reg_ofs      = 0x108,
 164         .hw_stats_reg_ofs       = 0x900,
 165         .bd_ram_ofs             = 0x2000,
 166         .mac_control            = (1 << 5),
 167         .control                = cpsw_control,
 168         .host_port_num          = 0,
 169         .version                = CPSW_CTRL_VERSION_2,
 170 };
 171 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
 172
 173 #if defined(CONFIG_DRIVER_TI_CPSW)
 174
 175 int board_eth_init(bd_t *bis)
 176 {
 177         int rv = 0;
 178         uint8_t mac_addr[6];
 179         uint32_t mac_hi, mac_lo;
 180
 181         /* try reading mac address from efuse */
 182         mac_lo = readl(&cdev->macid0l);
 183         mac_hi = readl(&cdev->macid0h);
 184         mac_addr[0] = mac_hi & 0xFF;
 185         mac_addr[1] = (mac_hi & 0xFF00) >> 8;
 186         mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
 187         mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
 188         mac_addr[4] = mac_lo & 0xFF;
 189         mac_addr[5] = (mac_lo & 0xFF00) >> 8;
 190
 191 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
 192         (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
 193         if (!getenv("ethaddr")) {
 194                 printf("<ethaddr> not set. Validating first E-fuse MAC ... ");
 195
 196                 if (is_valid_ether_addr(mac_addr)) {
 197                         printf("using: %02X:%02X:%02X:%02X:%02X:%02X.\n",
 198                                mac_addr[0], mac_addr[1], mac_addr[2],
 199                                mac_addr[3], mac_addr[4], mac_addr[5]
 200                                 );
 201                         eth_setenv_enetaddr("ethaddr", mac_addr);
 202                 }
 203         }
 204         writel(MII_MODE_ENABLE, &cdev->miisel);
 205         cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
 206         cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII;
 207
 208         rv = cpsw_register(&cpsw_data);
 209         if (rv < 0) {
 210                 printf("Error %d registering CPSW switch\n", rv);
 211                 return 0;
 212         }
 213 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
 214         return rv;
 215 }
 216 #endif /* CONFIG_DRIVER_TI_CPSW */