2 * Startup Code for MIPS32 CPU-core
4 * Copyright (c) 2003 Wolfgang Denk <wd@denx.de>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/regdef.h>
29 #include <asm/mipsregs.h>
32 #define RVECENT(f,n) \
34 #define XVECENT(f,bev) \
43 RVECENT(reset,0) /* U-boot entry point */
44 RVECENT(reset,1) /* software reboot */
46 .word 0x000020C4 /* EBU init code, fetched during booting */
47 .word 0x00000000 /* phase of the flash */
49 RVECENT(romReserved,2)
51 RVECENT(romReserved,3)
52 RVECENT(romReserved,4)
53 RVECENT(romReserved,5)
54 RVECENT(romReserved,6)
55 RVECENT(romReserved,7)
56 RVECENT(romReserved,8)
57 RVECENT(romReserved,9)
58 RVECENT(romReserved,10)
59 RVECENT(romReserved,11)
60 RVECENT(romReserved,12)
61 RVECENT(romReserved,13)
62 RVECENT(romReserved,14)
63 RVECENT(romReserved,15)
64 RVECENT(romReserved,16)
65 RVECENT(romReserved,17)
66 RVECENT(romReserved,18)
67 RVECENT(romReserved,19)
68 RVECENT(romReserved,20)
69 RVECENT(romReserved,21)
70 RVECENT(romReserved,22)
71 RVECENT(romReserved,23)
72 RVECENT(romReserved,24)
73 RVECENT(romReserved,25)
74 RVECENT(romReserved,26)
75 RVECENT(romReserved,27)
76 RVECENT(romReserved,28)
77 RVECENT(romReserved,29)
78 RVECENT(romReserved,30)
79 RVECENT(romReserved,31)
80 RVECENT(romReserved,32)
81 RVECENT(romReserved,33)
82 RVECENT(romReserved,34)
83 RVECENT(romReserved,35)
84 RVECENT(romReserved,36)
85 RVECENT(romReserved,37)
86 RVECENT(romReserved,38)
87 RVECENT(romReserved,39)
88 RVECENT(romReserved,40)
89 RVECENT(romReserved,41)
90 RVECENT(romReserved,42)
91 RVECENT(romReserved,43)
92 RVECENT(romReserved,44)
93 RVECENT(romReserved,45)
94 RVECENT(romReserved,46)
95 RVECENT(romReserved,47)
96 RVECENT(romReserved,48)
97 RVECENT(romReserved,49)
98 RVECENT(romReserved,50)
99 RVECENT(romReserved,51)
100 RVECENT(romReserved,52)
101 RVECENT(romReserved,53)
102 RVECENT(romReserved,54)
103 RVECENT(romReserved,55)
104 RVECENT(romReserved,56)
105 RVECENT(romReserved,57)
106 RVECENT(romReserved,58)
107 RVECENT(romReserved,59)
108 RVECENT(romReserved,60)
109 RVECENT(romReserved,61)
110 RVECENT(romReserved,62)
111 RVECENT(romReserved,63)
112 XVECENT(romExcHandle,0x200) /* bfc00200: R4000 tlbmiss vector */
113 RVECENT(romReserved,65)
114 RVECENT(romReserved,66)
115 RVECENT(romReserved,67)
116 RVECENT(romReserved,68)
117 RVECENT(romReserved,69)
118 RVECENT(romReserved,70)
119 RVECENT(romReserved,71)
120 RVECENT(romReserved,72)
121 RVECENT(romReserved,73)
122 RVECENT(romReserved,74)
123 RVECENT(romReserved,75)
124 RVECENT(romReserved,76)
125 RVECENT(romReserved,77)
126 RVECENT(romReserved,78)
127 RVECENT(romReserved,79)
128 XVECENT(romExcHandle,0x280) /* bfc00280: R4000 xtlbmiss vector */
129 RVECENT(romReserved,81)
130 RVECENT(romReserved,82)
131 RVECENT(romReserved,83)
132 RVECENT(romReserved,84)
133 RVECENT(romReserved,85)
134 RVECENT(romReserved,86)
135 RVECENT(romReserved,87)
136 RVECENT(romReserved,88)
137 RVECENT(romReserved,89)
138 RVECENT(romReserved,90)
139 RVECENT(romReserved,91)
140 RVECENT(romReserved,92)
141 RVECENT(romReserved,93)
142 RVECENT(romReserved,94)
143 RVECENT(romReserved,95)
144 XVECENT(romExcHandle,0x300) /* bfc00300: R4000 cache vector */
145 RVECENT(romReserved,97)
146 RVECENT(romReserved,98)
147 RVECENT(romReserved,99)
148 RVECENT(romReserved,100)
149 RVECENT(romReserved,101)
150 RVECENT(romReserved,102)
151 RVECENT(romReserved,103)
152 RVECENT(romReserved,104)
153 RVECENT(romReserved,105)
154 RVECENT(romReserved,106)
155 RVECENT(romReserved,107)
156 RVECENT(romReserved,108)
157 RVECENT(romReserved,109)
158 RVECENT(romReserved,110)
159 RVECENT(romReserved,111)
160 XVECENT(romExcHandle,0x380) /* bfc00380: R4000 general vector */
161 RVECENT(romReserved,113)
162 RVECENT(romReserved,114)
163 RVECENT(romReserved,115)
164 RVECENT(romReserved,116)
165 RVECENT(romReserved,116)
166 RVECENT(romReserved,118)
167 RVECENT(romReserved,119)
168 RVECENT(romReserved,120)
169 RVECENT(romReserved,121)
170 RVECENT(romReserved,122)
171 RVECENT(romReserved,123)
172 RVECENT(romReserved,124)
173 RVECENT(romReserved,125)
174 RVECENT(romReserved,126)
175 RVECENT(romReserved,127)
177 /* We hope there are no more reserved vectors!
178 * 128 * 8 == 1024 == 0x400
179 * so this is address R_VEC+0x400 == 0xbfc00400
184 /* Clear watch registers.
186 mtc0 zero, CP0_WATCHLO
187 mtc0 zero, CP0_WATCHHI
189 /* STATUS register */
200 mtc0 zero, CP0_COMPARE
202 /* CONFIG0 register */
203 li t0, CONF_CM_UNCACHED
206 #ifdef CONFIG_INCA_IP
207 /* Disable INCA-IP Watchdog.
209 bal disable_incaip_wdt
213 /* Initialize any external memory.
218 /* Initialize caches...
223 /* ... and enable them.
225 li t0, CONF_CM_CACHABLE_NONCOHERENT
229 /* Set up temporary stack.
231 li a0, CFG_INIT_SP_OFFSET
235 li t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET
238 /* Initialize GOT pointer.
242 .word _GLOBAL_OFFSET_TABLE_ - 1f + 4
253 * void relocate_code (addr_sp, gd, addr_moni)
255 * This "function" does not return, instead it continues in RAM
256 * after relocating the monitor code.
260 * a2 = destination address
265 move sp, a0 /* Set new stack pointer */
270 * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
273 sub gp, CFG_MONITOR_BASE
274 add gp, a2 /* gp now adjusted */
275 sub t6, gp, t6 /* t6 <-- relocation offset */
277 li t0, CFG_MONITOR_BASE
278 add t2, t0, CFG_MONITOR_LEN
282 * t0 = source address
283 * t1 = target address
284 * t2 = source end address
291 addu t1, 4 /* delay slot */
293 /* If caches were enabled, we would have to flush them here.
296 /* Jump to where we've relocated ourselves.
298 addi t0, a2, in_ram - _start
304 .word num_got_entries
307 /* Now we want to update GOT.
309 lw t3, -4(t0) /* t3 <-- num_got_entries */
310 addi t4, gp, 8 /* Skipping first two entries. */
320 addi t4, 4 /* delay slot */
324 lw t1, -12(t0) /* t1 <-- uboot_end_data */
325 lw t2, -8(t0) /* t2 <-- uboot_end */
326 add t1, t6 /* adjust pointers */
332 sw zero, 0(t1) /* delay slot */
337 move a1, a2 /* delay slot */
343 /* Exception handlers.