drivers/mtd/nand_legacy/nand_legacy.c

   1 /*
   2  * (C) 2006 Denx
   3  * Driver for NAND support, Rick Bronson
   4  * borrowed heavily from:
   5  * (c) 1999 Machine Vision Holdings, Inc.
   6  * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
   7  *
   8  * Added 16-bit nand support
   9  * (C) 2004 Texas Instruments
  10  */
  11
  12 #include <common.h>
  13 #include <command.h>
  14 #include <malloc.h>
  15 #include <asm/io.h>
  16 #include <watchdog.h>
  17 #include <linux/mtd/nand_legacy.h>
  18 #include <linux/mtd/nand_ids.h>
  19 #include <jffs2/jffs2.h>
  20
  21 #ifdef CONFIG_OMAP1510
  22 void archflashwp(void *archdata, int wp);
  23 #endif
  24
  25 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
  26
  27 #undef  PSYCHO_DEBUG
  28 #undef  NAND_DEBUG
  29
  30 /* ****************** WARNING *********************
  31  * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
  32  * erase (or at least attempt to erase) blocks that are marked
  33  * bad. This can be very handy if you are _sure_ that the block
  34  * is OK, say because you marked a good block bad to test bad
  35  * block handling and you are done testing, or if you have
  36  * accidentally marked blocks bad.
  37  *
  38  * Erasing factory marked bad blocks is a _bad_ idea. If the
  39  * erase succeeds there is no reliable way to find them again,
  40  * and attempting to program or erase bad blocks can affect
  41  * the data in _other_ (good) blocks.
  42  */
  43 #define  ALLOW_ERASE_BAD_DEBUG 0
  44
  45 #define CONFIG_MTD_NAND_ECC  /* enable ECC */
  46 #define CONFIG_MTD_NAND_ECC_JFFS2
  47
  48 /* bits for nand_legacy_rw() `cmd'; or together as needed */
  49 #define NANDRW_READ     0x01
  50 #define NANDRW_WRITE    0x00
  51 #define NANDRW_JFFS2    0x02
  52 #define NANDRW_JFFS2_SKIP       0x04
  53
  54
  55 /*
  56  * Exported variables etc.
  57  */
  58
  59 /* Definition of the out of band configuration structure */
  60 struct nand_oob_config {
  61         /* position of ECC bytes inside oob */
  62         int ecc_pos[6];
  63         /* position of  bad blk flag inside oob -1 = inactive */
  64         int badblock_pos;
  65         /* position of ECC valid flag inside oob -1 = inactive */
  66         int eccvalid_pos;
  67 } oob_config = { {0}, 0, 0};
  68
  69 struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE] = {{0}};
  70
  71 int curr_device = -1; /* Current NAND Device */
  72
  73
  74 /*
  75  * Exported functionss
  76  */
  77 int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
  78                      size_t len, int clean);
  79 int nand_legacy_rw(struct nand_chip* nand, int cmd,
  80                   size_t start, size_t len,
  81                   size_t * retlen, u_char * buf);
  82 void nand_print(struct nand_chip *nand);
  83 void nand_print_bad(struct nand_chip *nand);
  84 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
  85                  size_t * retlen, u_char * buf);
  86 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
  87                  size_t * retlen, const u_char * buf);
  88
  89 /*
  90  * Internals
  91  */
  92 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
  93 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
  94                  size_t * retlen, u_char *buf, u_char *ecc_code);
  95 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
  96                            size_t * retlen, const u_char * buf,
  97                            u_char * ecc_code);
  98 #ifdef CONFIG_MTD_NAND_ECC
  99 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
 100 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
 101 #endif
 102
 103
 104 /*
 105  *
 106  * Function definitions
 107  *
 108  */
 109
 110 /* returns 0 if block containing pos is OK:
 111  *              valid erase block and
 112  *              not marked bad, or no bad mark position is specified
 113  * returns 1 if marked bad or otherwise invalid
 114  */
 115 static int check_block (struct nand_chip *nand, unsigned long pos)
 116 {
 117         size_t retlen;
 118         uint8_t oob_data;
 119         uint16_t oob_data16[6];
 120         int page0 = pos & (-nand->erasesize);
 121         int page1 = page0 + nand->oobblock;
 122         int badpos = oob_config.badblock_pos;
 123
 124         if (pos >= nand->totlen)
 125                 return 1;
 126
 127         if (badpos < 0)
 128                 return 0;       /* no way to check, assume OK */
 129
 130         if (nand->bus16) {
 131                 if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
 132                     || (oob_data16[2] & 0xff00) != 0xff00)
 133                         return 1;
 134                 if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
 135                     || (oob_data16[2] & 0xff00) != 0xff00)
 136                         return 1;
 137         } else {
 138                 /* Note - bad block marker can be on first or second page */
 139                 if (nand_read_oob(nand, page0 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 140                     || oob_data != 0xff
 141                     || nand_read_oob (nand, page1 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 142                     || oob_data != 0xff)
 143                         return 1;
 144         }
 145
 146         return 0;
 147 }
 148
 149 /* print bad blocks in NAND flash */
 150 void nand_print_bad(struct nand_chip* nand)
 151 {
 152         unsigned long pos;
 153
 154         for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
 155                 if (check_block(nand, pos))
 156                         printf(" 0x%8.8lx\n", pos);
 157         }
 158         puts("\n");
 159 }
 160
 161 /* cmd: 0: NANDRW_WRITE                 write, fail on bad block
 162  *      1: NANDRW_READ                  read, fail on bad block
 163  *      2: NANDRW_WRITE | NANDRW_JFFS2  write, skip bad blocks
 164  *      3: NANDRW_READ | NANDRW_JFFS2   read, data all 0xff for bad blocks
 165  *      7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
 166  */
 167 int nand_legacy_rw (struct nand_chip* nand, int cmd,
 168                    size_t start, size_t len,
 169                    size_t * retlen, u_char * buf)
 170 {
 171         int ret = 0, n, total = 0;
 172         char eccbuf[6];
 173         /* eblk (once set) is the start of the erase block containing the
 174          * data being processed.
 175          */
 176         unsigned long eblk = ~0;        /* force mismatch on first pass */
 177         unsigned long erasesize = nand->erasesize;
 178
 179         while (len) {
 180                 if ((start & (-erasesize)) != eblk) {
 181                         /* have crossed into new erase block, deal with
 182                          * it if it is sure marked bad.
 183                          */
 184                         eblk = start & (-erasesize); /* start of block */
 185                         if (check_block(nand, eblk)) {
 186                                 if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
 187                                         while (len > 0 &&
 188                                                start - eblk < erasesize) {
 189                                                 *(buf++) = 0xff;
 190                                                 ++start;
 191                                                 ++total;
 192                                                 --len;
 193                                         }
 194                                         continue;
 195                                 } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
 196                                         start += erasesize;
 197                                         continue;
 198                                 } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
 199                                         /* skip bad block */
 200                                         start += erasesize;
 201                                         continue;
 202                                 } else {
 203                                         ret = 1;
 204                                         break;
 205                                 }
 206                         }
 207                 }
 208                 /* The ECC will not be calculated correctly if
 209                    less than 512 is written or read */
 210                 /* Is request at least 512 bytes AND it starts on a proper boundry */
 211                 if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
 212                         printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
 213
 214                 if (cmd & NANDRW_READ) {
 215                         ret = nand_read_ecc(nand, start,
 216                                            min(len, eblk + erasesize - start),
 217                                            (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 218                 } else {
 219                         ret = nand_write_ecc(nand, start,
 220                                             min(len, eblk + erasesize - start),
 221                                             (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 222                 }
 223
 224                 if (ret)
 225                         break;
 226
 227                 start  += n;
 228                 buf   += n;
 229                 total += n;
 230                 len   -= n;
 231         }
 232         if (retlen)
 233                 *retlen = total;
 234
 235         return ret;
 236 }
 237
 238 void nand_print(struct nand_chip *nand)
 239 {
 240         if (nand->numchips > 1) {
 241                 printf("%s at 0x%lx,\n"
 242                        "\t  %d chips %s, size %d MB, \n"
 243                        "\t  total size %ld MB, sector size %ld kB\n",
 244                        nand->name, nand->IO_ADDR, nand->numchips,
 245                        nand->chips_name, 1 << (nand->chipshift - 20),
 246                        nand->totlen >> 20, nand->erasesize >> 10);
 247         }
 248         else {
 249                 printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
 250                 print_size(nand->totlen, ", ");
 251                 print_size(nand->erasesize, " sector)\n");
 252         }
 253 }
 254
 255 /* ------------------------------------------------------------------------- */
 256
 257 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
 258 {
 259         /* This is inline, to optimise the common case, where it's ready instantly */
 260         int ret = 0;
 261
 262 #ifdef NAND_NO_RB       /* in config file, shorter delays currently wrap accesses */
 263         if(ale_wait)
 264                 NAND_WAIT_READY(nand);  /* do the worst case 25us wait */
 265         else
 266                 udelay(10);
 267 #else   /* has functional r/b signal */
 268         NAND_WAIT_READY(nand);
 269 #endif
 270         return ret;
 271 }
 272
 273 /* NanD_Command: Send a flash command to the flash chip */
 274
 275 static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
 276 {
 277         unsigned long nandptr = nand->IO_ADDR;
 278
 279         /* Assert the CLE (Command Latch Enable) line to the flash chip */
 280         NAND_CTL_SETCLE(nandptr);
 281
 282         /* Send the command */
 283         WRITE_NAND_COMMAND(command, nandptr);
 284
 285         /* Lower the CLE line */
 286         NAND_CTL_CLRCLE(nandptr);
 287
 288 #ifdef NAND_NO_RB
 289         if(command == NAND_CMD_RESET){
 290                 u_char ret_val;
 291                 NanD_Command(nand, NAND_CMD_STATUS);
 292                 do {
 293                         ret_val = READ_NAND(nandptr);/* wait till ready */
 294                 } while((ret_val & 0x40) != 0x40);
 295         }
 296 #endif
 297         return NanD_WaitReady(nand, 0);
 298 }
 299
 300 /* NanD_Address: Set the current address for the flash chip */
 301
 302 static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
 303 {
 304         unsigned long nandptr;
 305         int i;
 306
 307         nandptr = nand->IO_ADDR;
 308
 309         /* Assert the ALE (Address Latch Enable) line to the flash chip */
 310         NAND_CTL_SETALE(nandptr);
 311
 312         /* Send the address */
 313         /* Devices with 256-byte page are addressed as:
 314          * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
 315          * there is no device on the market with page256
 316          * and more than 24 bits.
 317          * Devices with 512-byte page are addressed as:
 318          * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
 319          * 25-31 is sent only if the chip support it.
 320          * bit 8 changes the read command to be sent
 321          * (NAND_CMD_READ0 or NAND_CMD_READ1).
 322          */
 323
 324         if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
 325                 WRITE_NAND_ADDRESS(ofs, nandptr);
 326
 327         ofs = ofs >> nand->page_shift;
 328
 329         if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
 330                 for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
 331                         WRITE_NAND_ADDRESS(ofs, nandptr);
 332                 }
 333         }
 334
 335         /* Lower the ALE line */
 336         NAND_CTL_CLRALE(nandptr);
 337
 338         /* Wait for the chip to respond */
 339         return NanD_WaitReady(nand, 1);
 340 }
 341
 342 /* NanD_SelectChip: Select a given flash chip within the current floor */
 343
 344 static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
 345 {
 346         /* Wait for it to be ready */
 347         return NanD_WaitReady(nand, 0);
 348 }
 349
 350 /* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
 351
 352 static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
 353 {
 354         int mfr, id, i;
 355
 356         NAND_ENABLE_CE(nand);  /* set pin low */
 357         /* Reset the chip */
 358         if (NanD_Command(nand, NAND_CMD_RESET)) {
 359 #ifdef NAND_DEBUG
 360                 printf("NanD_Command (reset) for %d,%d returned true\n",
 361                        floor, chip);
 362 #endif
 363                 NAND_DISABLE_CE(nand);  /* set pin high */
 364                 return 0;
 365         }
 366
 367         /* Read the NAND chip ID: 1. Send ReadID command */
 368         if (NanD_Command(nand, NAND_CMD_READID)) {
 369 #ifdef NAND_DEBUG
 370                 printf("NanD_Command (ReadID) for %d,%d returned true\n",
 371                        floor, chip);
 372 #endif
 373                 NAND_DISABLE_CE(nand);  /* set pin high */
 374                 return 0;
 375         }
 376
 377         /* Read the NAND chip ID: 2. Send address byte zero */
 378         NanD_Address(nand, ADDR_COLUMN, 0);
 379
 380         /* Read the manufacturer and device id codes from the device */
 381
 382         mfr = READ_NAND(nand->IO_ADDR);
 383
 384         id = READ_NAND(nand->IO_ADDR);
 385
 386         NAND_DISABLE_CE(nand);  /* set pin high */
 387
 388 #ifdef NAND_DEBUG
 389         printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
 390 #endif
 391         if (mfr == 0xff || mfr == 0) {
 392                 /* No response - return failure */
 393                 return 0;
 394         }
 395
 396         /* Check it's the same as the first chip we identified.
 397          * M-Systems say that any given nand_chip device should only
 398          * contain _one_ type of flash part, although that's not a
 399          * hardware restriction. */
 400         if (nand->mfr) {
 401                 if (nand->mfr == mfr && nand->id == id) {
 402                         return 1;       /* This is another the same the first */
 403                 } else {
 404                         printf("Flash chip at floor %d, chip %d is different:\n",
 405                                floor, chip);
 406                 }
 407         }
 408
 409         /* Print and store the manufacturer and ID codes. */
 410         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 411                 if (mfr == nand_flash_ids[i].manufacture_id &&
 412                     id == nand_flash_ids[i].model_id) {
 413 #ifdef NAND_DEBUG
 414                         printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
 415                                "Chip ID: 0x%2.2X (%s)\n", mfr, id,
 416                                nand_flash_ids[i].name);
 417 #endif
 418                         if (!nand->mfr) {
 419                                 nand->mfr = mfr;
 420                                 nand->id = id;
 421                                 nand->chipshift =
 422                                     nand_flash_ids[i].chipshift;
 423                                 nand->page256 = nand_flash_ids[i].page256;
 424                                 nand->eccsize = 256;
 425                                 if (nand->page256) {
 426                                         nand->oobblock = 256;
 427                                         nand->oobsize = 8;
 428                                         nand->page_shift = 8;
 429                                 } else {
 430                                         nand->oobblock = 512;
 431                                         nand->oobsize = 16;
 432                                         nand->page_shift = 9;
 433                                 }
 434                                 nand->pageadrlen = nand_flash_ids[i].pageadrlen;
 435                                 nand->erasesize  = nand_flash_ids[i].erasesize;
 436                                 nand->chips_name = nand_flash_ids[i].name;
 437                                 nand->bus16      = nand_flash_ids[i].bus16;
 438                                 return 1;
 439                         }
 440                         return 0;
 441                 }
 442         }
 443
 444
 445 #ifdef NAND_DEBUG
 446         /* We haven't fully identified the chip. Print as much as we know. */
 447         printf("Unknown flash chip found: %2.2X %2.2X\n",
 448                id, mfr);
 449 #endif
 450
 451         return 0;
 452 }
 453
 454 /* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
 455
 456 static void NanD_ScanChips(struct nand_chip *nand)
 457 {
 458         int floor, chip;
 459         int numchips[NAND_MAX_FLOORS];
 460         int maxchips = CONFIG_SYS_NAND_MAX_CHIPS;
 461         int ret = 1;
 462
 463         nand->numchips = 0;
 464         nand->mfr = 0;
 465         nand->id = 0;
 466
 467
 468         /* For each floor, find the number of valid chips it contains */
 469         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 470                 ret = 1;
 471                 numchips[floor] = 0;
 472                 for (chip = 0; chip < maxchips && ret != 0; chip++) {
 473
 474                         ret = NanD_IdentChip(nand, floor, chip);
 475                         if (ret) {
 476                                 numchips[floor]++;
 477                                 nand->numchips++;
 478                         }
 479                 }
 480         }
 481
 482         /* If there are none at all that we recognise, bail */
 483         if (!nand->numchips) {
 484 #ifdef NAND_DEBUG
 485                 puts ("No NAND flash chips recognised.\n");
 486 #endif
 487                 return;
 488         }
 489
 490         /* Allocate an array to hold the information for each chip */
 491         nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
 492         if (!nand->chips) {
 493                 puts ("No memory for allocating chip info structures\n");
 494                 return;
 495         }
 496
 497         ret = 0;
 498
 499         /* Fill out the chip array with {floor, chipno} for each
 500          * detected chip in the device. */
 501         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 502                 for (chip = 0; chip < numchips[floor]; chip++) {
 503                         nand->chips[ret].floor = floor;
 504                         nand->chips[ret].chip = chip;
 505                         nand->chips[ret].curadr = 0;
 506                         nand->chips[ret].curmode = 0x50;
 507                         ret++;
 508                 }
 509         }
 510
 511         /* Calculate and print the total size of the device */
 512         nand->totlen = nand->numchips * (1 << nand->chipshift);
 513
 514 #ifdef NAND_DEBUG
 515         printf("%d flash chips found. Total nand_chip size: %ld MB\n",
 516                nand->numchips, nand->totlen >> 20);
 517 #endif
 518 }
 519
 520 /* we need to be fast here, 1 us per read translates to 1 second per meg */
 521 static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
 522 {
 523         unsigned long nandptr = nand->IO_ADDR;
 524
 525         NanD_Command (nand, NAND_CMD_READ0);
 526
 527         if (nand->bus16) {
 528                 u16 val;
 529
 530                 while (cntr >= 16) {
 531                         val = READ_NAND (nandptr);
 532                         *data_buf++ = val & 0xff;
 533                         *data_buf++ = val >> 8;
 534                         val = READ_NAND (nandptr);
 535                         *data_buf++ = val & 0xff;
 536                         *data_buf++ = val >> 8;
 537                         val = READ_NAND (nandptr);
 538                         *data_buf++ = val & 0xff;
 539                         *data_buf++ = val >> 8;
 540                         val = READ_NAND (nandptr);
 541                         *data_buf++ = val & 0xff;
 542                         *data_buf++ = val >> 8;
 543                         val = READ_NAND (nandptr);
 544                         *data_buf++ = val & 0xff;
 545                         *data_buf++ = val >> 8;
 546                         val = READ_NAND (nandptr);
 547                         *data_buf++ = val & 0xff;
 548                         *data_buf++ = val >> 8;
 549                         val = READ_NAND (nandptr);
 550                         *data_buf++ = val & 0xff;
 551                         *data_buf++ = val >> 8;
 552                         val = READ_NAND (nandptr);
 553                         *data_buf++ = val & 0xff;
 554                         *data_buf++ = val >> 8;
 555                         cntr -= 16;
 556                 }
 557
 558                 while (cntr > 0) {
 559                         val = READ_NAND (nandptr);
 560                         *data_buf++ = val & 0xff;
 561                         *data_buf++ = val >> 8;
 562                         cntr -= 2;
 563                 }
 564         } else {
 565                 while (cntr >= 16) {
 566                         *data_buf++ = READ_NAND (nandptr);
 567                         *data_buf++ = READ_NAND (nandptr);
 568                         *data_buf++ = READ_NAND (nandptr);
 569                         *data_buf++ = READ_NAND (nandptr);
 570                         *data_buf++ = READ_NAND (nandptr);
 571                         *data_buf++ = READ_NAND (nandptr);
 572                         *data_buf++ = READ_NAND (nandptr);
 573                         *data_buf++ = READ_NAND (nandptr);
 574                         *data_buf++ = READ_NAND (nandptr);
 575                         *data_buf++ = READ_NAND (nandptr);
 576                         *data_buf++ = READ_NAND (nandptr);
 577                         *data_buf++ = READ_NAND (nandptr);
 578                         *data_buf++ = READ_NAND (nandptr);
 579                         *data_buf++ = READ_NAND (nandptr);
 580                         *data_buf++ = READ_NAND (nandptr);
 581                         *data_buf++ = READ_NAND (nandptr);
 582                         cntr -= 16;
 583                 }
 584
 585                 while (cntr > 0) {
 586                         *data_buf++ = READ_NAND (nandptr);
 587                         cntr--;
 588                 }
 589         }
 590 }
 591
 592 /*
 593  * NAND read with ECC
 594  */
 595 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
 596                  size_t * retlen, u_char *buf, u_char *ecc_code)
 597 {
 598         int col, page;
 599         int ecc_status = 0;
 600 #ifdef CONFIG_MTD_NAND_ECC
 601         int j;
 602         int ecc_failed = 0;
 603         u_char *data_poi;
 604         u_char ecc_calc[6];
 605 #endif
 606
 607         /* Do not allow reads past end of device */
 608         if ((start + len) > nand->totlen) {
 609                 printf ("%s: Attempt read beyond end of device %x %x %x\n",
 610                         __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
 611                 *retlen = 0;
 612                 return -1;
 613         }
 614
 615         /* First we calculate the starting page */
 616         /*page = shr(start, nand->page_shift);*/
 617         page = start >> nand->page_shift;
 618
 619         /* Get raw starting column */
 620         col = start & (nand->oobblock - 1);
 621
 622         /* Initialize return value */
 623         *retlen = 0;
 624
 625         /* Select the NAND device */
 626         NAND_ENABLE_CE(nand);  /* set pin low */
 627
 628         /* Loop until all data read */
 629         while (*retlen < len) {
 630
 631 #ifdef CONFIG_MTD_NAND_ECC
 632                 /* Do we have this page in cache ? */
 633                 if (nand->cache_page == page)
 634                         goto readdata;
 635                 /* Send the read command */
 636                 NanD_Command(nand, NAND_CMD_READ0);
 637                 if (nand->bus16) {
 638                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 639                                      (page << nand->page_shift) + (col >> 1));
 640                 } else {
 641                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 642                                      (page << nand->page_shift) + col);
 643                 }
 644
 645                 /* Read in a page + oob data */
 646                 NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
 647
 648                 /* copy data into cache, for read out of cache and if ecc fails */
 649                 if (nand->data_cache) {
 650                         memcpy (nand->data_cache, nand->data_buf,
 651                                 nand->oobblock + nand->oobsize);
 652                 }
 653
 654                 /* Pick the ECC bytes out of the oob data */
 655                 for (j = 0; j < 6; j++) {
 656                         ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
 657                 }
 658
 659                 /* Calculate the ECC and verify it */
 660                 /* If block was not written with ECC, skip ECC */
 661                 if (oob_config.eccvalid_pos != -1 &&
 662                     (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
 663
 664                         nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
 665                         switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
 666                         case -1:
 667                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 668                                 ecc_failed++;
 669                                 break;
 670                         case 1:
 671                         case 2: /* transfer ECC corrected data to cache */
 672                                 if (nand->data_cache)
 673                                         memcpy (nand->data_cache, nand->data_buf, 256);
 674                                 break;
 675                         }
 676                 }
 677
 678                 if (oob_config.eccvalid_pos != -1 &&
 679                     nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
 680
 681                         nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
 682                         switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
 683                         case -1:
 684                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 685                                 ecc_failed++;
 686                                 break;
 687                         case 1:
 688                         case 2: /* transfer ECC corrected data to cache */
 689                                 if (nand->data_cache)
 690                                         memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
 691                                 break;
 692                         }
 693                 }
 694 readdata:
 695                 /* Read the data from ECC data buffer into return buffer */
 696                 data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
 697                 data_poi += col;
 698                 if ((*retlen + (nand->oobblock - col)) >= len) {
 699                         memcpy (buf + *retlen, data_poi, len - *retlen);
 700                         *retlen = len;
 701                 } else {
 702                         memcpy (buf + *retlen, data_poi,  nand->oobblock - col);
 703                         *retlen += nand->oobblock - col;
 704                 }
 705                 /* Set cache page address, invalidate, if ecc_failed */
 706                 nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
 707
 708                 ecc_status += ecc_failed;
 709                 ecc_failed = 0;
 710
 711 #else
 712                 /* Send the read command */
 713                 NanD_Command(nand, NAND_CMD_READ0);
 714                 if (nand->bus16) {
 715                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 716                                      (page << nand->page_shift) + (col >> 1));
 717                 } else {
 718                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 719                                      (page << nand->page_shift) + col);
 720                 }
 721
 722                 /* Read the data directly into the return buffer */
 723                 if ((*retlen + (nand->oobblock - col)) >= len) {
 724                         NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
 725                         *retlen = len;
 726                         /* We're done */
 727                         continue;
 728                 } else {
 729                         NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
 730                         *retlen += nand->oobblock - col;
 731                         }
 732 #endif
 733                 /* For subsequent reads align to page boundary. */
 734                 col = 0;
 735                 /* Increment page address */
 736                 page++;
 737         }
 738
 739         /* De-select the NAND device */
 740         NAND_DISABLE_CE(nand);  /* set pin high */
 741
 742         /*
 743          * Return success, if no ECC failures, else -EIO
 744          * fs driver will take care of that, because
 745          * retlen == desired len and result == -EIO
 746          */
 747         return ecc_status ? -1 : 0;
 748 }
 749
 750 /*
 751  *      Nand_page_program function is used for write and writev !
 752  */
 753 static int nand_write_page (struct nand_chip *nand,
 754                             int page, int col, int last, u_char * ecc_code)
 755 {
 756
 757         int i;
 758         unsigned long nandptr = nand->IO_ADDR;
 759
 760 #ifdef CONFIG_MTD_NAND_ECC
 761 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 762         int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
 763 #endif
 764 #endif
 765         /* pad oob area */
 766         for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
 767                 nand->data_buf[i] = 0xff;
 768
 769 #ifdef CONFIG_MTD_NAND_ECC
 770         /* Zero out the ECC array */
 771         for (i = 0; i < 6; i++)
 772                 ecc_code[i] = 0x00;
 773
 774         /* Read back previous written data, if col > 0 */
 775         if (col) {
 776                 NanD_Command (nand, NAND_CMD_READ0);
 777                 if (nand->bus16) {
 778                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 779                                       (page << nand->page_shift) + (col >> 1));
 780                 } else {
 781                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 782                                       (page << nand->page_shift) + col);
 783                 }
 784
 785                 if (nand->bus16) {
 786                         u16 val;
 787
 788                         for (i = 0; i < col; i += 2) {
 789                                 val = READ_NAND (nandptr);
 790                                 nand->data_buf[i] = val & 0xff;
 791                                 nand->data_buf[i + 1] = val >> 8;
 792                         }
 793                 } else {
 794                         for (i = 0; i < col; i++)
 795                                 nand->data_buf[i] = READ_NAND (nandptr);
 796                 }
 797         }
 798
 799         /* Calculate and write the ECC if we have enough data */
 800         if ((col < nand->eccsize) && (last >= nand->eccsize)) {
 801                 nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
 802                 for (i = 0; i < 3; i++) {
 803                         nand->data_buf[(nand->oobblock +
 804                                         oob_config.ecc_pos[i])] = ecc_code[i];
 805                 }
 806                 if (oob_config.eccvalid_pos != -1) {
 807                         nand->data_buf[nand->oobblock +
 808                                        oob_config.eccvalid_pos] = 0xf0;
 809                 }
 810         }
 811
 812         /* Calculate and write the second ECC if we have enough data */
 813         if ((nand->oobblock == 512) && (last == nand->oobblock)) {
 814                 nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
 815                 for (i = 3; i < 6; i++) {
 816                         nand->data_buf[(nand->oobblock +
 817                                         oob_config.ecc_pos[i])] = ecc_code[i];
 818                 }
 819                 if (oob_config.eccvalid_pos != -1) {
 820                         nand->data_buf[nand->oobblock +
 821                                        oob_config.eccvalid_pos] &= 0x0f;
 822                 }
 823         }
 824 #endif
 825         /* Prepad for partial page programming !!! */
 826         for (i = 0; i < col; i++)
 827                 nand->data_buf[i] = 0xff;
 828
 829         /* Postpad for partial page programming !!! oob is already padded */
 830         for (i = last; i < nand->oobblock; i++)
 831                 nand->data_buf[i] = 0xff;
 832
 833         /* Send command to begin auto page programming */
 834         NanD_Command (nand, NAND_CMD_READ0);
 835         NanD_Command (nand, NAND_CMD_SEQIN);
 836         if (nand->bus16) {
 837                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 838                               (page << nand->page_shift) + (col >> 1));
 839         } else {
 840                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 841                               (page << nand->page_shift) + col);
 842         }
 843
 844         /* Write out complete page of data */
 845         if (nand->bus16) {
 846                 for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
 847                         WRITE_NAND (nand->data_buf[i] +
 848                                     (nand->data_buf[i + 1] << 8),
 849                                     nand->IO_ADDR);
 850                 }
 851         } else {
 852                 for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
 853                         WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
 854         }
 855
 856         /* Send command to actually program the data */
 857         NanD_Command (nand, NAND_CMD_PAGEPROG);
 858         NanD_Command (nand, NAND_CMD_STATUS);
 859 #ifdef NAND_NO_RB
 860         {
 861                 u_char ret_val;
 862
 863                 do {
 864                         ret_val = READ_NAND (nandptr);  /* wait till ready */
 865                 } while ((ret_val & 0x40) != 0x40);
 866         }
 867 #endif
 868         /* See if device thinks it succeeded */
 869         if (READ_NAND (nand->IO_ADDR) & 0x01) {
 870                 printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
 871                         page);
 872                 return -1;
 873         }
 874 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 875         /*
 876          * The NAND device assumes that it is always writing to
 877          * a cleanly erased page. Hence, it performs its internal
 878          * write verification only on bits that transitioned from
 879          * 1 to 0. The device does NOT verify the whole page on a
 880          * byte by byte basis. It is possible that the page was
 881          * not completely erased or the page is becoming unusable
 882          * due to wear. The read with ECC would catch the error
 883          * later when the ECC page check fails, but we would rather
 884          * catch it early in the page write stage. Better to write
 885          * no data than invalid data.
 886          */
 887
 888         /* Send command to read back the page */
 889         if (col < nand->eccsize)
 890                 NanD_Command (nand, NAND_CMD_READ0);
 891         else
 892                 NanD_Command (nand, NAND_CMD_READ1);
 893         if (nand->bus16) {
 894                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 895                               (page << nand->page_shift) + (col >> 1));
 896         } else {
 897                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 898                               (page << nand->page_shift) + col);
 899         }
 900
 901         /* Loop through and verify the data */
 902         if (nand->bus16) {
 903                 for (i = col; i < last; i = +2) {
 904                         if ((nand->data_buf[i] +
 905                              (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
 906                                 printf ("%s: Failed write verify, page 0x%08x ",
 907                                         __FUNCTION__, page);
 908                                 return -1;
 909                         }
 910                 }
 911         } else {
 912                 for (i = col; i < last; i++) {
 913                         if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
 914                                 printf ("%s: Failed write verify, page 0x%08x ",
 915                                         __FUNCTION__, page);
 916                                 return -1;
 917                         }
 918                 }
 919         }
 920
 921 #ifdef CONFIG_MTD_NAND_ECC
 922         /*
 923          * We also want to check that the ECC bytes wrote
 924          * correctly for the same reasons stated above.
 925          */
 926         NanD_Command (nand, NAND_CMD_READOOB);
 927         if (nand->bus16) {
 928                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 929                               (page << nand->page_shift) + (col >> 1));
 930         } else {
 931                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 932                               (page << nand->page_shift) + col);
 933         }
 934         if (nand->bus16) {
 935                 for (i = 0; i < nand->oobsize; i += 2) {
 936                         u16 val;
 937
 938                         val = READ_NAND (nand->IO_ADDR);
 939                         nand->data_buf[i] = val & 0xff;
 940                         nand->data_buf[i + 1] = val >> 8;
 941                 }
 942         } else {
 943                 for (i = 0; i < nand->oobsize; i++) {
 944                         nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
 945                 }
 946         }
 947         for (i = 0; i < ecc_bytes; i++) {
 948                 if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
 949                         printf ("%s: Failed ECC write "
 950                                 "verify, page 0x%08x, "
 951                                 "%6i bytes were succesful\n",
 952                                 __FUNCTION__, page, i);
 953                         return -1;
 954                 }
 955         }
 956 #endif  /* CONFIG_MTD_NAND_ECC */
 957 #endif  /* CONFIG_MTD_NAND_VERIFY_WRITE */
 958         return 0;
 959 }
 960
 961 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 962                            size_t * retlen, const u_char * buf, u_char * ecc_code)
 963 {
 964         int i, page, col, cnt, ret = 0;
 965
 966         /* Do not allow write past end of device */
 967         if ((to + len) > nand->totlen) {
 968                 printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
 969                 return -1;
 970         }
 971
 972         /* Shift to get page */
 973         page = ((int) to) >> nand->page_shift;
 974
 975         /* Get the starting column */
 976         col = to & (nand->oobblock - 1);
 977
 978         /* Initialize return length value */
 979         *retlen = 0;
 980
 981         /* Select the NAND device */
 982 #ifdef CONFIG_OMAP1510
 983         archflashwp(0,0);
 984 #endif
 985 #ifdef CONFIG_SYS_NAND_WP
 986         NAND_WP_OFF();
 987 #endif
 988
 989         NAND_ENABLE_CE(nand);  /* set pin low */
 990
 991         /* Check the WP bit */
 992         NanD_Command(nand, NAND_CMD_STATUS);
 993         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
 994                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
 995                 ret = -1;
 996                 goto out;
 997         }
 998
 999         /* Loop until all data is written */
1000         while (*retlen < len) {
1001                 /* Invalidate cache, if we write to this page */
1002                 if (nand->cache_page == page)
1003                         nand->cache_page = -1;
1004
1005                 /* Write data into buffer */
1006                 if ((col + len) >= nand->oobblock) {
1007                         for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
1008                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1009                         }
1010                 } else {
1011                         for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
1012                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1013                         }
1014                 }
1015                 /* We use the same function for write and writev !) */
1016                 ret = nand_write_page (nand, page, col, i, ecc_code);
1017                 if (ret)
1018                         goto out;
1019
1020                 /* Next data start at page boundary */
1021                 col = 0;
1022
1023                 /* Update written bytes count */
1024                 *retlen += cnt;
1025
1026                 /* Increment page address */
1027                 page++;
1028         }
1029
1030         /* Return happy */
1031         *retlen = len;
1032
1033 out:
1034         /* De-select the NAND device */
1035         NAND_DISABLE_CE(nand);  /* set pin high */
1036 #ifdef CONFIG_OMAP1510
1037         archflashwp(0,1);
1038 #endif
1039 #ifdef CONFIG_SYS_NAND_WP
1040         NAND_WP_ON();
1041 #endif
1042
1043         return ret;
1044 }
1045
1046 /* read from the 16 bytes of oob data that correspond to a 512 byte
1047  * page or 2 256-byte pages.
1048  */
1049 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
1050                          size_t * retlen, u_char * buf)
1051 {
1052         int len256 = 0;
1053         struct Nand *mychip;
1054         int ret = 0;
1055
1056         mychip = &nand->chips[ofs >> nand->chipshift];
1057
1058         /* update address for 2M x 8bit devices. OOB starts on the second */
1059         /* page to maintain compatibility with nand_read_ecc. */
1060         if (nand->page256) {
1061                 if (!(ofs & 0x8))
1062                         ofs += 0x100;
1063                 else
1064                         ofs -= 0x8;
1065         }
1066
1067         NAND_ENABLE_CE(nand);  /* set pin low */
1068         NanD_Command(nand, NAND_CMD_READOOB);
1069         if (nand->bus16) {
1070                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1071                              ((ofs >> nand->page_shift) << nand->page_shift) +
1072                                 ((ofs & (nand->oobblock - 1)) >> 1));
1073         } else {
1074                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1075         }
1076
1077         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1078         /* Note: datasheet says it should automaticaly wrap to the */
1079         /*       next OOB block, but it didn't work here. mf.      */
1080         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1081                 len256 = (ofs | 0x7) + 1 - ofs;
1082                 NanD_ReadBuf(nand, buf, len256);
1083
1084                 NanD_Command(nand, NAND_CMD_READOOB);
1085                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1086         }
1087
1088         NanD_ReadBuf(nand, &buf[len256], len - len256);
1089
1090         *retlen = len;
1091         /* Reading the full OOB data drops us off of the end of the page,
1092          * causing the flash device to go into busy mode, so we need
1093          * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
1094
1095         ret = NanD_WaitReady(nand, 1);
1096         NAND_DISABLE_CE(nand);  /* set pin high */
1097
1098         return ret;
1099
1100 }
1101
1102 /* write to the 16 bytes of oob data that correspond to a 512 byte
1103  * page or 2 256-byte pages.
1104  */
1105 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
1106                   size_t * retlen, const u_char * buf)
1107 {
1108         int len256 = 0;
1109         int i;
1110         unsigned long nandptr = nand->IO_ADDR;
1111
1112 #ifdef PSYCHO_DEBUG
1113         printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
1114                (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
1115                buf[8], buf[9], buf[14],buf[15]);
1116 #endif
1117
1118         NAND_ENABLE_CE(nand);  /* set pin low to enable chip */
1119
1120         /* Reset the chip */
1121         NanD_Command(nand, NAND_CMD_RESET);
1122
1123         /* issue the Read2 command to set the pointer to the Spare Data Area. */
1124         NanD_Command(nand, NAND_CMD_READOOB);
1125         if (nand->bus16) {
1126                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1127                              ((ofs >> nand->page_shift) << nand->page_shift) +
1128                                 ((ofs & (nand->oobblock - 1)) >> 1));
1129         } else {
1130                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1131         }
1132
1133         /* update address for 2M x 8bit devices. OOB starts on the second */
1134         /* page to maintain compatibility with nand_read_ecc. */
1135         if (nand->page256) {
1136                 if (!(ofs & 0x8))
1137                         ofs += 0x100;
1138                 else
1139                         ofs -= 0x8;
1140         }
1141
1142         /* issue the Serial Data In command to initial the Page Program process */
1143         NanD_Command(nand, NAND_CMD_SEQIN);
1144         if (nand->bus16) {
1145                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1146                              ((ofs >> nand->page_shift) << nand->page_shift) +
1147                                 ((ofs & (nand->oobblock - 1)) >> 1));
1148         } else {
1149                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1150         }
1151
1152         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1153         /* Note: datasheet says it should automaticaly wrap to the */
1154         /*       next OOB block, but it didn't work here. mf.      */
1155         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1156                 len256 = (ofs | 0x7) + 1 - ofs;
1157                 for (i = 0; i < len256; i++)
1158                         WRITE_NAND(buf[i], nandptr);
1159
1160                 NanD_Command(nand, NAND_CMD_PAGEPROG);
1161                 NanD_Command(nand, NAND_CMD_STATUS);
1162 #ifdef NAND_NO_RB
1163                 { u_char ret_val;
1164                         do {
1165                                 ret_val = READ_NAND(nandptr); /* wait till ready */
1166                         } while ((ret_val & 0x40) != 0x40);
1167                 }
1168 #endif
1169                 if (READ_NAND(nandptr) & 1) {
1170                         puts ("Error programming oob data\n");
1171                         /* There was an error */
1172                         NAND_DISABLE_CE(nand);  /* set pin high */
1173                         *retlen = 0;
1174                         return -1;
1175                 }
1176                 NanD_Command(nand, NAND_CMD_SEQIN);
1177                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1178         }
1179
1180         if (nand->bus16) {
1181                 for (i = len256; i < len; i += 2) {
1182                         WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
1183                 }
1184         } else {
1185                 for (i = len256; i < len; i++)
1186                         WRITE_NAND(buf[i], nandptr);
1187         }
1188
1189         NanD_Command(nand, NAND_CMD_PAGEPROG);
1190         NanD_Command(nand, NAND_CMD_STATUS);
1191 #ifdef NAND_NO_RB
1192         {       u_char ret_val;
1193                 do {
1194                         ret_val = READ_NAND(nandptr); /* wait till ready */
1195                 } while ((ret_val & 0x40) != 0x40);
1196         }
1197 #endif
1198         if (READ_NAND(nandptr) & 1) {
1199                 puts ("Error programming oob data\n");
1200                 /* There was an error */
1201                 NAND_DISABLE_CE(nand);  /* set pin high */
1202                 *retlen = 0;
1203                 return -1;
1204         }
1205
1206         NAND_DISABLE_CE(nand);  /* set pin high */
1207         *retlen = len;
1208         return 0;
1209
1210 }
1211
1212 int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
1213 {
1214         /* This is defined as a structure so it will work on any system
1215          * using native endian jffs2 (the default).
1216          */
1217         static struct jffs2_unknown_node clean_marker = {
1218                 JFFS2_MAGIC_BITMASK,
1219                 JFFS2_NODETYPE_CLEANMARKER,
1220                 8               /* 8 bytes in this node */
1221         };
1222         unsigned long nandptr;
1223         struct Nand *mychip;
1224         int ret = 0;
1225
1226         if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
1227                 printf ("Offset and size must be sector aligned, erasesize = %d\n",
1228                         (int) nand->erasesize);
1229                 return -1;
1230         }
1231
1232         nandptr = nand->IO_ADDR;
1233
1234         /* Select the NAND device */
1235 #ifdef CONFIG_OMAP1510
1236         archflashwp(0,0);
1237 #endif
1238 #ifdef CONFIG_SYS_NAND_WP
1239         NAND_WP_OFF();
1240 #endif
1241     NAND_ENABLE_CE(nand);  /* set pin low */
1242
1243         /* Check the WP bit */
1244         NanD_Command(nand, NAND_CMD_STATUS);
1245         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1246                 printf ("nand_write_ecc: Device is write protected!!!\n");
1247                 ret = -1;
1248                 goto out;
1249         }
1250
1251         /* Check the WP bit */
1252         NanD_Command(nand, NAND_CMD_STATUS);
1253         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1254                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1255                 ret = -1;
1256                 goto out;
1257         }
1258
1259         /* FIXME: Do nand in the background. Use timers or schedule_task() */
1260         while(len) {
1261                 /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
1262                 mychip = &nand->chips[ofs >> nand->chipshift];
1263
1264                 /* always check for bad block first, genuine bad blocks
1265                  * should _never_  be erased.
1266                  */
1267                 if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
1268                         /* Select the NAND device */
1269                         NAND_ENABLE_CE(nand);  /* set pin low */
1270
1271                         NanD_Command(nand, NAND_CMD_ERASE1);
1272                         NanD_Address(nand, ADDR_PAGE, ofs);
1273                         NanD_Command(nand, NAND_CMD_ERASE2);
1274
1275                         NanD_Command(nand, NAND_CMD_STATUS);
1276
1277 #ifdef NAND_NO_RB
1278                         {       u_char ret_val;
1279                                 do {
1280                                         ret_val = READ_NAND(nandptr); /* wait till ready */
1281                                 } while ((ret_val & 0x40) != 0x40);
1282                         }
1283 #endif
1284                         if (READ_NAND(nandptr) & 1) {
1285                                 printf ("%s: Error erasing at 0x%lx\n",
1286                                         __FUNCTION__, (long)ofs);
1287                                 /* There was an error */
1288                                 ret = -1;
1289                                 goto out;
1290                         }
1291                         if (clean) {
1292                                 int n;  /* return value not used */
1293                                 int p, l;
1294
1295                                 /* clean marker position and size depend
1296                                  * on the page size, since 256 byte pages
1297                                  * only have 8 bytes of oob data
1298                                  */
1299                                 if (nand->page256) {
1300                                         p = NAND_JFFS2_OOB8_FSDAPOS;
1301                                         l = NAND_JFFS2_OOB8_FSDALEN;
1302                                 } else {
1303                                         p = NAND_JFFS2_OOB16_FSDAPOS;
1304                                         l = NAND_JFFS2_OOB16_FSDALEN;
1305                                 }
1306
1307                                 ret = nand_write_oob(nand, ofs + p, l, (size_t *)&n,
1308                                                      (u_char *)&clean_marker);
1309                                 /* quit here if write failed */
1310                                 if (ret)
1311                                         goto out;
1312                         }
1313                 }
1314                 ofs += nand->erasesize;
1315                 len -= nand->erasesize;
1316         }
1317
1318 out:
1319         /* De-select the NAND device */
1320         NAND_DISABLE_CE(nand);  /* set pin high */
1321 #ifdef CONFIG_OMAP1510
1322         archflashwp(0,1);
1323 #endif
1324 #ifdef CONFIG_SYS_NAND_WP
1325         NAND_WP_ON();
1326 #endif
1327
1328         return ret;
1329 }
1330
1331
1332 static inline int nandcheck(unsigned long potential, unsigned long physadr)
1333 {
1334         return 0;
1335 }
1336
1337 unsigned long nand_probe(unsigned long physadr)
1338 {
1339         struct nand_chip *nand = NULL;
1340         int i = 0, ChipID = 1;
1341
1342 #ifdef CONFIG_MTD_NAND_ECC_JFFS2
1343         oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
1344         oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
1345         oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
1346         oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
1347         oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
1348         oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
1349         oob_config.eccvalid_pos = 4;
1350 #else
1351         oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
1352         oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
1353         oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
1354         oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
1355         oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
1356         oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
1357         oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
1358 #endif
1359         oob_config.badblock_pos = 5;
1360
1361         for (i=0; i<CONFIG_SYS_MAX_NAND_DEVICE; i++) {
1362                 if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
1363                         nand = &nand_dev_desc[i];
1364                         break;
1365                 }
1366         }
1367         if (!nand)
1368                 return (0);
1369
1370         memset((char *)nand, 0, sizeof(struct nand_chip));
1371
1372         nand->IO_ADDR = physadr;
1373         nand->cache_page = -1;  /* init the cache page */
1374         NanD_ScanChips(nand);
1375
1376         if (nand->totlen == 0) {
1377                 /* no chips found, clean up and quit */
1378                 memset((char *)nand, 0, sizeof(struct nand_chip));
1379                 nand->ChipID = NAND_ChipID_UNKNOWN;
1380                 return (0);
1381         }
1382
1383         nand->ChipID = ChipID;
1384         if (curr_device == -1)
1385                 curr_device = i;
1386
1387         nand->data_buf = malloc (nand->oobblock + nand->oobsize);
1388         if (!nand->data_buf) {
1389                 puts ("Cannot allocate memory for data structures.\n");
1390                 return (0);
1391         }
1392
1393         return (nand->totlen);
1394 }
1395
1396 #ifdef CONFIG_MTD_NAND_ECC
1397 /*
1398  * Pre-calculated 256-way 1 byte column parity
1399  */
1400 static const u_char nand_ecc_precalc_table[] = {
1401         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1402         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
1403         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1404         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1405         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1406         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1407         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1408         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1409         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1410         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1411         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1412         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1413         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1414         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1415         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1416         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1417         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1418         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1419         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1420         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1421         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1422         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1423         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1424         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1425         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1426         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1427         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1428         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1429         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1430         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1431         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1432         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
1433 };
1434
1435
1436 /*
1437  * Creates non-inverted ECC code from line parity
1438  */
1439 static void nand_trans_result(u_char reg2, u_char reg3,
1440         u_char *ecc_code)
1441 {
1442         u_char a, b, i, tmp1, tmp2;
1443
1444         /* Initialize variables */
1445         a = b = 0x80;
1446         tmp1 = tmp2 = 0;
1447
1448         /* Calculate first ECC byte */
1449         for (i = 0; i < 4; i++) {
1450                 if (reg3 & a)           /* LP15,13,11,9 --> ecc_code[0] */
1451                         tmp1 |= b;
1452                 b >>= 1;
1453                 if (reg2 & a)           /* LP14,12,10,8 --> ecc_code[0] */
1454                         tmp1 |= b;
1455                 b >>= 1;
1456                 a >>= 1;
1457         }
1458
1459         /* Calculate second ECC byte */
1460         b = 0x80;
1461         for (i = 0; i < 4; i++) {
1462                 if (reg3 & a)           /* LP7,5,3,1 --> ecc_code[1] */
1463                         tmp2 |= b;
1464                 b >>= 1;
1465                 if (reg2 & a)           /* LP6,4,2,0 --> ecc_code[1] */
1466                         tmp2 |= b;
1467                 b >>= 1;
1468                 a >>= 1;
1469         }
1470
1471         /* Store two of the ECC bytes */
1472         ecc_code[0] = tmp1;
1473         ecc_code[1] = tmp2;
1474 }
1475
1476 /*
1477  * Calculate 3 byte ECC code for 256 byte block
1478  */
1479 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
1480 {
1481         u_char idx, reg1, reg3;
1482         int j;
1483
1484         /* Initialize variables */
1485         reg1 = reg3 = 0;
1486         ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
1487
1488         /* Build up column parity */
1489         for(j = 0; j < 256; j++) {
1490
1491                 /* Get CP0 - CP5 from table */
1492                 idx = nand_ecc_precalc_table[dat[j]];
1493                 reg1 ^= idx;
1494
1495                 /* All bit XOR = 1 ? */
1496                 if (idx & 0x40) {
1497                         reg3 ^= (u_char) j;
1498                 }
1499         }
1500
1501         /* Create non-inverted ECC code from line parity */
1502         nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
1503
1504         /* Calculate final ECC code */
1505         ecc_code[0] = ~ecc_code[0];
1506         ecc_code[1] = ~ecc_code[1];
1507         ecc_code[2] = ((~reg1) << 2) | 0x03;
1508 }
1509
1510 /*
1511  * Detect and correct a 1 bit error for 256 byte block
1512  */
1513 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
1514 {
1515         u_char a, b, c, d1, d2, d3, add, bit, i;
1516
1517         /* Do error detection */
1518         d1 = calc_ecc[0] ^ read_ecc[0];
1519         d2 = calc_ecc[1] ^ read_ecc[1];
1520         d3 = calc_ecc[2] ^ read_ecc[2];
1521
1522         if ((d1 | d2 | d3) == 0) {
1523                 /* No errors */
1524                 return 0;
1525         } else {
1526                 a = (d1 ^ (d1 >> 1)) & 0x55;
1527                 b = (d2 ^ (d2 >> 1)) & 0x55;
1528                 c = (d3 ^ (d3 >> 1)) & 0x54;
1529
1530                 /* Found and will correct single bit error in the data */
1531                 if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
1532                         c = 0x80;
1533                         add = 0;
1534                         a = 0x80;
1535                         for (i=0; i<4; i++) {
1536                                 if (d1 & c)
1537                                         add |= a;
1538                                 c >>= 2;
1539                                 a >>= 1;
1540                         }
1541                         c = 0x80;
1542                         for (i=0; i<4; i++) {
1543                                 if (d2 & c)
1544                                         add |= a;
1545                                 c >>= 2;
1546                                 a >>= 1;
1547                         }
1548                         bit = 0;
1549                         b = 0x04;
1550                         c = 0x80;
1551                         for (i=0; i<3; i++) {
1552                                 if (d3 & c)
1553                                         bit |= b;
1554                                 c >>= 2;
1555                                 b >>= 1;
1556                         }
1557                         b = 0x01;
1558                         a = dat[add];
1559                         a ^= (b << bit);
1560                         dat[add] = a;
1561                         return 1;
1562                 }
1563                 else {
1564                         i = 0;
1565                         while (d1) {
1566                                 if (d1 & 0x01)
1567                                         ++i;
1568                                 d1 >>= 1;
1569                         }
1570                         while (d2) {
1571                                 if (d2 & 0x01)
1572                                         ++i;
1573                                 d2 >>= 1;
1574                         }
1575                         while (d3) {
1576                                 if (d3 & 0x01)
1577                                         ++i;
1578                                 d3 >>= 1;
1579                         }
1580                         if (i == 1) {
1581                                 /* ECC Code Error Correction */
1582                                 read_ecc[0] = calc_ecc[0];
1583                                 read_ecc[1] = calc_ecc[1];
1584                                 read_ecc[2] = calc_ecc[2];
1585                                 return 2;
1586                         }
1587                         else {
1588                                 /* Uncorrectable Error */
1589                                 return -1;
1590                         }
1591                 }
1592         }
1593
1594         /* Should never happen */
1595         return -1;
1596 }
1597
1598 #endif
1599
1600 #ifdef CONFIG_JFFS2_NAND
1601 int read_jffs2_nand(size_t start, size_t len,
1602                 size_t * retlen, u_char * buf, int nanddev)
1603 {
1604         return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
1605                         start, len, retlen, buf);
1606 }
1607 #endif /* CONFIG_JFFS2_NAND */