In case you have questions about, problems with or contributions for
U-Boot you should send a message to the U-Boot mailing list at
-<u-boot-users@lists.sourceforge.net>. There is also an archive of
-previous traffic on the mailing list - please search the archive
-before asking FAQ's. Please see
-http://lists.sourceforge.net/lists/listinfo/u-boot-users/
+<u-boot@lists.denx.de>. There is also an archive of previous traffic
+on the mailing list - please search the archive before asking FAQ's.
+Please see http://lists.denx.de/pipermail/u-boot and
+http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
Where to get source code:
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
The "snapshot" links on this page allow you to download tarballs of
-any version you might be interested in. Ofifcial releases are also
+any version you might be interested in. Official releases are also
available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
directory.
* Provide extended interface to Linux boot loader
* S-Record download
* network boot
- * PCMCIA / CompactFLash / ATA disk / SCSI ... boot
+ * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
- create ARMBoot project (http://sourceforge.net/projects/armboot)
- add other CPU families (starting with ARM)
- create U-Boot project (http://sourceforge.net/projects/u-boot)
-- current project page: see http://www.denx.de/wiki/UBoot
+- current project page: see http://www.denx.de/wiki/U-Boot
Names and Spelling:
- arm926ejs Files specific to ARM 926 CPUs
- arm1136 Files specific to ARM 1136 CPUs
- at32ap Files specific to Atmel AVR32 AP CPUs
+ - blackfin Files specific to Analog Devices Blackfin CPUs
- i386 Files specific to i386 CPUs
- ixp Files specific to Intel XScale IXP CPUs
+ - leon2 Files specific to Gaisler LEON2 SPARC CPU
+ - leon3 Files specific to Gaisler LEON3 SPARC CPU
- mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
- mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
- mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
- include Header Files
- lib_arm Files generic to ARM architecture
- lib_avr32 Files generic to AVR32 architecture
+- lib_blackfin Files generic to Blackfin architecture
- lib_generic Files generic to all architectures
- lib_i386 Files generic to i386 architecture
- lib_m68k Files generic to m68k architecture
- lib_mips Files generic to MIPS architecture
- lib_nios Files generic to NIOS architecture
- lib_ppc Files generic to PowerPC architecture
+- lib_sparc Files generic to SPARC architecture
- libfdt Library files to support flattened device trees
- net Networking code
- post Power On Self Test
* Configuration _SETTINGS_:
These depend on the hardware etc. and should not be meddled with if
you don't know what you're doing; they have names beginning with
- "CFG_".
+ "CONFIG_SYS_".
Later we will add a configuration tool - probably similar to or even
identical to what's used for the Linux kernel. Right now, we have to
cd u-boot
make TQM823L_config
-For the Cogent platform, you need to specify the cpu type as well;
+For the Cogent platform, you need to specify the CPU type as well;
e.g. "make cogent_mpc8xx_config". And also configure the cogent
directory according to the instructions in cogent/README.
- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
Define one or more of
CONFIG_LCD_HEARTBEAT - update a character position on
- the lcd display every second with
+ the LCD display every second with
a "rotator" |\-/|\-/
- Board flavour: (if CONFIG_MPC8260ADS is defined)
CONFIG_ADSTYPE
Possible values are:
- CFG_8260ADS - original MPC8260ADS
- CFG_8266ADS - MPC8266ADS
- CFG_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
- CFG_8272ADS - MPC8272ADS
+ CONFIG_SYS_8260ADS - original MPC8260ADS
+ CONFIG_SYS_8266ADS - MPC8266ADS
+ CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
+ CONFIG_SYS_8272ADS - MPC8272ADS
- MPC824X Family Member (if CONFIG_MPC824X is defined)
Define exactly one of
CONFIG_MPC8240, CONFIG_MPC8245
-- 8xx CPU Options: (if using an MPC8xx cpu)
+- 8xx CPU Options: (if using an MPC8xx CPU)
CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
get_gclk_freq() cannot work
e.g. if there is no 32KHz
or XTAL/EXTAL)
- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
- CFG_8xx_CPUCLK_MIN
- CFG_8xx_CPUCLK_MAX
+ CONFIG_SYS_8xx_CPUCLK_MIN
+ CONFIG_SYS_8xx_CPUCLK_MAX
CONFIG_8xx_CPUCLK_DEFAULT
See doc/README.MPC866
- CFG_MEASURE_CPUCLK
+ CONFIG_SYS_MEASURE_CPUCLK
Define this to measure the actual CPU clock instead
of relying on the correctness of the configured
values. Mostly useful for board bringup to make sure
the PLL is locked at the intended frequency. Note
that this requires a (stable) reference clock (32 kHz
- RTC clock or CFG_8XX_XIN)
+ RTC clock or CONFIG_SYS_8XX_XIN)
- Intel Monahans options:
- CFG_MONAHANS_RUN_MODE_OSC_RATIO
+ CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
Defines the Monahans run mode to oscillator
ratio. Valid values are 8, 16, 24, 31. The core
frequency is this value multiplied by 13 MHz.
- CFG_MONAHANS_TURBO_RUN_MODE_RATIO
+ CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
Defines the Monahans turbo mode to oscillator
ratio. Valid values are 1 (default if undefined) and
CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
- When transfering memsize parameter to linux, some versions
+ When transferring memsize parameter to linux, some versions
expect it to be in bytes, others in MB.
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
- CONFIG_OF_LIBFDT / CONFIG_OF_FLAT_TREE
+ CONFIG_OF_LIBFDT
New kernel versions are expecting firmware settings to be
passed using flattened device trees (based on open firmware
* Adds the "fdt" command
* The bootm command automatically updates the fdt
- CONFIG_OF_FLAT_TREE
- * Deprecated, see CONFIG_OF_LIBFDT
- * Original ft_build.c-based support
- * Automatically modifies the dft as part of the bootm command
- * The environment variable "disable_of", when set,
- disables this functionality.
-
OF_CPU - The proper name of the cpus node.
OF_SOC - The proper name of the soc node.
OF_TBCLK - The timebase frequency.
OF_STDOUT_PATH - The path to the console device
- boards with QUICC Engines require OF_QE to set UCC mac addresses
+ boards with QUICC Engines require OF_QE to set UCC MAC
+ addresses
CONFIG_OF_BOARD_SETUP
CONFIG_OF_BOOT_CPU
- This define fills in the correct boot cpu in the boot
+ This define fills in the correct boot CPU in the boot
param header, the default value is zero if undefined.
+- vxWorks boot parameters:
+
+ bootvx constructs a valid bootline using the following
+ environments variables: bootfile, ipaddr, serverip, hostname.
+ It loads the vxWorks image pointed bootfile.
+
+ CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
+ CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
+ CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
+ CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
+
+ CONFIG_SYS_VXWORKS_ADD_PARAMS
+
+ Add it at the end of the bootline. E.g "u=username pw=secret"
+
+ Note: If a "bootargs" environment is defined, it will overwride
+ the defaults discussed just above.
+
- Serial Ports:
- CFG_PL010_SERIAL
+ CONFIG_PL010_SERIAL
Define this if you want support for Amba PrimeCell PL010 UARTs.
- CFG_PL011_SERIAL
+ CONFIG_PL011_SERIAL
Define this if you want support for Amba PrimeCell PL011 UARTs.
CONFIG_CONSOLE_CURSOR cursor drawing on/off
(requires blink timer
cf. i8042.c)
- CFG_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
+ CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
CONFIG_CONSOLE_TIME display time/date info in
upper right corner
(requires CONFIG_CMD_DATE)
linux_logo.h for logo.
Requires CONFIG_VIDEO_LOGO
CONFIG_CONSOLE_EXTRA_INFO
- addional board info beside
+ additional board info beside
the logo
When CONFIG_CFB_CONSOLE is defined, video console is
- Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
- CFG_BAUDRATE_TABLE, see below.
- CFG_BRGCLK_PRESCALE, baudrate prescale
+ CONFIG_SYS_BAUDRATE_TABLE, see below.
+ CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
- Interrupt driven serial port input:
CONFIG_SERIAL_SOFTWARE_FIFO
The value of these goes into the environment as
"ramboot" and "nfsboot" respectively, and can be used
as a convenience, when switching between booting from
- ram and nfs.
+ RAM and NFS.
- Pre-Boot Commands:
CONFIG_PREBOOT
- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
CONFIG_KGDB_BAUDRATE
Select one of the baudrates listed in
- CFG_BAUDRATE_TABLE, see below.
+ CONFIG_SYS_BAUDRATE_TABLE, see below.
- Monitor Functions:
Monitor commands can be included or excluded
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
- CONFIG_CMD_BSP * Board SPecific functions
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
+ CONFIG_RTC_MC13783 - use MC13783 RTC
CONFIG_RTC_MC146818 - use MC146818 RTC
CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
CONFIG_RTC_DS164x - use Dallas DS164x RTC
CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
- CFG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
+ CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
- Partition Support:
CONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION
- and/or CONFIG_ISO_PARTITION
+ and/or CONFIG_ISO_PARTITION and/or CONFIG_EFI_PARTITION
If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
CONFIG_CMD_SCSI) you must configure support for at
CONFIG_LBA48
Set this to enable support for disks larger than 137GB
- Also look at CFG_64BIT_LBA ,CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL
+ Also look at CONFIG_SYS_64BIT_LBA ,CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
Whithout these , LBA48 support uses 32bit variables and will 'only'
support disks up to 2.1TB.
- CFG_64BIT_LBA:
+ CONFIG_SYS_64BIT_LBA:
When enabled, makes the IDE subsystem use 64bit sector addresses.
Default is 32bit.
SYM53C8XX SCSI controller; define
CONFIG_SCSI_SYM53C8XX to enable it.
- CFG_SCSI_MAX_LUN [8], CFG_SCSI_MAX_SCSI_ID [7] and
- CFG_SCSI_MAX_DEVICE [CFG_SCSI_MAX_SCSI_ID *
- CFG_SCSI_MAX_LUN] can be adjusted to define the
+ CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
+ CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
+ CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
maximum numbers of LUNs, SCSI ID's and target
devices.
- CFG_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
+ CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
- NETWORK Support (PCI):
CONFIG_E1000
Support for Intel 8254x gigabit chips.
CONFIG_E1000_FALLBACK_MAC
- default MAC for empty eeprom after production.
+ default MAC for empty EEPROM after production.
CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
- Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
+ Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
write routine for first time initialisation.
CONFIG_TULIP
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
+ CONFIG_DRIVER_SMC911X
+ Support for SMSC's LAN911x and LAN921x chips
+
+ CONFIG_DRIVER_SMC911X_BASE
+ Define this to hold the physical address
+ of the device (I/O space)
+
+ CONFIG_DRIVER_SMC911X_32_BIT
+ Define this if data bus is 32 bits
+
+ CONFIG_DRIVER_SMC911X_16_BIT
+ Define this if data bus is 16 bits. If your processor
+ automatically converts one 32 bit word to two 16 bit
+ words you may also try CONFIG_DRIVER_SMC911X_32_BIT.
+
- USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405, MPC5200); define
CONFIG_USB_CONFIG
for differential drivers: 0x00001000
for single ended drivers: 0x00005000
- CFG_USB_EVENT_POLL
+ CONFIG_SYS_USB_EVENT_POLL
May be defined to allow interrupt polling
instead of using asynchronous interrupts
Define the below if you wish to use the USB console.
Once firmware is rebuilt from a serial console issue the
command "setenv stdin usbtty; setenv stdout usbtty" and
- attach your usb cable. The Unix command "dmesg" should print
+ attach your USB cable. The Unix command "dmesg" should print
it has found a new device. The environment variable usbtty
can be set to gserial or cdc_acm to enable your device to
appear to a USB host as a Linux gserial device or a
Define this to have a tty type of device available to
talk to the UDC device
- CFG_CONSOLE_IS_IN_ENV
+ CONFIG_SYS_CONSOLE_IS_IN_ENV
Define this if you want stdin, stdout &/or stderr to
be set to usbtty.
mpc8xx:
- CFG_USB_EXTC_CLK 0xBLAH
+ CONFIG_SYS_USB_EXTC_CLK 0xBLAH
Derive USB clock from external clock "blah"
- - CFG_USB_EXTC_CLK 0x02
+ - CONFIG_SYS_USB_EXTC_CLK 0x02
- CFG_USB_BRG_CLK 0xBLAH
+ CONFIG_SYS_USB_BRG_CLK 0xBLAH
Derive USB clock from brgclk
- - CFG_USB_BRG_CLK 0x04
+ - CONFIG_SYS_USB_BRG_CLK 0x04
If you have a USB-IF assigned VendorID then you may wish to
define your own vendor specific values either in BoardName.h
CONFIG_JFFS2_NAND_DEV
Define these for a default partition on a NAND device
- CFG_JFFS2_FIRST_SECTOR,
- CFG_JFFS2_FIRST_BANK, CFG_JFFS2_NUM_BANKS
+ CONFIG_SYS_JFFS2_FIRST_SECTOR,
+ CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
Define these for a default partition on a NOR device
- CFG_JFFS_CUSTOM_PART
+ CONFIG_SYS_JFFS_CUSTOM_PART
Define this to create an own partition. You have to provide a
function struct part_info* jffs2_part_info(int part_num)
If you define only one JFFS2 partition you may also want to
- #define CFG_JFFS_SINGLE_PART 1
+ #define CONFIG_SYS_JFFS_SINGLE_PART 1
to disable the command chpart. This is the default when you
have not defined a custom partition
assumed.
For the CT69000 and SMI_LYNXEM drivers, videomode is
- selected via environment 'videomode'. Two diferent ways
+ selected via environment 'videomode'. Two different ways
are possible:
- "videomode=num" 'num' is a standard LiLo mode numbers.
Following standard modes are supported (* is default):
display); also select one of the supported displays
by defining one of these:
+ CONFIG_ATMEL_LCD:
+
+ HITACHI TX09D70VM1CCA, 3.5", 240x320.
+
CONFIG_NEC_NL6448AC33:
NEC NL6448AC33-18. Active, color, single scan.
320x240. Black & white.
Normally display is black on white background; define
- CFG_WHITE_ON_BLACK to get it inverted.
+ CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
- Splash Screen Support: CONFIG_SPLASH_SCREEN
compressed images are supported.
NOTE: the bzip2 algorithm requires a lot of RAM, so
- the malloc area (as defined by CFG_MALLOC_LEN) should
+ the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
be at least 4MB.
+ CONFIG_LZMA
+
+ If this option is set, support for lzma compressed
+ images is included.
+
+ Note: The LZMA algorithm adds between 2 and 4KB of code and it
+ requires an amount of dynamic memory that is given by the
+ formula:
+
+ (1846 + 768 << (lc + lp)) * sizeof(uint16)
+
+ Where lc and lp stand for, respectively, Literal context bits
+ and Literal pos bits.
+
+ This value is upper-bounded by 14MB in the worst case. Anyway,
+ for a ~4MB large kernel image, we have lc=3 and lp=0 for a
+ total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
+ a very small buffer.
+
+ Use the lzmainfo tool to determinate the lc and lp values and
+ then calculate the amount of needed dynamic memory (ensuring
+ the appropriate CONFIG_SYS_MALLOC_LEN value).
+
- MII/PHY support:
CONFIG_PHY_ADDR
CONFIG_PHY_GIGE
If this option is set, support for speed/duplex
- detection of Gigabit PHY is included.
+ detection of gigabit PHY is included.
CONFIG_PHY_RESET_DELAY
- Ethernet address:
CONFIG_ETHADDR
+ CONFIG_ETH1ADDR
CONFIG_ETH2ADDR
CONFIG_ETH3ADDR
+ CONFIG_ETH4ADDR
+ CONFIG_ETH5ADDR
- Define a default value for ethernet address to use
- for the respective ethernet interface, in case this
+ Define a default value for Ethernet address to use
+ for the respective Ethernet interface, in case this
is not determined automatically.
- IP address:
CONFIG_IPADDR
Define a default value for the IP address to use for
- the default ethernet interface, in case this is not
+ the default Ethernet interface, in case this is not
determined through e.g. bootp.
- Server IP address:
CONFIG_SERVERIP
- Defines a default value for theIP address of a TFTP
+ Defines a default value for the IP address of a TFTP
server to contact when using the "tftboot" command.
- Multicast TFTP Mode:
Defines whether you want to support multicast TFTP as per
rfc-2090; for example to work with atftp. Lets lots of targets
- tftp down the same boot image concurrently. Note: the ethernet
+ tftp down the same boot image concurrently. Note: the Ethernet
driver in use must provide a function: mcast() to join/leave a
multicast group.
A printf format string which contains the ascii name of
the port. Normally is set to "eth%d" which sets
- eth0 for the first ethernet, eth1 for the second etc.
+ eth0 for the first Ethernet, eth1 for the second etc.
CONFIG_CDP_CAPABILITIES
These enable I2C serial bus commands. Defining either of
(but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
- include the appropriate I2C driver for the selected cpu.
+ include the appropriate I2C driver for the selected CPU.
This will allow you to use i2c commands at the u-boot
command line (as long as you set CONFIG_CMD_I2C in
There are several other quantities that must also be
defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C.
- In both cases you will need to define CFG_I2C_SPEED
+ In both cases you will need to define CONFIG_SYS_I2C_SPEED
to be the frequency (in Hz) at which you wish your i2c bus
- to run and CFG_I2C_SLAVE to be the address of this node (ie
- the cpu's i2c node address).
+ to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
+ the CPU's i2c node address).
Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c)
- sets the cpu up as a master node and so its address should
+ sets the CPU up as a master node and so its address should
therefore be cleared to 0 (See, eg, MPC823e User's Manual
- p.16-473). So, set CFG_I2C_SLAVE to 0.
+ p.16-473). So, set CONFIG_SYS_I2C_SLAVE to 0.
That's all that's required for CONFIG_HARD_I2C.
#define I2C_DELAY udelay(2)
- CFG_I2C_INIT_BOARD
+ CONFIG_SYS_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
chips might think that the current transfer is still
active. To switch to a different bus, use the 'i2c dev' command.
Note that bus numbering is zero-based.
- CFG_I2C_NOPROBES
+ CONFIG_SYS_I2C_NOPROBES
This option specifies a list of I2C devices that will be skipped
when the 'i2c probe' command is issued (or 'iprobe' using the legacy
e.g.
#undef CONFIG_I2C_MULTI_BUS
- #define CFG_I2C_NOPROBES {0x50,0x68}
+ #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
will skip addresses 0x50 and 0x68 on a board with one I2C bus
#define CONFIG_I2C_MULTI_BUS
- #define CFG_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
+ #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
- CFG_SPD_BUS_NUM
+ CONFIG_SYS_SPD_BUS_NUM
If defined, then this indicates the I2C bus number for DDR SPD.
If not defined, then U-Boot assumes that SPD is on I2C bus 0.
- CFG_RTC_BUS_NUM
+ CONFIG_SYS_RTC_BUS_NUM
If defined, then this indicates the I2C bus number for the RTC.
If not defined, then U-Boot assumes that RTC is on I2C bus 0.
- CFG_DTT_BUS_NUM
+ CONFIG_SYS_DTT_BUS_NUM
If defined, then this indicates the I2C bus number for the DTT.
If not defined, then U-Boot assumes that DTT is on I2C bus 0.
+ CONFIG_SYS_I2C_DTT_ADDR:
+
+ If defined, specifies the I2C address of the DTT device.
+ If not defined, then U-Boot uses predefined value for
+ specified DTT device.
+
CONFIG_FSL_I2C
Define this option if you want to use Freescale's I2C driver in
drivers/i2c/fsl_i2c.c.
+ CONFIG_I2C_MUX
+
+ Define this option if you have I2C devices reached over 1 .. n
+ I2C Muxes like the pca9544a. This option addes a new I2C
+ Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a
+ new I2C Bus to the existing I2C Busses. If you select the
+ new Bus with "i2c dev", u-bbot sends first the commandos for
+ the muxes to activate this new "bus".
+
+ CONFIG_I2C_MULTI_BUS must be also defined, to use this
+ feature!
+
+ Example:
+ Adding a new I2C Bus reached over 2 pca9544a muxes
+ The First mux with address 70 and channel 6
+ The Second mux with address 71 and channel 4
+
+ => i2c bus pca9544a:70:6:pca9544a:71:4
+
+ Use the "i2c bus" command without parameter, to get a list
+ of I2C Busses with muxes:
+
+ => i2c bus
+ Busses reached over muxes:
+ Bus ID: 2
+ reached over Mux(es):
+ pca9544a@70 ch: 4
+ Bus ID: 3
+ reached over Mux(es):
+ pca9544a@70 ch: 6
+ pca9544a@71 ch: 4
+ =>
+
+ If you now switch to the new I2C Bus 3 with "i2c dev 3"
+ u-boot sends First the Commando to the mux@70 to enable
+ channel 6, and then the Commando to the mux@71 to enable
+ the channel 4.
+
+ After that, you can use the "normal" i2c commands as
+ usual, to communicate with your I2C devices behind
+ the 2 muxes.
+
+ This option is actually implemented for the bitbanging
+ algorithm in common/soft_i2c.c and for the Hardware I2C
+ Bus on the MPC8260. But it should be not so difficult
+ to add this option to other architectures.
+
- SPI Support: CONFIG_SPI
Currently supported on some MPC8xxx processors. For an
example, see include/configs/mpc8349emds.h.
+ CONFIG_MXC_SPI
+
+ Enables the driver for the SPI controllers on i.MX and MXC
+ SoCs. Currently only i.MX31 is supported.
+
- FPGA Support: CONFIG_FPGA
Enables FPGA subsystem.
Specify the number of FPGA devices to support.
- CFG_FPGA_PROG_FEEDBACK
+ CONFIG_SYS_FPGA_PROG_FEEDBACK
Enable printing of hash marks during FPGA configuration.
- CFG_FPGA_CHECK_BUSY
+ CONFIG_SYS_FPGA_CHECK_BUSY
Enable checks on FPGA configuration interface busy
status by the configuration function. This option
If defined, a function that provides delays in the FPGA
configuration driver.
- CFG_FPGA_CHECK_CTRLC
+ CONFIG_SYS_FPGA_CHECK_CTRLC
Allow Control-C to interrupt FPGA configuration
- CFG_FPGA_CHECK_ERROR
+ CONFIG_SYS_FPGA_CHECK_ERROR
Check for configuration errors during FPGA bitfile
loading. For example, abort during Virtex II
configuration if the INIT_B line goes low (which
indicated a CRC error).
- CFG_FPGA_WAIT_INIT
+ CONFIG_SYS_FPGA_WAIT_INIT
Maximum time to wait for the INIT_B line to deassert
after PROB_B has been deasserted during a Virtex II
FPGA configuration sequence. The default time is 500
- mS.
+ ms.
- CFG_FPGA_WAIT_BUSY
+ CONFIG_SYS_FPGA_WAIT_BUSY
Maximum time to wait for BUSY to deassert during
- Virtex II FPGA configuration. The default is 5 mS.
+ Virtex II FPGA configuration. The default is 5 ms.
- CFG_FPGA_WAIT_CONFIG
+ CONFIG_SYS_FPGA_WAIT_CONFIG
Time to wait after FPGA configuration. The default is
- 200 mS.
+ 200 ms.
- Configuration Management:
CONFIG_IDENT_STRING
protects these variables from casual modification by
the user. Once set, these variables are read-only,
and write or delete attempts are rejected. You can
- change this behviour:
+ change this behaviour:
If CONFIG_ENV_OVERWRITE is #defined in your config
file, the write protection for vendor parameters is
Alternatively, if you #define _both_ CONFIG_ETHADDR
_and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
- ethernet address is installed in the environment,
+ Ethernet address is installed in the environment,
which can be changed exactly ONCE by the user. [The
serial# is unaffected by this, i. e. it remains
read-only.]
Define this variable to stop the system in case of a
fatal error, so that you have to reset it manually.
This is probably NOT a good idea for an embedded
- system where you want to system to reboot
+ system where you want the system to reboot
automatically as fast as possible, but it may be
useful during development since you can try to debug
the conditions that lead to the situation.
before giving up the operation. If not defined, a
default value of 5 is used.
+ CONFIG_ARP_TIMEOUT
+
+ Timeout waiting for an ARP reply in milliseconds.
+
- Command Interpreter:
CONFIG_AUTO_COMPLETE
for the "hush" shell.
- CFG_HUSH_PARSER
+ CONFIG_SYS_HUSH_PARSER
Define this variable to enable the "hush" shell (from
Busybox) as command line interpreter, thus enabling
with a somewhat smaller memory footprint.
- CFG_PROMPT_HUSH_PS2
+ CONFIG_SYS_PROMPT_HUSH_PS2
This defines the secondary prompt string, which is
printed when the command interpreter needs more input
- Commandline Editing and History:
CONFIG_CMDLINE_EDITING
- Enable editiong and History functions for interactive
+ Enable editing and History functions for interactive
commandline input operations
- Default Environment:
Adding this option adds support for Xilinx SystemACE
chips attached via some sort of local bus. The address
- of the chip must alsh be defined in the
- CFG_SYSTEMACE_BASE macro. For example:
+ of the chip must also be defined in the
+ CONFIG_SYS_SYSTEMACE_BASE macro. For example:
#define CONFIG_SYSTEMACE
- #define CFG_SYSTEMACE_BASE 0xf0000000
+ #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
When SystemACE support is added, the "ace" device type
becomes available to the fat commands, i.e. fatls.
example, some LED's) on your board. At the moment,
the following checkpoints are implemented:
+- Automatic software updates via TFTP server
+ CONFIG_UPDATE_TFTP
+ CONFIG_UPDATE_TFTP_CNT_MAX
+ CONFIG_UPDATE_TFTP_MSEC_MAX
+
+ These options enable and control the auto-update feature;
+ for a more detailed description refer to doc/README.update.
+
Legacy uImage format:
Arg Where When
-12 common/image.c Ramdisk data has bad checksum
11 common/image.c Ramdisk data has correct checksum
12 common/image.c Ramdisk verification complete, start loading
- -13 common/image.c Wrong Image Type (not PPC Linux Ramdisk)
+ -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
13 common/image.c Start multifile image verification
14 common/image.c No initial ramdisk, no multifile, continue.
-60 common/env_common.c Environment has a bad CRC, using default
- 64 net/eth.c starting with Ethernetconfiguration.
+ 64 net/eth.c starting with Ethernet configuration.
-64 net/eth.c no Ethernet found.
65 net/eth.c Ethernet found.
-80 common/cmd_net.c usage wrong
80 common/cmd_net.c before calling NetLoop()
- -81 common/cmd_net.c some error in NetLoop() occured
+ -81 common/cmd_net.c some error in NetLoop() occurred
81 common/cmd_net.c NetLoop() back without error
-82 common/cmd_net.c size == 0 (File with size 0 loaded)
82 common/cmd_net.c trying automatic boot
105 common/cmd_bootm.c Kernel subimage hash verification OK
-105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
106 common/cmd_bootm.c Architecture check OK
- -106 common/cmd_bootm.c Kernel subimage has wrong typea
- 107 common/cmd_bootm.c Kernel subimge type OK
+ -106 common/cmd_bootm.c Kernel subimage has wrong type
+ 107 common/cmd_bootm.c Kernel subimage type OK
-107 common/cmd_bootm.c Can't get kernel subimage data/size
108 common/cmd_bootm.c Got kernel subimage data/size
-108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
120 common/image.c Start initial ramdisk verification
-120 common/image.c Ramdisk FIT image has incorrect format
121 common/image.c Ramdisk FIT image has correct format
- 122 common/image.c No Ramdisk subimage unit name, using configuration
+ 122 common/image.c No ramdisk subimage unit name, using configuration
-122 common/image.c Can't get configuration for ramdisk subimage
123 common/image.c Ramdisk unit name specified
-124 common/image.c Can't get ramdisk subimage node offset
129 common/image.c Can't get ramdisk load address
-129 common/image.c Got ramdisk load address
- -130 common/cmd_doc.c Icorrect FIT image format
+ -130 common/cmd_doc.c Incorrect FIT image format
131 common/cmd_doc.c FIT image format OK
- -140 common/cmd_ide.c Icorrect FIT image format
+ -140 common/cmd_ide.c Incorrect FIT image format
141 common/cmd_ide.c FIT image format OK
- -150 common/cmd_nand.c Icorrect FIT image format
+ -150 common/cmd_nand.c Incorrect FIT image format
151 common/cmd_nand.c FIT image format OK
[so far only for SMDK2400 and TRAB boards]
-- Modem support endable:
+- Modem support enable:
CONFIG_MODEM_SUPPORT
- RTS/CTS Flow control enable:
There are common interrupt_init() and timer_interrupt()
for all PPC archs. interrupt_init() calls interrupt_init_cpu()
- for cpu specific initialization. interrupt_init_cpu()
+ for CPU specific initialization. interrupt_init_cpu()
should set decrementer_count to appropriate value. If
- cpu resets decrementer automatically after interrupt
+ CPU resets decrementer automatically after interrupt
(ppc4xx) it should set decrementer_count to zero.
- timer_interrupt() calls timer_interrupt_cpu() for cpu
+ timer_interrupt() calls timer_interrupt_cpu() for CPU
specific handling. If board has watchdog / status_led
/ other_activity_monitor it works automatically from
general timer_interrupt().
In the target system modem support is enabled when a
specific key (key combination) is pressed during
power-on. Otherwise U-Boot will boot normally
- (autoboot). The key_pressed() fuction is called from
+ (autoboot). The key_pressed() function is called from
board_init(). Currently key_pressed() is a dummy
function, returning 1 and thus enabling modem
initialization.
If there are no modem init strings in the
environment, U-Boot proceed to autoboot; the
previous output (banner, info printfs) will be
- supressed, though.
+ suppressed, though.
See also: doc/README.Modem
Configuration Settings:
-----------------------
-- CFG_LONGHELP: Defined when you want long help messages included;
+- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
undefine this when you're short of memory.
-- CFG_PROMPT: This is what U-Boot prints on the console to
+- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
prompt for user input.
-- CFG_CBSIZE: Buffer size for input from the Console
+- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
-- CFG_PBSIZE: Buffer size for Console output
+- CONFIG_SYS_PBSIZE: Buffer size for Console output
-- CFG_MAXARGS: max. Number of arguments accepted for monitor commands
+- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
-- CFG_BARGSIZE: Buffer size for Boot Arguments which are passed to
+- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
the application (usually a Linux kernel) when it is
booted
-- CFG_BAUDRATE_TABLE:
+- CONFIG_SYS_BAUDRATE_TABLE:
List of legal baudrate settings for this board.
-- CFG_CONSOLE_INFO_QUIET
+- CONFIG_SYS_CONSOLE_INFO_QUIET
Suppress display of console information at boot.
-- CFG_CONSOLE_IS_IN_ENV
+- CONFIG_SYS_CONSOLE_IS_IN_ENV
If the board specific function
extern int overwrite_console (void);
returns 1, the stdin, stderr and stdout are switched to the
serial port, else the settings in the environment are used.
-- CFG_CONSOLE_OVERWRITE_ROUTINE
+- CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
Enable the call to overwrite_console().
-- CFG_CONSOLE_ENV_OVERWRITE
+- CONFIG_SYS_CONSOLE_ENV_OVERWRITE
Enable overwrite of previous console environment settings.
-- CFG_MEMTEST_START, CFG_MEMTEST_END:
+- CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END:
Begin and End addresses of the area used by the
simple memory test.
-- CFG_ALT_MEMTEST:
+- CONFIG_SYS_ALT_MEMTEST:
Enable an alternate, more extensive memory test.
-- CFG_MEMTEST_SCRATCH:
+- CONFIG_SYS_MEMTEST_SCRATCH:
Scratch address used by the alternate memory test
You only need to set this if address zero isn't writeable
-- CFG_MEM_TOP_HIDE (PPC only):
- If CFG_MEM_TOP_HIDE is defined in the board config header,
+- CONFIG_SYS_MEM_TOP_HIDE (PPC only):
+ If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
- (end) of ram and won't get "touched" at all by U-Boot. By
+ (end) of RAM and won't get "touched" at all by U-Boot. By
fixing up gd->ram_size the Linux kernel should gets passed
the now "corrected" memory size and won't touch it either.
This should work for arch/ppc and arch/powerpc. Only Linux
non page size aligned address and this could cause major
problems.
-- CFG_TFTP_LOADADDR:
+- CONFIG_SYS_TFTP_LOADADDR:
Default load address for network file downloads
-- CFG_LOADS_BAUD_CHANGE:
+- CONFIG_SYS_LOADS_BAUD_CHANGE:
Enable temporary baudrate change while serial download
-- CFG_SDRAM_BASE:
+- CONFIG_SYS_SDRAM_BASE:
Physical start address of SDRAM. _Must_ be 0 here.
-- CFG_MBIO_BASE:
+- CONFIG_SYS_MBIO_BASE:
Physical start address of Motherboard I/O (if using a
Cogent motherboard)
-- CFG_FLASH_BASE:
+- CONFIG_SYS_FLASH_BASE:
Physical start address of Flash memory.
-- CFG_MONITOR_BASE:
+- CONFIG_SYS_MONITOR_BASE:
Physical start address of boot monitor code (set by
make config files to be same as the text base address
(TEXT_BASE) used when linking) - same as
- CFG_FLASH_BASE when booting from flash.
+ CONFIG_SYS_FLASH_BASE when booting from flash.
-- CFG_MONITOR_LEN:
+- CONFIG_SYS_MONITOR_LEN:
Size of memory reserved for monitor code, used to
determine _at_compile_time_ (!) if the environment is
embedded within the U-Boot image, or in a separate
flash sector.
-- CFG_MALLOC_LEN:
+- CONFIG_SYS_MALLOC_LEN:
Size of DRAM reserved for malloc() use.
-- CFG_BOOTM_LEN:
+- CONFIG_SYS_BOOTM_LEN:
Normally compressed uImages are limited to an
uncompressed size of 8 MBytes. If this is not enough,
- you can define CFG_BOOTM_LEN in your board config file
+ you can define CONFIG_SYS_BOOTM_LEN in your board config file
to adjust this setting to your needs.
-- CFG_BOOTMAPSZ:
+- CONFIG_SYS_BOOTMAPSZ:
Maximum size of memory mapped by the startup code of
the Linux kernel; all data that must be processed by
- the Linux kernel (bd_info, boot arguments, eventually
- initrd image) must be put below this limit.
+ the Linux kernel (bd_info, boot arguments, FDT blob if
+ used) must be put below this limit, unless "bootm_low"
+ enviroment variable is defined and non-zero. In such case
+ all data for the Linux kernel must be between "bootm_low"
+ and "bootm_low" + CONFIG_SYS_BOOTMAPSZ.
-- CFG_MAX_FLASH_BANKS:
+- CONFIG_SYS_MAX_FLASH_BANKS:
Max number of Flash memory banks
-- CFG_MAX_FLASH_SECT:
+- CONFIG_SYS_MAX_FLASH_SECT:
Max number of sectors on a Flash chip
-- CFG_FLASH_ERASE_TOUT:
+- CONFIG_SYS_FLASH_ERASE_TOUT:
Timeout for Flash erase operations (in ms)
-- CFG_FLASH_WRITE_TOUT:
+- CONFIG_SYS_FLASH_WRITE_TOUT:
Timeout for Flash write operations (in ms)
-- CFG_FLASH_LOCK_TOUT
+- CONFIG_SYS_FLASH_LOCK_TOUT
Timeout for Flash set sector lock bit operation (in ms)
-- CFG_FLASH_UNLOCK_TOUT
+- CONFIG_SYS_FLASH_UNLOCK_TOUT
Timeout for Flash clear lock bits operation (in ms)
-- CFG_FLASH_PROTECTION
+- CONFIG_SYS_FLASH_PROTECTION
If defined, hardware flash sectors protection is used
instead of U-Boot software protection.
-- CFG_DIRECT_FLASH_TFTP:
+- CONFIG_SYS_DIRECT_FLASH_TFTP:
Enable TFTP transfers directly to flash memory;
without this option such a download has to be
The two-step approach is usually more reliable, since
you can check if the download worked before you erase
- the flash, but in some situations (when sytem RAM is
- too limited to allow for a tempory copy of the
+ the flash, but in some situations (when system RAM is
+ too limited to allow for a temporary copy of the
downloaded image) this option may be very useful.
-- CFG_FLASH_CFI:
+- CONFIG_SYS_FLASH_CFI:
Define if the flash driver uses extra elements in the
common flash structure for storing flash geometry.
-- CFG_FLASH_CFI_DRIVER
+- CONFIG_FLASH_CFI_DRIVER
This option also enables the building of the cfi_flash driver
in the drivers directory
-- CFG_FLASH_QUIET_TEST
+- CONFIG_FLASH_CFI_MTD
+ This option enables the building of the cfi_mtd driver
+ in the drivers directory. The driver exports CFI flash
+ to the MTD layer.
+
+- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+ Use buffered writes to flash.
+
+- CONFIG_FLASH_SPANSION_S29WS_N
+ s29ws-n MirrorBit flash has non-standard addresses for buffered
+ write commands.
+
+- CONFIG_SYS_FLASH_QUIET_TEST
If this option is defined, the common CFI flash doesn't
print it's warning upon not recognized FLASH banks. This
is useful, if some of the configured banks are only
digits and dots. Recommended value: 45 (9..1) for 80
column displays, 15 (3..1) for 40 column displays.
-- CFG_RX_ETH_BUFFER:
- Defines the number of ethernet receive buffers. On some
- ethernet controllers it is recommended to set this value
+- CONFIG_SYS_RX_ETH_BUFFER:
+ Defines the number of Ethernet receive buffers. On some
+ Ethernet controllers it is recommended to set this value
to 8 or even higher (EEPRO100 or 405 EMAC), since all
buffers can be full shortly after enabling the interface
- on high ethernet traffic.
+ on high Ethernet traffic.
Defaults to 4 if not defined.
The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
following configurations:
-- CFG_ENV_IS_IN_FLASH:
+- CONFIG_ENV_IS_IN_FLASH:
Define this if the environment is in flash memory.
environment in one of the last sectors, leaving a gap
between U-Boot and the environment.
- - CFG_ENV_OFFSET:
+ - CONFIG_ENV_OFFSET:
Offset of environment data (variable area) to the
beginning of flash memory; for instance, with bottom boot
type flash chips the second sector can be used: the offset
for this sector is given here.
- CFG_ENV_OFFSET is used relative to CFG_FLASH_BASE.
+ CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
- - CFG_ENV_ADDR:
+ - CONFIG_ENV_ADDR:
This is just another way to specify the start address of
the flash sector containing the environment (instead of
- CFG_ENV_OFFSET).
+ CONFIG_ENV_OFFSET).
- - CFG_ENV_SECT_SIZE:
+ - CONFIG_ENV_SECT_SIZE:
Size of the sector containing the environment.
In such a case you don't want to spend a whole sector for
the environment.
- - CFG_ENV_SIZE:
+ - CONFIG_ENV_SIZE:
- If you use this in combination with CFG_ENV_IS_IN_FLASH
- and CFG_ENV_SECT_SIZE, you can specify to use only a part
+ If you use this in combination with CONFIG_ENV_IS_IN_FLASH
+ and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
of this flash sector for the environment. This saves
memory for the RAM copy of the environment.
wrong before the contents has been restored from a copy in
RAM, your target system will be dead.
- - CFG_ENV_ADDR_REDUND
- CFG_ENV_SIZE_REDUND
+ - CONFIG_ENV_ADDR_REDUND
+ CONFIG_ENV_SIZE_REDUND
These settings describe a second storage area used to hold
- a redundand copy of the environment data, so that there is
+ a redundant copy of the environment data, so that there is
a valid backup copy in case there is a power failure during
a "saveenv" operation.
accordingly!
-- CFG_ENV_IS_IN_NVRAM:
+- CONFIG_ENV_IS_IN_NVRAM:
Define this if you have some non-volatile memory device
(NVRAM, battery buffered SRAM) which you want to use for the
environment.
- - CFG_ENV_ADDR:
- - CFG_ENV_SIZE:
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
- These two #defines are used to determin the memory area you
+ These two #defines are used to determine the memory area you
want to use for environment. It is assumed that this memory
can just be read and written to, without any special
provision.
BE CAREFUL! The first access to the environment happens quite early
in U-Boot initalization (when we try to get the setting of for the
-console baudrate). You *MUST* have mappend your NVRAM area then, or
+console baudrate). You *MUST* have mapped your NVRAM area then, or
U-Boot will hang.
Please note that even with NVRAM we still use a copy of the
to save the current settings.
-- CFG_ENV_IS_IN_EEPROM:
+- CONFIG_ENV_IS_IN_EEPROM:
Use this if you have an EEPROM or similar serial access
device and a driver for it.
- - CFG_ENV_OFFSET:
- - CFG_ENV_SIZE:
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
These two #defines specify the offset and size of the
environment area within the total memory of your EEPROM.
- - CFG_I2C_EEPROM_ADDR:
+ - CONFIG_SYS_I2C_EEPROM_ADDR:
If defined, specified the chip address of the EEPROM device.
The default address is zero.
- - CFG_EEPROM_PAGE_WRITE_BITS:
+ - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
If defined, the number of bits used to address bytes in a
single page in the EEPROM device. A 64 byte page, for example
would require six bits.
- - CFG_EEPROM_PAGE_WRITE_DELAY_MS:
+ - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
If defined, the number of milliseconds to delay between
page writes. The default is zero milliseconds.
- - CFG_I2C_EEPROM_ADDR_LEN:
+ - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
The length in bytes of the EEPROM memory array address. Note
that this is NOT the chip address length!
- - CFG_I2C_EEPROM_ADDR_OVERFLOW:
+ - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
EEPROM chips that implement "address overflow" are ones
like Catalyst 24WC04/08/16 which has 9/10/11 bits of
address and the extra bits end up in the "chip address" bit
still be one byte because the extra address bits are hidden
in the chip address.
- - CFG_EEPROM_SIZE:
+ - CONFIG_SYS_EEPROM_SIZE:
The size in bytes of the EEPROM device.
-- CFG_ENV_IS_IN_DATAFLASH:
+- CONFIG_ENV_IS_IN_DATAFLASH:
Define this if you have a DataFlash memory device which you
want to use for the environment.
- - CFG_ENV_OFFSET:
- - CFG_ENV_ADDR:
- - CFG_ENV_SIZE:
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
These three #defines specify the offset and size of the
environment area within the total memory of your DataFlash placed
at the specified address.
-- CFG_ENV_IS_IN_NAND:
+- CONFIG_ENV_IS_IN_NAND:
Define this if you have a NAND device which you want to use
for the environment.
- - CFG_ENV_OFFSET:
- - CFG_ENV_SIZE:
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
These two #defines specify the offset and size of the environment
area within the first NAND device.
- - CFG_ENV_OFFSET_REDUND
+ - CONFIG_ENV_OFFSET_REDUND
- This setting describes a second storage area of CFG_ENV_SIZE
+ This setting describes a second storage area of CONFIG_ENV_SIZE
size used to hold a redundant copy of the environment data,
so that there is a valid backup copy in case there is a
power failure during a "saveenv" operation.
- Note: CFG_ENV_OFFSET and CFG_ENV_OFFSET_REDUND must be aligned
- to a block boundary, and CFG_ENV_SIZE must be a multiple of
+ Note: CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND must be aligned
+ to a block boundary, and CONFIG_ENV_SIZE must be a multiple of
the NAND devices block size.
-- CFG_SPI_INIT_OFFSET
+- CONFIG_SYS_SPI_INIT_OFFSET
Defines offset to the initial SPI buffer area in DPRAM. The
area is used at an early stage (ROM part) if the environment
the default environment is used; a new CRC is computed as soon as you
use the "saveenv" command to store a valid environment.
-- CFG_FAULT_ECHO_LINK_DOWN:
+- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
Echo the inverted Ethernet link state to the fault LED.
- Note: If this option is active, then CFG_FAULT_MII_ADDR
+ Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
also needs to be defined.
-- CFG_FAULT_MII_ADDR:
+- CONFIG_SYS_FAULT_MII_ADDR:
MII address of the PHY to check for the Ethernet link state.
-- CFG_64BIT_VSPRINTF:
+- CONFIG_SYS_64BIT_VSPRINTF:
Makes vsprintf (and all *printf functions) support printing
of 64bit values by using the L quantifier
-- CFG_64BIT_STRTOUL:
+- CONFIG_SYS_64BIT_STRTOUL:
Adds simple_strtoull that returns a 64bit value
Low Level (hardware related) configuration options:
---------------------------------------------------
-- CFG_CACHELINE_SIZE:
+- CONFIG_SYS_CACHELINE_SIZE:
Cache Line Size of the CPU.
-- CFG_DEFAULT_IMMR:
+- CONFIG_SYS_DEFAULT_IMMR:
Default address of the IMMR after system reset.
Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
the IMMR register after a reset.
- Floppy Disk Support:
- CFG_FDC_DRIVE_NUMBER
+ CONFIG_SYS_FDC_DRIVE_NUMBER
the default drive number (default value 0)
- CFG_ISA_IO_STRIDE
+ CONFIG_SYS_ISA_IO_STRIDE
- defines the spacing between fdc chipset registers
+ defines the spacing between FDC chipset registers
(default value 1)
- CFG_ISA_IO_OFFSET
+ CONFIG_SYS_ISA_IO_OFFSET
defines the offset of register from address. It
depends on which part of the data bus is connected to
- the fdc chipset. (default value 0)
+ the FDC chipset. (default value 0)
- If CFG_ISA_IO_STRIDE CFG_ISA_IO_OFFSET and
- CFG_FDC_DRIVE_NUMBER are undefined, they take their
+ If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
+ CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
default value.
- if CFG_FDC_HW_INIT is defined, then the function
+ if CONFIG_SYS_FDC_HW_INIT is defined, then the function
fdc_hw_init() is called at the beginning of the FDC
setup. fdc_hw_init() must be provided by the board
source code. It is used to make hardware dependant
initializations.
-- CFG_IMMR: Physical address of the Internal Memory.
+- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx/82xx systems only]
-- CFG_INIT_RAM_ADDR:
+- CONFIG_SYS_INIT_RAM_ADDR:
Start address of memory area that can be used for
initial data and stack; please note that this must be
- MPC824X: data cache
- PPC4xx: data cache
-- CFG_GBL_DATA_OFFSET:
+- CONFIG_SYS_GBL_DATA_OFFSET:
Offset of the initial data structure in the memory
- area defined by CFG_INIT_RAM_ADDR. Usually
- CFG_GBL_DATA_OFFSET is chosen such that the initial
+ area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
+ CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
data is located at the end of the available space
- (sometimes written as (CFG_INIT_RAM_END -
- CFG_INIT_DATA_SIZE), and the initial stack is just
- below that area (growing from (CFG_INIT_RAM_ADDR +
- CFG_GBL_DATA_OFFSET) downward.
+ (sometimes written as (CONFIG_SYS_INIT_RAM_END -
+ CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
+ below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
+ CONFIG_SYS_GBL_DATA_OFFSET) downward.
Note:
On the MPC824X (or other systems that use the data
cache for initial memory) the address chosen for
- CFG_INIT_RAM_ADDR is basically arbitrary - it must
+ CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
point to an otherwise UNUSED address space between
the top of RAM and the start of the PCI space.
-- CFG_SIUMCR: SIU Module Configuration (11-6)
+- CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6)
-- CFG_SYPCR: System Protection Control (11-9)
+- CONFIG_SYS_SYPCR: System Protection Control (11-9)
-- CFG_TBSCR: Time Base Status and Control (11-26)
+- CONFIG_SYS_TBSCR: Time Base Status and Control (11-26)
-- CFG_PISCR: Periodic Interrupt Status and Control (11-31)
+- CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31)
-- CFG_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30)
+- CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30)
-- CFG_SCCR: System Clock and reset Control Register (15-27)
+- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
-- CFG_OR_TIMING_SDRAM:
+- CONFIG_SYS_OR_TIMING_SDRAM:
SDRAM timing
-- CFG_MAMR_PTA:
+- CONFIG_SYS_MAMR_PTA:
periodic timer for refresh
-- CFG_DER: Debug Event Register (37-47)
+- CONFIG_SYS_DER: Debug Event Register (37-47)
-- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CFG_REMAP_OR_AM,
- CFG_PRELIM_OR_AM, CFG_OR_TIMING_FLASH, CFG_OR0_REMAP,
- CFG_OR0_PRELIM, CFG_BR0_PRELIM, CFG_OR1_REMAP, CFG_OR1_PRELIM,
- CFG_BR1_PRELIM:
+- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
+ CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
+ CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,
+ CONFIG_SYS_BR1_PRELIM:
Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)
- SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,
- CFG_OR_TIMING_SDRAM, CFG_OR2_PRELIM, CFG_BR2_PRELIM,
- CFG_OR3_PRELIM, CFG_BR3_PRELIM:
+ CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,
+ CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
-- CFG_MAMR_PTA, CFG_MPTPR_2BK_4K, CFG_MPTPR_1BK_4K, CFG_MPTPR_2BK_8K,
- CFG_MPTPR_1BK_8K, CFG_MAMR_8COL, CFG_MAMR_9COL:
+- CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K,
+ CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL:
Machine Mode Register and Memory Periodic Timer
Prescaler definitions (SDRAM timing)
-- CFG_I2C_UCODE_PATCH, CFG_I2C_DPMEM_OFFSET [0x1FC0]:
+- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]:
enable I2C microcode relocation patch (MPC8xx);
define relocation offset in DPRAM [DSP2]
-- CFG_SMC_UCODE_PATCH, CFG_SMC_DPMEM_OFFSET [0x1FC0]:
+- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]:
enable SMC microcode relocation patch (MPC8xx);
define relocation offset in DPRAM [SMC1]
-- CFG_SPI_UCODE_PATCH, CFG_SPI_DPMEM_OFFSET [0x1FC0]:
+- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]:
enable SPI microcode relocation patch (MPC8xx);
define relocation offset in DPRAM [SCC4]
-- CFG_USE_OSCCLK:
+- CONFIG_SYS_USE_OSCCLK:
Use OSCM clock mode on MBX8xx board. Be careful,
wrong setting might damage your board. Read
doc/README.MBX before setting this variable!
-- CFG_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
+- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
Offset of the bootmode word in DPRAM used by post
(Power On Self Tests). This definition overrides
#define'd default value in commproc.h resp.
cpm_8260.h.
-- CFG_PCI_SLV_MEM_LOCAL, CFG_PCI_SLV_MEM_BUS, CFG_PICMR0_MASK_ATTRIB,
- CFG_PCI_MSTR0_LOCAL, CFG_PCIMSK0_MASK, CFG_PCI_MSTR1_LOCAL,
- CFG_PCIMSK1_MASK, CFG_PCI_MSTR_MEM_LOCAL, CFG_PCI_MSTR_MEM_BUS,
- CFG_CPU_PCI_MEM_START, CFG_PCI_MSTR_MEM_SIZE, CFG_POCMR0_MASK_ATTRIB,
- CFG_PCI_MSTR_MEMIO_LOCAL, CFG_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
- CFG_PCI_MSTR_MEMIO_SIZE, CFG_POCMR1_MASK_ATTRIB, CFG_PCI_MSTR_IO_LOCAL,
- CFG_PCI_MSTR_IO_BUS, CFG_CPU_PCI_IO_START, CFG_PCI_MSTR_IO_SIZE,
- CFG_POCMR2_MASK_ATTRIB: (MPC826x only)
+- CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB,
+ CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL,
+ CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS,
+ CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB,
+ CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
+ CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
+ CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
+ CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
- CONFIG_SPD_EEPROM
SPD_EEPROM_ADDRESS
I2C address of the SPD EEPROM
-- CFG_SPD_BUS_NUM
+- CONFIG_SYS_SPD_BUS_NUM
If SPD EEPROM is on an I2C bus other than the first
one, specify here. Note that the value must resolve
to something your driver can deal with.
-- CFG_83XX_DDR_USES_CS0
+- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
-- CFG_83XX_DDR_USES_CS0
+- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
Normally these variables MUST NOT be defined. The
only exception is when U-Boot is loaded (to RAM) by
some other boot loader or by a debugger which
- performs these intializations itself.
+ performs these initializations itself.
Building the Software:
additional information is available from the board vendor; for
instance, the TQM823L systems are available without (standard)
or with LCD support. You can select such additional "features"
- when chosing the configuration, i. e.
+ when choosing the configuration, i. e.
make TQM823L_config
- will configure for a plain TQM823L, i. e. no LCD support
bootfile - Name of the image to load with TFTP
+ bootm_low - Memory range available for image processing in the bootm
+ command can be restricted. This variable is given as
+ a hexadecimal number and defines lowest address allowed
+ for use by the bootm command. See also "bootm_size"
+ environment variable. Address defined by "bootm_low" is
+ also the base of the initial memory mapping for the Linux
+ kernel -- see the description of CONFIG_SYS_BOOTMAPSZ.
+
+ bootm_size - Memory range available for image processing in the bootm
+ command can be restricted. This variable is given as
+ a hexadecimal number and defines the size of the region
+ allowed for use by the bootm command. See also "bootm_low"
+ environment variable.
+
+ updatefile - Location of the software update file on a TFTP server, used
+ by the automatic software update feature. Please refer to
+ documentation in doc/README.update for more details.
+
autoload - if set to "no" (any string beginning with 'n'),
"bootp" will just load perform a lookup of the
configuration from the BOOTP server, but not try to
is usually what you want since it allows for
maximum initrd size. If for some reason you want to
make sure that the initrd image is loaded below the
- CFG_BOOTMAPSZ limit, you can set this environment
+ CONFIG_SYS_BOOTMAPSZ limit, you can set this environment
variable to a value of "no" or "off" or "0".
Alternatively, you can set it to a maximum upper
address to use (U-Boot will still check that it
themselves.
npe_ucode - see CONFIG_IXP4XX_NPE_EXT_UCOD
- if set load address for the npe microcode
+ if set load address for the NPE microcode
tftpsrcport - If this is set, the value is used for TFTP's
UDP source port.
destination port instead of the Well Know Port 69.
vlan - When set to a value < 4095 the traffic over
- ethernet is encapsulated/received over 802.1q
+ Ethernet is encapsulated/received over 802.1q
VLAN tagged frames.
The following environment variables may be used and automatically
executed anyway.
(2) If you execute several variables with one call to run (i. e.
- calling run with a list af variables as arguments), any failing
+ calling run with a list of variables as arguments), any failing
command will cause "run" to terminate, i. e. the remaining
variables are not executed.
Note for Redundant Ethernet Interfaces:
=======================================
-Some boards come with redundant ethernet interfaces; U-Boot supports
+Some boards come with redundant Ethernet interfaces; U-Boot supports
such configurations and is capable of automatic selection of a
"working" interface when needed. MAC assignment works as follows:
* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
- LynxOS, pSOS, QNX, RTEMS, ARTOS;
- Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS, LynxOS).
+ LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
+ Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
+ INTEGRITY).
* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
IA64, MIPS, NIOS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
Currently supported: ARM, AVR32, Intel x86, MIPS, NIOS, PowerPC).
Just make sure your machine specific header file (for instance
include/asm-ppc/tqm8xx.h) includes the same definition of the Board
-Information structure as we define in include/u-boot.h, and make
-sure that your definition of IMAP_ADDR uses the same value as your
-U-Boot configuration in CFG_IMMR.
+Information structure as we define in include/asm-<arch>/u-boot.h,
+and make sure that your definition of IMAP_ADDR uses the same value
+as your U-Boot configuration in CONFIG_SYS_IMMR.
Configuring the Linux kernel:
Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
...
-If you want to boot a Linux kernel with initial ram disk, you pass
+If you want to boot a Linux kernel with initial RAM disk, you pass
the memory addresses of both the kernel and the initrd image (PPBCOOT
format!) to the "bootm" command:
require any physical RAM backing up the cache. The cleverness
is that the cache is being used as a temporary supply of
necessary storage before the SDRAM controller is setup. It's
- beyond the scope of this list to expain the details, but you
+ beyond the scope of this list to explain the details, but you
can see how this works by studying the cache architecture and
operation in the architecture and processor-specific manuals.
OCM is On Chip Memory, which I believe the 405GP has 4K. It
is another option for the system designer to use as an
- initial stack/ram area prior to SDRAM being available. Either
+ initial stack/RAM area prior to SDRAM being available. Either
option should work for you. Using CS 4 should be fine if your
board designers haven't used it for something that would
cause you grief during the initial boot! It is frequently not
used.
- CFG_INIT_RAM_ADDR should be somewhere that won't interfere
+ CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
with your processor/board/system design. The default value
you will find in any recent u-boot distribution in
walnut.h should work for you. I'd set it to a value larger
* Initialized global data (data segment) is read-only. Do not attempt
to write it.
-* Do not use any unitialized global data (or implicitely initialized
+* Do not use any uninitialized global data (or implicitely initialized
as zero data - BSS segment) at all - this is undefined, initiali-
zation is performed later (when relocating to RAM).
TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
booting and sizing and initializing DRAM, the code relocates itself
to the upper end of DRAM. Immediately below the U-Boot code some
-memory is reserved for use by malloc() [see CFG_MALLOC_LEN
+memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
configuration setting]. Below that, a structure with global Board
Info data is placed, followed by the stack (growing downward).
----------------------
In the reset configuration, U-Boot starts at the reset entry point
-(on most PowerPC systens at address 0x00000100). Because of the reset
+(on most PowerPC systems at address 0x00000100). Because of the reset
configuration for CS0# this is a mirror of the onboard Flash memory.
To be able to re-map memory U-Boot then jumps to its link address.
To be able to implement the initialization code in C, a (small!)
Patches shall be sent to the u-boot-users mailing list.
-Please see http://www.denx.de/wiki/UBoot/Patches for details.
+Please see http://www.denx.de/wiki/U-Boot/Patches for details.
When you send a patch, please include the following information with
it:
projects / karo-tx-uboot.git / blobdiff