Add generic support for samsung s3c2440

[karo-tx-uboot.git] / arch / arm / cpu / arm920t / s3c24x0 / timer.c

diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index 7d47354381c0a68c5ff9491b8bec5244b75f9789..8cf9ff6be0082356f776fd3f76a72fe9fffab70f 100644 (file)
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -43,7 +43,7 @@ static inline ulong READ_TIMER(void)
 {
        struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
 
-       return readl(&timers->TCNTO4) & 0xffff;
+       return readl(&timers->tcnto4) & 0xffff;
 }
 
 static ulong timestamp;
@@ -56,7 +56,7 @@ int timer_init(void)
 
        /* use PWM Timer 4 because it has no output */
        /* prescaler for Timer 4 is 16 */
-       writel(0x0f00, &timers->TCFG0);
+       writel(0x0f00, &timers->tcfg0);
        if (timer_load_val == 0) {
                /*
                 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
@@ -68,13 +68,13 @@ int timer_init(void)
        }
        /* load value for 10 ms timeout */
        lastdec = timer_load_val;
-       writel(timer_load_val, &timers->TCNTB4);
-       /* auto load, manual update of Timer 4 */
-       tmr = (readl(&timers->TCON) & ~0x0700000) | 0x0600000;
-       writel(tmr, &timers->TCON);
-       /* auto load, start Timer 4 */
+       writel(timer_load_val, &timers->tcntb4);
+       /* auto load, manual update of timer 4 */
+       tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000;
+       writel(tmr, &timers->tcon);
+       /* auto load, start timer 4 */
        tmr = (tmr & ~0x0700000) | 0x0500000;
-       writel(tmr, &timers->TCON);
+       writel(tmr, &timers->tcon);
        timestamp = 0;
 
        return (0);
@@ -181,6 +181,7 @@ ulong get_tbclk(void)
        tbclk = timer_load_val * 100;
 #elif defined(CONFIG_SBC2410X) || \
       defined(CONFIG_SMDK2410) || \
+       defined(CONFIG_S3C2440) || \
       defined(CONFIG_VCMA9)
        tbclk = CONFIG_SYS_HZ;
 #else
@@ -206,13 +207,13 @@ void reset_cpu(ulong ignored)
        watchdog = s3c24x0_get_base_watchdog();
 
        /* Disable watchdog */
-       writel(0x0000, &watchdog->WTCON);
+       writel(0x0000, &watchdog->wtcon);
 
        /* Initialize watchdog timer count register */
-       writel(0x0001, &watchdog->WTCNT);
+       writel(0x0001, &watchdog->wtcnt);
 
        /* Enable watchdog timer; assert reset at timer timeout */
-       writel(0x0021, &watchdog->WTCON);
+       writel(0x0021, &watchdog->wtcon);
 
        while (1)
                /* loop forever and wait for reset to happen */;