Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / mx5 / soc.c

diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 8d8cf61b162549e221b24e04151b6787a7d1f249..978f8499ec4bec1d746582dd8c9ba92ecc5c9487 100644 (file)
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -4,23 +4,7 @@
  *
  * (C) Copyright 2009 Freescale Semiconductor, Inc.
  *
  *
  * (C) Copyright 2009 Freescale Semiconductor, Inc.
  *

- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+

  */
 
 #include <common.h>
  */
 
 #include <common.h>


@@ -89,6 +73,13 @@ u32 get_cpu_rev(void)
        return system_rev;
 }
 
        return system_rev;
 }
 

+#ifdef CONFIG_REVISION_TAG
+u32 __weak get_board_rev(void)
+{
+       return get_cpu_rev();
+}
+#endif
+

 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {


@@ -146,6 +137,17 @@ void set_chipselect_size(int const cs_size)
        writel(reg, &iomuxc_regs->gpr1);
 }
 
        writel(reg, &iomuxc_regs->gpr1);
 }
 

+void cpu_cache_initialization(void)
+{
+       printf("Enabling L2 cache\n");
+       asm volatile(
+               "mrc 15, 0, r0, c1, c0, 1\n"
+               "orr r0, r0, #0x2\n"
+               "mcr 15, 0, r0, c1, c0, 1\n"
+               : : : "r0", "memory"
+               );
+}
+

 #ifdef CONFIG_MX53
 void boot_mode_apply(unsigned cfg_val)
 {
 #ifdef CONFIG_MX53
 void boot_mode_apply(unsigned cfg_val)
 {