*
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <div64.h>
#include <asm/errno.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/regs-ocotp.h>
#include <asm/arch/clock.h>
-#include <asm/arch/dma.h>
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
+#include <asm/imx-common/dma.h>
+#include <stdbool.h>
#ifdef CONFIG_VIDEO_IPUV3
#include <ipu.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
-#define TEMPERATURE_MIN -40
+#ifdef CONFIG_MX6_TEMPERATURE_MIN
+#define TEMPERATURE_MIN CONFIG_MX6_TEMPERATURE_MIN
+#else
+#define TEMPERATURE_MIN (-40)
+#endif
+#ifdef CONFIG_MX6_TEMPERATURE_HOT
+#define TEMPERATURE_HOT CONFIG_MX6_TEMPERATURE_HOT
+#else
#define TEMPERATURE_HOT 80
+#endif
+#ifdef CONFIG_MX6_TEMPERATURE_MAX
+#define TEMPERATURE_MAX CONFIG_MX6_TEMPERATURE_MAX
+#else
#define TEMPERATURE_MAX 125
-#define REG_VALUE_TO_CEL(ratio, raw) ((raw_n40c - raw) * 100 / ratio - 40)
+#endif
+#define TEMP_AVG_COUNT 5
+#define TEMP_WARN_THRESHOLD 5
#define __data __attribute__((section(".data")))
void hw_watchdog_reset(void)
{
if (readw(wdog_base + WDOG_WCR) & WCR_WDE) {
- static u16 toggle = 0xaaaa;
- static int first = 1;
+ static u16 __data toggle = 0xaaaa;
+ static int __data first = 1;
if (first) {
printf("Watchdog active\n");
return (type << 12) | (reg + 0x10);
}
+#ifdef CONFIG_REVISION_TAG
+u32 __weak get_board_rev(void)
+{
+ u32 cpurev = get_cpu_rev();
+ u32 type = ((cpurev >> 12) & 0xff);
+ if (type == MXC_CPU_MX6SOLO)
+ cpurev = (MXC_CPU_MX6DL) << 12 | (cpurev & 0xFFF);
+
+ return cpurev;
+}
+#endif
+
void init_aips(void)
{
struct aipstz_regs *aips1, *aips2;
static u32 __data thermal_calib;
+#define FACTOR0 10000000
+#define FACTOR1 15976
+#define FACTOR2 4297157
+
+int raw_to_celsius(unsigned int raw, unsigned int raw_25c, unsigned int raw_hot,
+ unsigned int hot_temp)
+{
+ int temperature;
+
+ if (raw_hot != 0 && hot_temp != 0) {
+ unsigned int raw_n40c, ratio;
+
+ ratio = ((raw_25c - raw_hot) * 100) / (hot_temp - 25);
+ raw_n40c = raw_25c + (13 * ratio) / 20;
+ if (raw <= raw_n40c)
+ temperature = (raw_n40c - raw) * 100 / ratio - 40;
+ else
+ temperature = TEMPERATURE_MIN;
+ } else {
+ u64 temp64 = FACTOR0;
+ unsigned int c1, c2;
+ /*
+ * Derived from linear interpolation:
+ * slope = 0.4297157 - (0.0015976 * 25C fuse)
+ * slope = (FACTOR2 - FACTOR1 * n1) / FACTOR0
+ * (Nmeas - n1) / (Tmeas - t1) = slope
+ * We want to reduce this down to the minimum computation necessary
+ * for each temperature read. Also, we want Tmeas in millicelsius
+ * and we don't want to lose precision from integer division. So...
+ * Tmeas = (Nmeas - n1) / slope + t1
+ * milli_Tmeas = 1000 * (Nmeas - n1) / slope + 1000 * t1
+ * milli_Tmeas = -1000 * (n1 - Nmeas) / slope + 1000 * t1
+ * Let constant c1 = (-1000 / slope)
+ * milli_Tmeas = (n1 - Nmeas) * c1 + 1000 * t1
+ * Let constant c2 = n1 *c1 + 1000 * t1
+ * milli_Tmeas = c2 - Nmeas * c1
+ */
+ temp64 *= 1000;
+ do_div(temp64, FACTOR1 * raw_25c - FACTOR2);
+ c1 = temp64;
+ c2 = raw_25c * c1 + 1000 * 25;
+ temperature = (c2 - raw * c1) / 1000;
+ }
+ return temperature;
+}
+
int read_cpu_temperature(void)
{
unsigned int reg, tmp, i;
- unsigned int raw_25c, raw_hot, hot_temp, raw_n40c, ratio;
+ unsigned int raw_25c, raw_hot, hot_temp;
int temperature;
struct anatop_regs *const anatop = (void *)ANATOP_BASE_ADDR;
struct mx6_ocotp_regs *const ocotp_regs = (void *)OCOTP_BASE_ADDR;
raw_hot = (thermal_calib & 0xfff00) >> 8;
hot_temp = thermal_calib & 0xff;
- ratio = ((raw_25c - raw_hot) * 100) / (hot_temp - 25);
- raw_n40c = raw_25c + (13 * ratio) / 20;
-
/* now we only using single measure, every time we measure
- the temperature, we will power on/down the anadig module*/
+ * the temperature, we will power on/off the anadig module
+ */
writel(BM_ANADIG_TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_clr);
writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
/* write measure freq */
- reg = readl(&anatop->tempsense1);
- reg &= ~BM_ANADIG_TEMPSENSE1_MEASURE_FREQ;
- reg |= 327;
- writel(reg, &anatop->tempsense1);
-
+ writel(327, &anatop->tempsense1);
writel(BM_ANADIG_TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_clr);
writel(BM_ANADIG_TEMPSENSE0_FINISHED, &anatop->tempsense0_clr);
writel(BM_ANADIG_TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_set);
- tmp = 0;
- /* read five times of temperature values to get average*/
- for (i = 0; i < 5; i++) {
+ /* average the temperature value over multiple readings */
+ for (i = 0; i < TEMP_AVG_COUNT; i++) {
+ static int failed;
+ int limit = 100;
+
while ((readl(&anatop->tempsense0) &
- BM_ANADIG_TEMPSENSE0_FINISHED) == 0)
+ BM_ANADIG_TEMPSENSE0_FINISHED) == 0) {
udelay(10000);
- reg = readl(&anatop->tempsense0);
- tmp += (reg & BM_ANADIG_TEMPSENSE0_TEMP_VALUE) >>
+ if (--limit < 0)
+ break;
+ }
+ if ((readl(&anatop->tempsense0) &
+ BM_ANADIG_TEMPSENSE0_FINISHED) == 0) {
+ if (!failed) {
+ printf("Failed to read temp sensor\n");
+ failed = 1;
+ }
+ return 0;
+ }
+ failed = 0;
+ reg = (readl(&anatop->tempsense0) &
+ BM_ANADIG_TEMPSENSE0_TEMP_VALUE) >>
BP_ANADIG_TEMPSENSE0_TEMP_VALUE;
+ if (i == 0)
+ tmp = reg;
+ else
+ tmp = (tmp * i + reg) / (i + 1);
writel(BM_ANADIG_TEMPSENSE0_FINISHED,
&anatop->tempsense0_clr);
}
- tmp = tmp / 5;
- if (tmp <= raw_n40c)
- temperature = REG_VALUE_TO_CEL(ratio, tmp);
- else
- temperature = TEMPERATURE_MIN;
+ temperature = raw_to_celsius(tmp, raw_25c, raw_hot, hot_temp);
/* power down anatop thermal sensor */
writel(BM_ANADIG_TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_set);
int check_cpu_temperature(int boot)
{
static int __data max_temp;
- int boot_limit = TEMPERATURE_HOT;
+ int boot_limit = getenv_ulong("max_boot_temp", 10, TEMPERATURE_HOT);
int tmp = read_cpu_temperature();
-
-debug("max_temp[%p]=%d diff=%d\n", &max_temp, max_temp, tmp - max_temp);
+ bool first = true;
if (tmp < TEMPERATURE_MIN || tmp > TEMPERATURE_MAX) {
printf("Temperature: can't get valid data!\n");
return tmp;
}
- while (tmp >= boot_limit) {
- if (boot) {
- printf("CPU is %d C, too hot to boot, waiting...\n",
- tmp);
- udelay(5000000);
- tmp = read_cpu_temperature();
- boot_limit = TEMPERATURE_HOT - 1;
- } else {
- printf("CPU is %d C, too hot, resetting...\n",
- tmp);
- udelay(1000000);
+ if (!boot) {
+ if (tmp > boot_limit) {
+ printf("CPU is %d C, too hot, resetting...\n", tmp);
+ udelay(100000);
reset_cpu(0);
}
- }
-
- if (boot) {
+ if (tmp > max_temp) {
+ if (tmp > boot_limit - TEMP_WARN_THRESHOLD)
+ printf("WARNING: CPU temperature %d C\n", tmp);
+ max_temp = tmp;
+ }
+ } else {
printf("Temperature: %d C, calibration data 0x%x\n",
tmp, thermal_calib);
- } else if (tmp > max_temp) {
- if (tmp > TEMPERATURE_HOT - 5)
- printf("WARNING: CPU temperature %d C\n", tmp);
- max_temp = tmp;
+ while (tmp >= boot_limit) {
+ if (first) {
+ printf("CPU is %d C, too hot to boot, waiting...\n",
+ tmp);
+ first = false;
+ }
+ if (ctrlc())
+ break;
+ udelay(50000);
+ tmp = read_cpu_temperature();
+ if (tmp > boot_limit - TEMP_WARN_THRESHOLD && tmp != max_temp)
+ printf("WARNING: CPU temperature %d C\n", tmp);
+ max_temp = tmp;
+ }
}
return tmp;
}
+static void imx_set_wdog_powerdown(bool enable)
+{
+ struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
+ struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
+
+ /* Write to the PDE (Power Down Enable) bit */
+ writew(enable, &wdog1->wmcr);
+ writew(enable, &wdog2->wmcr);
+}
+
+#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)
{
init_aips();
set_vddsoc(1200); /* Set VDDSOC to 1.2V */
+ imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
+
#ifdef CONFIG_VIDEO_IPUV3
gd->arch.ipu_hw_rev = IPUV3_HW_REV_IPUV3H;
#endif
#endif
return 0;
}
+#endif
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
#if defined(CONFIG_FEC_MXC)
void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
{
- struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
- struct fuse_bank *bank = &iim->bank[4];
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ struct fuse_bank *bank = &ocotp->bank[4];
struct fuse_bank4_regs *fuse =
(struct fuse_bank4_regs *)bank->fuse_regs;
{"esdhc4", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
{NULL, 0},
};
-#define RESET_MAX_TIMEOUT 1000000
-#define MXS_BLOCK_SFTRST (1 << 31)
-#define MXS_BLOCK_CLKGATE (1 << 30)
-#include <div64.h>
-
-static const int scale = 1;
-
-int mxs_wait_mask_set(struct mx6_register_32 *mx6_reg, uint32_t mask, unsigned long timeout)
-{
- unsigned long loops = 0;
-
- timeout /= scale;
- if (timeout == 0)
- timeout++;
-
- /* Wait for at least one microsecond for the bit mask to be set */
- while ((readl(&mx6_reg->reg) & mask) != mask) {
- if ((loops += scale) >= timeout) {
- printf("MASK %08x in %p not set after %lu ticks\n",
- mask, &mx6_reg->reg, loops * scale);
- return 1;
- }
- udelay(scale);
- }
- if (loops == 0)
- udelay(1);
-
- return 0;
-}
-int mxs_wait_mask_clr(struct mx6_register_32 *mx6_reg, uint32_t mask, unsigned long timeout)
+void s_init(void)
{
- unsigned long loops = 0;
-
- timeout /= scale;
- if (timeout == 0)
- timeout++;
-
- /* Wait for at least one microsecond for the bit mask to be cleared */
- while ((readl(&mx6_reg->reg) & mask) != 0) {
- if ((loops += scale) >= timeout) {
- printf("MASK %08x in %p not cleared after %lu ticks\n",
- mask, &mx6_reg->reg, loops * scale);
- return 1;
- }
- udelay(scale);
- }
- if (loops == 0)
- udelay(1);
-
- return 0;
-}
-
-int mxs_reset_block(struct mx6_register_32 *mx6_reg)
-{
- /* Clear SFTRST */
- writel(MXS_BLOCK_SFTRST, &mx6_reg->reg_clr);
-
- if (mxs_wait_mask_clr(mx6_reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for SFTRST[%p] to clear: %08x\n",
- &mx6_reg->reg, readl(&mx6_reg->reg));
- return 1;
- }
-
- /* Clear CLKGATE */
- writel(MXS_BLOCK_CLKGATE, &mx6_reg->reg_clr);
-
- /* Set SFTRST */
- writel(MXS_BLOCK_SFTRST, &mx6_reg->reg_set);
-
- /* Wait for CLKGATE being set */
- if (mxs_wait_mask_set(mx6_reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for CLKGATE[%p] to set: %08x\n",
- &mx6_reg->reg, readl(&mx6_reg->reg));
- return 0;
- }
-
- /* Clear SFTRST */
- writel(MXS_BLOCK_SFTRST, &mx6_reg->reg_clr);
-
- if (mxs_wait_mask_clr(mx6_reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for SFTRST[%p] to clear: %08x\n",
- &mx6_reg->reg, readl(&mx6_reg->reg));
- return 1;
- }
-
- /* Clear CLKGATE */
- writel(MXS_BLOCK_CLKGATE, &mx6_reg->reg_clr);
-
- if (mxs_wait_mask_clr(mx6_reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for CLKGATE[%p] to clear: %08x\n",
- &mx6_reg->reg, readl(&mx6_reg->reg));
- return 1;
- }
-
- return 0;
}