ARM: OMAP5: Add silicon id support for ES2.0 revision.

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap5 / hwinit.c

diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index dfc0e447e0786aef57d85513460368808d796ad3..8e66a968af5cb4a90893aa49033fa065d7b40dcc 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -204,17 +204,22 @@ void init_omap_revision(void)
         */
        unsigned int rev = cortex_rev();
 
-       switch (rev) {
-       case MIDR_CORTEX_A15_R0P0:
-               switch (readl(CONTROL_ID_CODE)) {
-               case OMAP5430_CONTROL_ID_CODE_ES1_0:
-                       *omap_si_rev = OMAP5430_ES1_0;
-                       break;
-               case OMAP5432_CONTROL_ID_CODE_ES1_0:
-               default:
-                       *omap_si_rev = OMAP5432_ES1_0;
-                       break;
-               }
+       switch (readl(CONTROL_ID_CODE)) {
+       case OMAP5430_CONTROL_ID_CODE_ES1_0:
+               *omap_si_rev = OMAP5430_ES1_0;
+               if (rev == MIDR_CORTEX_A15_R2P2)
+                       *omap_si_rev = OMAP5430_ES2_0;
+               break;
+       case OMAP5432_CONTROL_ID_CODE_ES1_0:
+               *omap_si_rev = OMAP5432_ES1_0;
+               if (rev == MIDR_CORTEX_A15_R2P2)
+                       *omap_si_rev = OMAP5432_ES2_0;
+               break;
+       case OMAP5430_CONTROL_ID_CODE_ES2_0:
+               *omap_si_rev = OMAP5430_ES2_0;
+               break;
+       case OMAP5432_CONTROL_ID_CODE_ES2_0:
+               *omap_si_rev = OMAP5432_ES2_0;
                break;
        default:
                *omap_si_rev = OMAP5430_SILICON_ID_INVALID;