Unified codebase for TX28, TX48, TX51, TX53

[karo-tx-uboot.git] / arch / arm / dts / tegra20.dtsi

diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index d6bc9f18db782869cb75295fbcfcf0dd7b639e13..f95be58135041b2238cbe5357806d9c0ed95dd87 100644 (file)
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -34,6 +34,8 @@
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C000 0x100>;
                interrupts = < 70 >;
+               /* PERIPH_ID_I2C1, PLL_P_OUT3 */
+               clocks = <&tegra_car 12>, <&tegra_car 124>;
        };
 
        i2c@7000c400 {
@@ -42,6 +44,8 @@
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C400 0x100>;
                interrupts = < 116 >;
+               /* PERIPH_ID_I2C2, PLL_P_OUT3 */
+               clocks = <&tegra_car 54>, <&tegra_car 124>;
        };
 
        i2c@7000c500 {
@@ -50,14 +54,18 @@
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C500 0x100>;
                interrupts = < 124 >;
+               /* PERIPH_ID_I2C3, PLL_P_OUT3 */
+               clocks = <&tegra_car 67>, <&tegra_car 124>;
        };
 
        i2c@7000d000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra20-i2c";
+               compatible = "nvidia,tegra20-i2c-dvc";
                reg = <0x7000D000 0x200>;
                interrupts = < 85 >;
+               /* PERIPH_ID_DVC_I2C, PLL_P_OUT3 */
+               clocks = <&tegra_car 47>, <&tegra_car 124>;
        };
 
        i2s@70002800 {
@@ -185,4 +193,15 @@
                clocks = <&tegra_car 59>;       /* PERIPH_ID_USB3 */
        };
 
+       emc@7000f400 {
+               #address-cells = < 1 >;
+               #size-cells = < 0 >;
+               compatible = "nvidia,tegra20-emc";
+               reg = <0x7000f400 0x200>;
+       };
+
+       kbc@7000e200 {
+               compatible = "nvidia,tegra20-kbc";
+               reg = <0x7000e200 0x0078>;
+       };
 };