#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
-#if !defined(CONFIG_MX25) && !defined(CONFIG_VF610)
+#if !defined(CONFIG_SOC_MX25) && !defined(CONFIG_SOC_VF610)
#include <asm/arch/sys_proto.h>
#endif
#include <asm/imx-common/iomux-v3.h>
(pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT;
u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT;
-#if defined CONFIG_MX6SL
+#if defined CONFIG_SOC_MX6SL
/* Check whether LVE bit needs to be set */
if (pad_ctrl & PAD_CTL_LVE) {
pad_ctrl &= ~PAD_CTL_LVE;
pad_ctrl |= PAD_CTL_LVE_BIT;
}
#endif
+#ifdef DEBUG
+ printf("PAD[%2d]=%016llx mux[%03x]=%02x pad[%03x]=%05x%c inp[%03x]=%d\n",
+ i, pad, mux_ctrl_ofs, mux_mode, pad_ctrl_ofs, pad_ctrl,
+ pad & PAD_CTRL_VALID ? ' ' : '!', sel_input_ofs, sel_input);
+#endif
if (mux_ctrl_ofs)
__raw_writel(mux_mode, base + mux_ctrl_ofs);
__raw_writel(sel_input, base + sel_input_ofs);
#ifdef CONFIG_IOMUX_SHARE_CONF_REG
- if (!(pad_ctrl & NO_PAD_CTRL))
+ if (pad & PAD_CTRL_VALID)
__raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl,
base + pad_ctrl_ofs);
#else
- if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
+ if ((pad & PAD_CTRL_VALID) && pad_ctrl_ofs)
__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
#endif
}
int stride;
int i;
-#if defined(CONFIG_MX6QDL)
+#if defined(CONFIG_SOC_MX6QDL)
stride = 2;
if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
p += 1;
p += stride;
}
}
+
+void imx_iomux_set_gpr_register(int group, int start_bit,
+ int num_bits, int value)
+{
+ u32 reg = readl(base + group * 4);
+
+ reg &= ~(((1 << num_bits) - 1) << start_bit);
+ reg |= value << start_bit;
+ writel(reg, base + group * 4);
+}