Add GPL-2.0+ SPDX-License-Identifier to source files

[karo-tx-uboot.git] / arch / powerpc / cpu / ppc4xx / 44x_spd_ddr.c

diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
index e05daf23b711f82e642f967dda87bdcc8f24093e..9d23e7653ff5f389cd05c9e5cbeaea5ae1e3a5cf 100644 (file)
--- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
@@ -23,23 +23,7 @@
  * (C) Copyright 2005-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+ 
  */
 
 /* define DEBUG for debugging output (obviously ;-)) */
@@ -88,8 +72,6 @@ void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))
 #define NUMMEMTESTS            8
 #define NUMMEMWORDS            8
 #define MAXBXCR                        4
-#define TRUE                   1
-#define FALSE                  0
 
 /*
  * This DDR2 setup code can dynamically setup the TLB entries for the DDR2 memory
@@ -298,7 +280,7 @@ static void get_spd_info(unsigned long *dimm_populated,
        unsigned char num_of_bytes;
        unsigned char total_size;
 
-       dimm_found = FALSE;
+       dimm_found = false;
        for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
                num_of_bytes = 0;
                total_size = 0;
@@ -307,16 +289,16 @@ static void get_spd_info(unsigned long *dimm_populated,
                total_size = spd_read(iic0_dimm_addr[dimm_num], 1);
 
                if ((num_of_bytes != 0) && (total_size != 0)) {
-                       dimm_populated[dimm_num] = TRUE;
-                       dimm_found = TRUE;
+                       dimm_populated[dimm_num] = true;
+                       dimm_found = true;
                        debug("DIMM slot %lu: populated\n", dimm_num);
                } else {
-                       dimm_populated[dimm_num] = FALSE;
+                       dimm_populated[dimm_num] = false;
                        debug("DIMM slot %lu: Not populated\n", dimm_num);
                }
        }
 
-       if (dimm_found == FALSE) {
+       if (dimm_found == false) {
                printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n");
                spd_ddr_init_hang ();
        }
@@ -330,7 +312,7 @@ static void check_mem_type(unsigned long *dimm_populated,
        unsigned char dimm_type;
 
        for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
-               if (dimm_populated[dimm_num] == TRUE) {
+               if (dimm_populated[dimm_num] == true) {
                        dimm_type = spd_read(iic0_dimm_addr[dimm_num], 2);
                        switch (dimm_type) {
                        case 7:
@@ -356,7 +338,7 @@ static void check_volt_type(unsigned long *dimm_populated,
        unsigned long voltage_type;
 
        for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
-               if (dimm_populated[dimm_num] == TRUE) {
+               if (dimm_populated[dimm_num] == true) {
                        voltage_type = spd_read(iic0_dimm_addr[dimm_num], 8);
                        if (voltage_type != 0x04) {
                                printf("ERROR: DIMM %lu with unsupported voltage level.\n",
@@ -380,8 +362,6 @@ static void program_cfg0(unsigned long *dimm_populated,
        unsigned char ecc;
        unsigned char attributes;
        unsigned long data_width;
-       unsigned long dimm_32bit;
-       unsigned long dimm_64bit;
 
        /*
         * get Memory Controller Options 0 data
@@ -400,12 +380,12 @@ static void program_cfg0(unsigned long *dimm_populated,
        /*
         * FIXME: assume the DDR SDRAMs in both banks are the same
         */
-       ecc_enabled = TRUE;
+       ecc_enabled = true;
        for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
-               if (dimm_populated[dimm_num] == TRUE) {
+               if (dimm_populated[dimm_num] == true) {
                        ecc = spd_read(iic0_dimm_addr[dimm_num], 11);
                        if (ecc != 0x02) {
-                               ecc_enabled = FALSE;
+                               ecc_enabled = false;
                        }
 
                        /*
@@ -423,10 +403,8 @@ static void program_cfg0(unsigned long *dimm_populated,
                                (unsigned long)spd_read(iic0_dimm_addr[dimm_num],6) +
                                (((unsigned long)spd_read(iic0_dimm_addr[dimm_num],7)) << 8);
                        if (data_width == 64 || data_width == 72) {
-                               dimm_64bit = TRUE;
                                cfg0 |= SDRAM_CFG0_DMWD_64;
                        } else if (data_width == 32 || data_width == 40) {
-                               dimm_32bit = TRUE;
                                cfg0 |= SDRAM_CFG0_DMWD_32;
                        } else {
                                printf("WARNING: DIMM with datawidth of %lu bits.\n",
@@ -441,7 +419,7 @@ static void program_cfg0(unsigned long *dimm_populated,
        /*
         * program Memory Data Error Checking
         */
-       if (ecc_enabled == TRUE) {
+       if (ecc_enabled == true) {
                cfg0 |= SDRAM_CFG0_MCHK_GEN;
        } else {
                cfg0 |= SDRAM_CFG0_MCHK_NON;
@@ -497,7 +475,7 @@ static void program_rtr(unsigned long *dimm_populated,
        bus_period_x_10 = ONE_BILLION / (sys_info.freqPLB / 10);
 
        for (dimm_num = 0;  dimm_num < num_dimm_banks; dimm_num++) {
-               if (dimm_populated[dimm_num] == TRUE) {
+               if (dimm_populated[dimm_num] == true) {
                        refresh_rate_type = 0x7F & spd_read(iic0_dimm_addr[dimm_num], 12);
                        switch (refresh_rate_type) {
                        case 0x00:
@@ -589,15 +567,15 @@ static void program_tr0(unsigned long *dimm_populated,
        t_rp_ns = 0;
        t_rcd_ns = 0;
        t_ras_ns = 0;
-       cas_2_0_available = TRUE;
-       cas_2_5_available = TRUE;
-       cas_3_0_available = TRUE;
+       cas_2_0_available = true;
+       cas_2_5_available = true;
+       cas_3_0_available = true;
        tcyc_2_0_ns_x_10 = 0;
        tcyc_2_5_ns_x_10 = 0;
        tcyc_3_0_ns_x_10 = 0;
 
        for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
-               if (dimm_populated[dimm_num] == TRUE) {
+               if (dimm_populated[dimm_num] == true) {
                        wcsbc = spd_read(iic0_dimm_addr[dimm_num], 15);
                        t_rp_ns  = spd_read(iic0_dimm_addr[dimm_num], 27) >> 2;
                        t_rcd_ns = spd_read(iic0_dimm_addr[dimm_num], 29) >> 2;
@@ -644,7 +622,7 @@ static void program_tr0(unsigned long *dimm_populated,
                                if (cas_index != 0) {
                                        cas_index++;
                                }
-                               cas_3_0_available = FALSE;
+                               cas_3_0_available = false;
                        }
 
                        if (((cas_bit & 0x08) != 0) || (cas_index < 3)) {
@@ -654,7 +632,7 @@ static void program_tr0(unsigned long *dimm_populated,
                                if (cas_index != 0) {
                                        cas_index++;
                                }
-                               cas_2_5_available = FALSE;
+                               cas_2_5_available = false;
                        }
 
                        if (((cas_bit & 0x04) != 0) || (cas_index < 3)) {
@@ -664,7 +642,7 @@ static void program_tr0(unsigned long *dimm_populated,
                                if (cas_index != 0) {
                                        cas_index++;
                                }
-                               cas_2_0_available = FALSE;
+                               cas_2_0_available = false;
                        }
 
                        break;
@@ -687,13 +665,13 @@ static void program_tr0(unsigned long *dimm_populated,
        /*
         * Program SD_CASL field
         */
-       if ((cas_2_0_available == TRUE) &&
+       if ((cas_2_0_available == true) &&
            (bus_period_x_10 >= tcyc_2_0_ns_x_10)) {
                tr0 |= SDRAM_TR0_SDCL_2_0_CLK;
-       } else if ((cas_2_5_available == TRUE) &&
+       } else if ((cas_2_5_available == true) &&
                 (bus_period_x_10 >= tcyc_2_5_ns_x_10)) {
                tr0 |= SDRAM_TR0_SDCL_2_5_CLK;
-       } else if ((cas_3_0_available == TRUE) &&
+       } else if ((cas_3_0_available == true) &&
                 (bus_period_x_10 >= tcyc_3_0_ns_x_10)) {
                tr0 |= SDRAM_TR0_SDCL_3_0_CLK;
        } else {
@@ -954,9 +932,9 @@ static void program_tr1(void)
        current_fail_length = 0;
        current_start = 0;
        rdclt_offset = 0;
-       window_found = FALSE;
-       fail_found = FALSE;
-       pass_found = FALSE;
+       window_found = false;
+       fail_found = false;
+       pass_found = false;
        debug("Starting memory test ");
 
        for (k = 0; k < NUMHALFCYCLES; k++) {
@@ -967,8 +945,8 @@ static void program_tr1(void)
                        mtsdram(SDRAM0_TR1, (tr1 | SDRAM_TR1_RDCT_ENCODE(rdclt)));
 
                        if (short_mem_test()) {
-                               if (fail_found == TRUE) {
-                                       pass_found = TRUE;
+                               if (fail_found == true) {
+                                       pass_found = true;
                                        if (current_pass_length == 0) {
                                                current_start = rdclt_offset + rdclt;
                                        }
@@ -987,10 +965,10 @@ static void program_tr1(void)
                                current_fail_length++;
 
                                if (current_fail_length >= (dly_val>>2)) {
-                                       if (fail_found == FALSE) {
-                                               fail_found = TRUE;
-                                       } else if (pass_found == TRUE) {
-                                               window_found = TRUE;
+                                       if (fail_found == false) {
+                                               fail_found = true;
+                                       } else if (pass_found == true) {
+                                               window_found = true;
                                                break;
                                        }
                                }
@@ -998,9 +976,8 @@ static void program_tr1(void)
                }
                debug(".");
 
-               if (window_found == TRUE) {
+               if (window_found == true)
                        break;
-               }
 
                tr1 = tr1 ^ SDRAM_TR1_RDCD_MASK;
                rdclt_offset += dly_val;
@@ -1010,7 +987,7 @@ static void program_tr1(void)
        /*
         * make sure we find the window
         */
-       if (window_found == FALSE) {
+       if (window_found == false) {
                printf("ERROR: Cannot determine a common read delay.\n");
                spd_ddr_init_hang ();
        }
@@ -1119,7 +1096,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated,
        bank_base_addr = CONFIG_SYS_SDRAM_BASE;
 
        for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
-               if (dimm_populated[dimm_num] == TRUE) {
+               if (dimm_populated[dimm_num] == true) {
                        num_row_addr = spd_read(iic0_dimm_addr[dimm_num], 3);
                        num_col_addr = spd_read(iic0_dimm_addr[dimm_num], 4);
                        num_banks    = spd_read(iic0_dimm_addr[dimm_num], 5);