]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - board/calao/sbc35_a9g20/sbc35_a9g20.c
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
[karo-tx-uboot.git] / board / calao / sbc35_a9g20 / sbc35_a9g20.c
index da34b40e50bc0bcb08777a895e43d140c11300cd..2074a93a12cada51529e072aa8ceaf9c16017630 100644 (file)
@@ -1,40 +1,22 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * Copyright (C) 2009
  * Albin Tonnerre, Free-Electrons <albin.tonnerre@free-electrons.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
-#include <asm/arch/at91sam9260.h>
+#include <asm/io.h>
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
+
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
 #include <net.h>
 #endif
@@ -50,33 +32,36 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_CMD_NAND
 static void sbc35_a9g20_nand_hw_init(void)
 {
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+       struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
        unsigned long csa;
 
        /* Enable CS3 */
-       csa = at91_sys_read(AT91_MATRIX_EBICSA);
-       at91_sys_write(AT91_MATRIX_EBICSA,
-                      csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+       csa = readl(&matrix->ebicsa);
+       csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+       writel(csa, &matrix->ebicsa);
 
        /* Configure SMC CS3 for NAND/SmartMedia */
-       at91_sys_write(AT91_SMC_SETUP(3),
-                      AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-                      AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-       at91_sys_write(AT91_SMC_PULSE(3),
-                      AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-                      AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-       at91_sys_write(AT91_SMC_CYCLE(3),
-                      AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-       at91_sys_write(AT91_SMC_MODE(3),
-                      AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-                      AT91_SMC_EXNWMODE_DISABLE |
+       writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+               AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+               &smc->cs[3].setup);
+       writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+               AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+               &smc->cs[3].pulse);
+       writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+               &smc->cs[3].cycle);
+       writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+               AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-                      AT91_SMC_DBW_16 |
+               AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-                      AT91_SMC_DBW_8 |
+               AT91_SMC_MODE_DBW_8 |
 #endif
-                      AT91_SMC_TDF_(2));
+               AT91_SMC_MODE_TDF_CYCLE(2),
+               &smc->cs[3].mode);
 
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+       writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
 
        /* Configure RDY/BSY */
        at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -89,10 +74,11 @@ static void sbc35_a9g20_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void sbc35_a9g20_macb_hw_init(void)
 {
-       unsigned long rstc;
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
 
-       /* Enable clock */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+       /* Enable EMAC clock */
+       writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
 
        /*
         * Disable pull-up on:
@@ -111,24 +97,9 @@ static void sbc35_a9g20_macb_hw_init(void)
               pin_to_mask(AT91_PIN_PA25) |
               pin_to_mask(AT91_PIN_PA26) |
               pin_to_mask(AT91_PIN_PA28),
-              pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
-
-       rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
-       /* Need to reset PHY -> 500ms reset */
-       at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    (AT91_RSTC_ERSTL & (0x0D << 8)) |
-                                    AT91_RSTC_URSTEN);
-
-       at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
+              &pioa->pudr);
 
-       /* Wait for end hardware reset */
-       while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
-
-       /* Restore NRST value */
-       at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    (rstc) |
-                                    AT91_RSTC_URSTEN);
+       at91_phy_reset();
 
        /* Re-enable pull-up */
        writel(pin_to_mask(AT91_PIN_PA14) |
@@ -137,7 +108,7 @@ static void sbc35_a9g20_macb_hw_init(void)
               pin_to_mask(AT91_PIN_PA25) |
               pin_to_mask(AT91_PIN_PA26) |
               pin_to_mask(AT91_PIN_PA28),
-              pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
+              &pioa->puer);
 
        at91_macb_hw_init();
 }
@@ -145,14 +116,10 @@ static void sbc35_a9g20_macb_hw_init(void)
 
 int board_init(void)
 {
-       /* Enable Ctrlc */
-       console_init_f();
-
-       gd->bd->bi_arch_number = MACH_TYPE_SBC35_A9G20;
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-       at91_serial_hw_init();
+       at91_seriald_hw_init();
        sbc35_a9g20_nand_hw_init();
 #ifdef CONFIG_ATMEL_SPI
        at91_spi0_hw_init(1 << 4 | 1 << 5);
@@ -166,24 +133,15 @@ int board_init(void)
 
 int dram_init(void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM;
-       if(get_ram_size((long *) PHYS_SDRAM, PHYS_SDRAM_SIZE) != PHYS_SDRAM_SIZE)
-               return -1;
-
-       gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+       gd->ram_size = get_ram_size(
+               (void *)CONFIG_SYS_SDRAM_BASE,
+               CONFIG_SYS_SDRAM_SIZE);
        return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
 void reset_phy(void)
 {
-#ifdef CONFIG_MACB
-       /*
-        * Initialize ethernet HW addr prior to starting Linux,
-        * needed for nfsroot
-        */
-       eth_init(gd->bd);
-#endif
 }
 #endif
 
@@ -191,7 +149,7 @@ int board_eth_init(bd_t *bis)
 {
        int rc = 0;
 #ifdef CONFIG_MACB
-       rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
+       rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
 #endif
        return rc;
 }