Make sure that argv[] argument pointers are not modified.

[karo-tx-uboot.git] / board / esd / du405 / du405.c

diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
index 78ae4ba67b6fb9dd71d2690e62b07743e0a5c916..aa7ee92a5f13536300b04118ae6cd6a6583ad6ab 100644 (file)
--- a/board/esd/du405/du405.c
+++ b/board/esd/du405/du405.c
@@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /*cmd_boot.c*/
 
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 extern void lxt971_no_sleep(void);
 
 
@@ -124,18 +124,18 @@ int board_early_init_f (void)
         * IRQ 30 (EXT IRQ 5) unused; active low; level sensitive
         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
         */
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
-       mtdcr (uicer, 0x00000000);      /* disable all ints */
-       mtdcr (uiccr, 0x00000000);      /* set all to be non-critical */
-       mtdcr (uicpr, 0xFFFFFFB1);      /* set int polarities */
-       mtdcr (uictr, 0x10000000);      /* set int trigger levels */
-       mtdcr (uicvcr, 0x00000001);     /* set vect base=0,INT0 highest priority */
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
+       mtdcr (UIC0ER, 0x00000000);     /* disable all ints */
+       mtdcr (UIC0CR, 0x00000000);     /* set all to be non-critical */
+       mtdcr (UIC0PR, 0xFFFFFFB1);     /* set int polarities */
+       mtdcr (UIC0TR, 0x10000000);     /* set int trigger levels */
+       mtdcr (UIC0VCR, 0x00000001);    /* set vect base=0,INT0 highest priority */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
 
        /*
         * EBC Configuration Register: set ready timeout to 100 us
         */
-       mtebc (epcr, 0xb8400000);
+       mtebc (EBC0_CFG, 0xb8400000);
 
        return 0;
 }
@@ -143,13 +143,13 @@ int board_early_init_f (void)
 
 int misc_init_r (void)
 {
-       unsigned long cntrl0Reg;
+       unsigned long CPC0_CR0Reg;
 
        /*
         * Setup UART1 handshaking: use CTS instead of DSR
         */
-       cntrl0Reg = mfdcr(cntrl0);
-       mtdcr(cntrl0, cntrl0Reg | 0x00001000);
+       CPC0_CR0Reg = mfdcr(CPC0_CR0);
+       mtdcr(CPC0_CR0, CPC0_CR0Reg | 0x00001000);
 
        return (0);
 }
@@ -188,28 +188,19 @@ int checkboard (void)
        /*
         * Reset external DUART via FPGA
         */
-       *(volatile unsigned char *) FPGA_MODE_REG = 0xff;       /* reset high active */
-       *(volatile unsigned char *) FPGA_MODE_REG = 0x00;       /* low again */
-
-       /*
-        * Disable sleep mode in LXT971
-        */
-       lxt971_no_sleep();
+       out_8((void *)FPGA_MODE_REG, 0xff); /* reset high active */
+       out_8((void *)FPGA_MODE_REG, 0x00); /* low again */
 
        return 0;
 }
 
-
-phys_size_t initdram (int board_type)
-{
-       return (16 * 1024 * 1024);
-}
-
-
-int testdram (void)
+void reset_phy(void)
 {
-       /* TODO: XXX XXX XXX */
-       printf ("test: 16 MB - ok\n");
+#if defined(CONFIG_LXT971_NO_SLEEP)
 
-       return (0);
+       /*
+        * Disable sleep mode in LXT971
+        */
+       lxt971_no_sleep();
+#endif
 }