Merge branch 'master' of /home/wd/git/u-boot/master

[karo-tx-uboot.git] / board / esd / wuh405 / wuh405.c

diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c
index 5a1a3f3e8ee68fe38e07384fb72ba2f9b45a8b76..5a65133d7137b16a9a07eedab8e9e36d638b964a 100644 (file)
--- a/board/esd/wuh405/wuh405.c
+++ b/board/esd/wuh405/wuh405.c
@@ -32,7 +32,7 @@
 #define FPGA_DEBUG
 #endif
 
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 
 /* fpga configuration data - gzip compressed and generated by bin2c */
 const unsigned char fpgadata[] =
@@ -46,10 +46,6 @@ const unsigned char fpgadata[] =
 #include "../common/fpga.c"
 
 
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-
 int board_early_init_f (void)
 {
        /*
@@ -64,45 +60,32 @@ int board_early_init_f (void)
         * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
         */
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
-       mtdcr(uicer, 0x00000000);       /* disable all ints */
-       mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-       mtdcr(uicpr, 0xFFFFFF9F);       /* set int polarities */
-       mtdcr(uictr, 0x10000000);       /* set int trigger levels */
-       mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
+       mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
+       mtdcr(UIC0PR, 0xFFFFFF9F);       /* set int polarities */
+       mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
+       mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+       mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
 
        /*
         * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
         */
-       mtebc (epcr, 0xa8400000); /* ebc always driven */
+       mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
 
        return 0;
 }
 
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
-       return 0;  /* dummy implementation */
-}
-
-
 int misc_init_r (void)
 {
-       volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
-       volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
-       volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
-       volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
        unsigned char *dst;
        ulong len = sizeof(fpgadata);
        int status;
        int index;
        int i;
 
-       dst = malloc(CFG_FPGA_MAX_SIZE);
-       if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
+       dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
+       if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
                printf ("GUNZIP ERROR - must RESET board to recover\n");
                do_reset (NULL, 0, 0, NULL);
        }
@@ -164,24 +147,20 @@ int misc_init_r (void)
        /*
         * Reset external DUARTs
         */
-       out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+       out_be32((void *)GPIO0_OR,
+                in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST);
        udelay(10); /* wait 10us */
-       out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+       out_be32((void *)GPIO0_OR,
+                in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST);
        udelay(1000); /* wait 1ms */
 
-       /*
-        * Set NAND-FLASH GPIO signals to default
-        */
-       out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
-       out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
        /*
         * Enable interrupts in exar duart mcr[3]
         */
-       *duart0_mcr = 0x08;
-       *duart1_mcr = 0x08;
-       *duart2_mcr = 0x08;
-       *duart3_mcr = 0x08;
+       out_8((void *)(DUART0_BA + 4), 0x08);
+       out_8((void *)(DUART1_BA + 4), 0x08);
+       out_8((void *)(DUART2_BA + 4), 0x08);
+       out_8((void *)(DUART3_BA + 4), 0x08);
 
        return (0);
 }
@@ -194,7 +173,7 @@ int misc_init_r (void)
 int checkboard (void)
 {
        char str[64];
-       int i = getenv_r ("serial#", str, sizeof(str));
+       int i = getenv_f("serial#", str, sizeof(str));
 
        puts ("Board: ");
 
@@ -208,45 +187,3 @@ int checkboard (void)
 
        return 0;
 }
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
-       unsigned long val;
-
-       mtdcr(memcfga, mem_mb0cf);
-       val = mfdcr(memcfgd);
-
-#if 0
-       printf("\nmb0cf=%x\n", val); /* test-only */
-       printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
-       return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
-       /* TODO: XXX XXX XXX */
-       printf ("test: 16 MB - ok\n");
-
-       return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
-       nand_probe(CFG_NAND_BASE);
-       if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
-               print_size(nand_dev_desc[0].totlen, "\n");
-       }
-}
-#endif