rename CFG_ macros to CONFIG_SYS

[karo-tx-uboot.git] / board / pcs440ep / pcs440ep.c

diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c
index f66f3f233ecf31d829aa3b9a904cb8e9dedb20c7..271005f0f8fcb70ac6ef2443610c2589a80d825b 100644 (file)
--- a/board/pcs440ep/pcs440ep.c
+++ b/board/pcs440ep/pcs440ep.c
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips   */
+extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips    */
 
 unsigned char  sha1_checksum[SHA1_SUM_LEN];
 
@@ -193,7 +193,7 @@ void load_sernum_ethaddr (void)
        /* read the MACs from EEprom */
        status_led_set (0, STATUS_LED_ON);
        status_led_set (1, STATUS_LED_ON);
-       ret = eeprom_read (CFG_I2C_EEPROM_ADDR, 0, (uchar *)buf, EEPROM_LEN);
+       ret = eeprom_read (CONFIG_SYS_I2C_EEPROM_ADDR, 0, (uchar *)buf, EEPROM_LEN);
        if (ret == 0) {
                checksumcrc16 = cyg_crc16 ((uchar *)buf, EEPROM_LEN - 2);
                /* check, if the EEprom is programmed:
@@ -379,8 +379,8 @@ static int pcs440ep_sha1 (int docheck)
        unsigned char org[20];
        int     i, len = CONFIG_SHA1_LEN;
 
-       memcpy ((char *)CFG_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
-       data = (unsigned char *)CFG_LOAD_ADDR;
+       memcpy ((char *)CONFIG_SYS_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
+       data = (unsigned char *)CONFIG_SYS_LOAD_ADDR;
        ptroff = &data[len + SHA1_SUM_POS];
 
        for (i = 0; i < SHA1_SUM_LEN; i++) {
@@ -485,14 +485,14 @@ int misc_init_r (void)
 
        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                           -CFG_MONITOR_LEN,
+                           -CONFIG_SYS_MONITOR_LEN,
                            0xffffffff,
                            &flash_info[1]);
 
        /* Env protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                           CFG_ENV_ADDR_REDUND,
-                           CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
+                           CONFIG_ENV_ADDR_REDUND,
+                           CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
                            &flash_info[1]);
 
        pcs440ep_readinputs ();
@@ -616,7 +616,7 @@ int pci_pre_init(struct pci_controller *hose)
  *     may not be sufficient for a given board.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
+#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller *hose)
 {
        /*--------------------------------------------------------------------------+
@@ -630,14 +630,14 @@ void pci_target_init(struct pci_controller *hose)
          | Make this region non-prefetchable.
          +--------------------------------------------------------------------------*/
        out32r(PCIX0_PMM0MA, 0x00000000);       /* PMM0 Mask/Attribute - disabled b4 setting */
-       out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE);  /* PMM0 Local Address */
-       out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE);       /* PMM0 PCI Low Address */
+       out32r(PCIX0_PMM0LA, CONFIG_SYS_PCI_MEMBASE);   /* PMM0 Local Address */
+       out32r(PCIX0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE);        /* PMM0 PCI Low Address */
        out32r(PCIX0_PMM0PCIHA, 0x00000000);    /* PMM0 PCI High Address */
        out32r(PCIX0_PMM0MA, 0xE0000001);       /* 512M + No prefetching, and enable region */
 
        out32r(PCIX0_PMM1MA, 0x00000000);       /* PMM0 Mask/Attribute - disabled b4 setting */
-       out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
-       out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2);      /* PMM0 PCI Low Address */
+       out32r(PCIX0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2);  /* PMM0 Local Address */
+       out32r(PCIX0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2);       /* PMM0 PCI Low Address */
        out32r(PCIX0_PMM1PCIHA, 0x00000000);    /* PMM0 PCI High Address */
        out32r(PCIX0_PMM1MA, 0xE0000001);       /* 512M + No prefetching, and enable region */
 
@@ -652,8 +652,8 @@ void pci_target_init(struct pci_controller *hose)
 
        /* Program the board's subsystem id/vendor id */
        pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
-                             CFG_PCI_SUBSYS_VENDORID);
-       pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
+                             CONFIG_SYS_PCI_SUBSYS_VENDORID);
+       pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
 
        /* Configure command register as bus master */
        pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
@@ -667,13 +667,13 @@ void pci_target_init(struct pci_controller *hose)
        pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
 
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
+#endif                         /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
 
 /*************************************************************************
  *  pci_master_init
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
+#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
 void pci_master_init(struct pci_controller *hose)
 {
        unsigned short temp_short;
@@ -688,7 +688,7 @@ void pci_master_init(struct pci_controller *hose)
                              temp_short | PCI_COMMAND_MASTER |
                              PCI_COMMAND_MEMORY);
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
+#endif                         /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
 
 /*************************************************************************
  *  is_pci_host