#include <common.h>
#include <config.h>
#include <netdev.h>
+#include <asm/processor.h>
#include <asm/microblaze_intc.h>
#include <asm/asm.h>
+#include <asm/gpio.h>
+
+#ifdef CONFIG_XILINX_GPIO
+static int reset_pin = -1;
+#endif
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
-#ifdef CONFIG_SYS_GPIO_0
- *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
- ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
+#ifdef CONFIG_XILINX_GPIO
+ if (reset_pin != -1)
+ gpio_direction_output(reset_pin, 1);
#endif
-#ifdef CONFIG_SYS_RESET_ADDRESS
- puts ("Reseting board\n");
- asm ("bra r0");
+
+#ifdef CONFIG_XILINX_TB_WATCHDOG
+ hw_watchdog_disable();
#endif
+
+ puts ("Reseting board\n");
+ __asm__ __volatile__ (" mts rmsr, r0;" \
+ "bra r0");
+
return 0;
}
int gpio_init (void)
{
-#ifdef CONFIG_SYS_GPIO_0
- *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF;
+#ifdef CONFIG_XILINX_GPIO
+ reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
+ if (reset_pin != -1)
+ gpio_request(reset_pin, "reset_pin");
#endif
return 0;
}
-#ifdef CONFIG_SYS_FSL_2
-void fsl_isr2 (void *arg) {
- volatile int num;
- *((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)) =
- ++(*((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)));
- GET (num, 2);
- NGET (num, 2);
- puts("*");
-}
-
-int fsl_init2 (void) {
- puts("fsl_init2\n");
- install_interrupt_handler (FSL_INTR_2, fsl_isr2, NULL);
- return 0;
+void board_init(void)
+{
+ gpio_init();
}
-#endif
int board_eth_init(bd_t *bis)
{
ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
txpp, rxpp);
#endif
+
+#ifdef CONFIG_XILINX_LL_TEMAC
+# ifdef XILINX_LLTEMAC_BASEADDR
+# ifdef XILINX_LLTEMAC_FIFO_BASEADDR
+ ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+ XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
+# elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
+# if XILINX_LLTEMAC_SDMA_USE_DCR == 1
+ ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+ XILINX_LL_TEMAC_M_SDMA_DCR,
+ XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
+# else
+ ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+ XILINX_LL_TEMAC_M_SDMA_PLB,
+ XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
+# endif
+# endif
+# endif
+# ifdef XILINX_LLTEMAC_BASEADDR1
+# ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
+ ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+ XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
+# elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
+# if XILINX_LLTEMAC_SDMA_USE_DCR == 1
+ ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+ XILINX_LL_TEMAC_M_SDMA_DCR,
+ XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
+# else
+ ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+ XILINX_LL_TEMAC_M_SDMA_PLB,
+ XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
+# endif
+# endif
+# endif
+#endif
+
return ret;
}