rename CFG_ macros to CONFIG_SYS

[karo-tx-uboot.git] / common / spartan2.c

diff --git a/common/spartan2.c b/common/spartan2.c
index 06550b9858cde121928d6b9beab8bffebb176f1c..f5ba7fc041e61684bb7d7784d4f206f37b6ac91c 100644 (file)
--- a/common/spartan2.c
+++ b/common/spartan2.c
@@ -25,8 +25,6 @@
 #include <common.h>            /* core U-Boot definitions */
 #include <spartan2.h>          /* Spartan-II device family */
 
-#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN2))
-
 /* Define FPGA_DEBUG to get debug printf's */
 #ifdef FPGA_DEBUG
 #define PRINTF(fmt,args...)    printf (fmt ,##args)
@@ -34,8 +32,8 @@
 #define PRINTF(fmt,args...)
 #endif
 
-#undef CFG_FPGA_CHECK_BUSY
-#undef CFG_FPGA_PROG_FEEDBACK
+#undef CONFIG_SYS_FPGA_CHECK_BUSY
+#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
 
 /* Note: The assumption is that we cannot possibly run fast enough to
  * overrun the device (the Slave Parallel mode can free run at 50MHz).
@@ -46,8 +44,8 @@
 #define CONFIG_FPGA_DELAY()
 #endif
 
-#ifndef CFG_FPGA_WAIT
-#define CFG_FPGA_WAIT CFG_HZ/100       /* 10 ms */
+#ifndef CONFIG_SYS_FPGA_WAIT
+#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
 #endif
 
 static int Spartan2_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
@@ -182,7 +180,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                 * Continuous Data Loading in Slave Parallel Mode for
                 * the Spartan-II Family.
                 */
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                printf ("Loading FPGA Device %d...\n", cookie);
 #endif
                /*
@@ -203,7 +201,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                /* Now wait for INIT and BUSY to go high */
                do {
                        CONFIG_FPGA_DELAY ();
-                       if (get_timer (ts) > CFG_FPGA_WAIT) {   /* check the time */
+                       if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                puts ("** Timeout waiting for INIT to clear.\n");
                                (*fn->abort) (cookie);  /* abort the burn */
                                return FPGA_FAIL;
@@ -225,7 +223,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                        CONFIG_FPGA_DELAY ();
                        (*fn->clk) (TRUE, TRUE, cookie);        /* Assert the clock pin */
 
-#ifdef CFG_FPGA_CHECK_BUSY
+#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
                        ts = get_timer (0);     /* get current time */
                        while ((*fn->busy) (cookie)) {
                                /* XXX - we should have a check in here somewhere to
@@ -236,7 +234,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                                CONFIG_FPGA_DELAY ();
                                (*fn->clk) (TRUE, TRUE, cookie);        /* Assert the clock pin */
 
-                               if (get_timer (ts) > CFG_FPGA_WAIT) {   /* check the time */
+                               if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                        puts ("** Timeout waiting for BUSY to clear.\n");
                                        (*fn->abort) (cookie);  /* abort the burn */
                                        return FPGA_FAIL;
@@ -244,7 +242,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                        }
 #endif
 
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                        if (bytecount % (bsize / 40) == 0)
                                putc ('.');             /* let them know we are alive */
 #endif
@@ -254,7 +252,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                (*fn->cs) (FALSE, TRUE, cookie);        /* Deassert the chip select */
                (*fn->wr) (FALSE, TRUE, cookie);        /* Deassert the write pin */
 
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                putc ('\n');                    /* terminate the dotted line */
 #endif
 
@@ -270,7 +268,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                        CONFIG_FPGA_DELAY ();
                        (*fn->clk) (TRUE, TRUE, cookie);        /* Assert the clock pin */
 
-                       if (get_timer (ts) > CFG_FPGA_WAIT) {   /* check the time */
+                       if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                puts ("** Timeout waiting for DONE to clear.\n");
                                (*fn->abort) (cookie);  /* abort the burn */
                                ret_val = FPGA_FAIL;
@@ -279,7 +277,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                }
 
                if (ret_val == FPGA_SUCCESS) {
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                        puts ("Done.\n");
 #endif
                }
@@ -291,7 +289,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
                }
 
                else {
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                        puts ("Fail.\n");
 #endif
                }
@@ -325,7 +323,7 @@ static int Spartan2_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
                        (*fn->clk) (FALSE, TRUE, cookie);       /* Deassert the clock pin */
                        (*fn->clk) (TRUE, TRUE, cookie);        /* Assert the clock pin */
                        (*fn->rdata) (&(data[bytecount++]), cookie);    /* read the data */
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                        if (bytecount % (bsize / 40) == 0)
                                putc ('.');             /* let them know we are alive */
 #endif
@@ -335,7 +333,7 @@ static int Spartan2_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
                (*fn->clk) (FALSE, TRUE, cookie);       /* Deassert the clock pin */
                (*fn->clk) (TRUE, TRUE, cookie);        /* Assert the clock pin */
 
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                putc ('\n');                    /* terminate the dotted line */
 #endif
                puts ("Done.\n");
@@ -441,7 +439,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
        int ret_val = FPGA_FAIL;        /* assume the worst */
        Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns;
        int i;
-       char  val;
+       unsigned char val;
 
        PRINTF ("%s: start with interface functions @ 0x%p\n",
                        __FUNCTION__, fn);
@@ -462,7 +460,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                                "done:\t0x%p\n\n",
                                __FUNCTION__, &fn, fn, fn->pgm, fn->init,
                                fn->clk, fn->wr, fn->done);
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                printf ("Loading FPGA Device %d...\n", cookie);
 #endif
 
@@ -480,7 +478,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                ts = get_timer (0);             /* get current time */
                do {
                        CONFIG_FPGA_DELAY ();
-                       if (get_timer (ts) > CFG_FPGA_WAIT) {   /* check the time */
+                       if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                puts ("** Timeout waiting for INIT to start.\n");
                                return FPGA_FAIL;
                        }
@@ -494,7 +492,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                /* Now wait for INIT to go high */
                do {
                        CONFIG_FPGA_DELAY ();
-                       if (get_timer (ts) > CFG_FPGA_WAIT) {   /* check the time */
+                       if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                puts ("** Timeout waiting for INIT to clear.\n");
                                return FPGA_FAIL;
                        }
@@ -525,7 +523,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                                i --;
                        } while (i > 0);
 
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                        if (bytecount % (bsize / 40) == 0)
                                putc ('.');             /* let them know we are alive */
 #endif
@@ -533,7 +531,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 
                CONFIG_FPGA_DELAY ();
 
-#ifdef CFG_FPGA_PROG_FEEDBACK
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                putc ('\n');                    /* terminate the dotted line */
 #endif
 
@@ -553,7 +551,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 
                        putc ('*');
 
-                       if (get_timer (ts) > CFG_FPGA_WAIT) {   /* check the time */
+                       if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                puts ("** Timeout waiting for DONE to clear.\n");
                                ret_val = FPGA_FAIL;
                                break;
@@ -561,7 +559,14 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                }
                putc ('\n');                    /* terminate the dotted line */
 
-#ifdef CFG_FPGA_PROG_FEEDBACK
+               /*
+                * Run the post configuration function if there is one.
+                */
+               if (*fn->post) {
+                       (*fn->post) (cookie);
+               }
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
                if (ret_val == FPGA_SUCCESS) {
                        puts ("Done.\n");
                }
@@ -615,8 +620,10 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
                        PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
                                        desc);
 
-                       addr = (ulong) (fn->pre) + reloc_offset;
-                       fn_r->pre = (Xilinx_pre_fn) addr;
+                       if (fn->pre) {
+                               addr = (ulong) (fn->pre) + reloc_offset;
+                               fn_r->pre = (Xilinx_pre_fn) addr;
+                       }
 
                        addr = (ulong) (fn->pgm) + reloc_offset;
                        fn_r->pgm = (Xilinx_pgm_fn) addr;
@@ -633,6 +640,11 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
                        addr = (ulong) (fn->wr) + reloc_offset;
                        fn_r->wr = (Xilinx_wr_fn) addr;
 
+                       if (fn->post) {
+                               addr = (ulong) (fn->post) + reloc_offset;
+                               fn_r->post = (Xilinx_post_fn) addr;
+                       }
+
                        fn_r->relocated = TRUE;
 
                } else {
@@ -649,5 +661,3 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
        return ret_val;
 
 }
-
-#endif