sunxi_nand_spl: Auto detect nand configuration parameters

[karo-tx-uboot.git] / drivers / mtd / nand / Kconfig

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 791699922e2c48fb14fc81c5cfb8229eb7ba810b..086ddad47dce050840b9421cda57ebea501e20c6 100644 (file)
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -12,8 +12,6 @@ config SYS_NAND_SELF_INIT
          This option, if enabled, provides more flexible and linux-like
          NAND initialization process.
 
          This option, if enabled, provides more flexible and linux-like
          NAND initialization process.
 

-if !SPL_BUILD
-

 config NAND_DENALI
        bool "Support Denali NAND controller"
        select SYS_NAND_SELF_INIT
 config NAND_DENALI
        bool "Support Denali NAND controller"
        select SYS_NAND_SELF_INIT


@@ -40,9 +38,59 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES
          of OOB area before last ECC sector data starts.  This is potentially
          used to preserve the bad block marker in the OOB area.
 
          of OOB area before last ECC sector data starts.  This is potentially
          used to preserve the bad block marker in the OOB area.
 

-endif
+config NAND_VF610_NFC
+       bool "Support for Freescale NFC for VF610/MPC5125"
+       select SYS_NAND_SELF_INIT
+       help
+         Enables support for NAND Flash Controller on some Freescale
+         processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
+         The driver supports a maximum 2k page size. The driver
+         currently does not support hardware ECC.
+
+choice
+       prompt "Hardware ECC strength"
+       depends on NAND_VF610_NFC
+       default SYS_NAND_VF610_NFC_45_ECC_BYTES
+       help
+         Select the ECC strength used in the hardware BCH ECC block.

 
 

-if SPL_BUILD
+config SYS_NAND_VF610_NFC_45_ECC_BYTES
+       bool "24-error correction (45 ECC bytes)"
+
+config SYS_NAND_VF610_NFC_60_ECC_BYTES
+       bool "32-error correction (60 ECC bytes)"
+
+endchoice
+
+config NAND_PXA3XX
+       bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
+       select SYS_NAND_SELF_INIT
+       help
+         This enables the driver for the NAND flash device found on
+         PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
+
+comment "Generic NAND options"
+
+# Enhance depends when converting drivers to Kconfig which use this config
+# option (mxc_nand, ndfc, omap_gpmc).
+config SYS_NAND_BUSWIDTH_16BIT
+       bool "Use 16-bit NAND interface"
+       depends on NAND_VF610_NFC
+       help
+         Indicates that NAND device has 16-bit wide data-bus. In absence of this
+         config, bus-width of NAND device is assumed to be either 8-bit and later
+         determined by reading ONFI params.
+         Above config is useful when NAND device's bus-width information cannot
+         be determined from on-chip ONFI params, like in following scenarios:
+         - SPL boot does not support reading of ONFI parameters. This is done to
+           keep SPL code foot-print small.
+         - In current U-Boot flow using nand_init(), driver initialization
+           happens in board_nand_init() which is called before any device probe
+           (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
+           not available while configuring controller. So a static CONFIG_NAND_xx
+           is needed to know the device's bus-width in advance.
+
+if SPL

 
 config SPL_NAND_DENALI
        bool "Support Denali NAND controller for SPL"
 
 config SPL_NAND_DENALI
        bool "Support Denali NAND controller for SPL"


@@ -50,8 +98,28 @@ config SPL_NAND_DENALI
          This is a small implementation of the Denali NAND controller
          for use on SPL.
 
          This is a small implementation of the Denali NAND controller
          for use on SPL.
 

+config SPL_NAND_SUNXI
+       bool "Support for NAND on Allwinner SoCs in SPL"
+       depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+       select SYS_NAND_SELF_INIT
+       ---help---
+       Enable support for NAND. This option allows SPL to read from
+       sunxi NAND using DMA transfers.
+
+config NAND_SUNXI_SPL_SYNDROME_PARTITIONS_END
+       hex "Size of syndrome partitions in sunxi NAND"
+       default 0x400000
+       depends on SPL_NAND_SUNXI
+       ---help---
+       End address for boot partitions on NAND. Those partitions have a
+       different random seed that has to match the sunxi BROM setting.
+

 endif
 
 endif
 

+config NAND_ATMEL
+       bool "AT91 NAND flash controller"
+       select SYS_NAND_SELF_INIT
+

 config NAND_MXC
        bool "Support Freescale i.MX NAND controller"
        select SYS_NAND_SELF_INIT
 config NAND_MXC
        bool "Support Freescale i.MX NAND controller"
        select SYS_NAND_SELF_INIT


@@ -67,7 +135,7 @@ config NAND_MXS
 
 config NAND_MXS_NO_BBM_SWAP
        bool "disable bad block mark swapping"
 
 config NAND_MXS_NO_BBM_SWAP
        bool "disable bad block mark swapping"

-       depends on NAND_MXS && MX6
+       depends on NAND_MXS && SOC_MX6

        select SYS_NAND_USE_FLASH_BBT
 
 endif
        select SYS_NAND_USE_FLASH_BBT
 
 endif